1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
4 *
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
6 *
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 * Author: Eugen Hristev <eugen.hristev@microcihp.com>
9 */
10 #include "sama5d2.dtsi"
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
15
16 / {
17 model = "Microchip SAMA5D27 WLSOM1";
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
19
20 aliases {
21 i2c0 = &i2c0;
22 };
23
24 clocks {
25 slow_xtal {
26 clock-frequency = <32768>;
27 };
28
29 main_xtal {
30 clock-frequency = <24000000>;
31 };
32 };
33
34 reg_5v: regulator-5v {
35 compatible = "regulator-fixed";
36 regulator-name = "VDD_MAIN";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 regulator-always-on;
40 };
41
42 wifi_pwrseq: wifi_pwrseq {
43 compatible = "mmc-pwrseq-wilc1000";
44 reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
45 powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>;
46 pinctrl-0 = <&pinctrl_wilc_pwrseq>;
47 pinctrl-names = "default";
48 };
49 };
50
51 &flx1 {
52 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
53
54 uart6: serial@200 {
55 pinctrl-0 = <&pinctrl_flx1_default>;
56 pinctrl-names = "default";
57 };
58 };
59
60 &i2c0 {
61 pinctrl-0 = <&pinctrl_i2c0_default>;
62 pinctrl-1 = <&pinctrl_i2c0_gpio>;
63 pinctrl-names = "default", "gpio";
64 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
65 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
66 status = "okay";
67 };
68
69 &i2c1 {
70 dmas = <0>, <0>;
71 pinctrl-names = "default", "gpio";
72 pinctrl-0 = <&pinctrl_i2c1_default>;
73 pinctrl-1 = <&pinctrl_i2c1_gpio>;
74 sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
75 scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
76 status = "okay";
77
78 mcp16502@5b {
79 compatible = "microchip,mcp16502";
80 reg = <0x5b>;
81 lvin-supply = <®_5v>;
82 pvin1-supply = <®_5v>;
83 pvin2-supply = <®_5v>;
84 pvin3-supply = <®_5v>;
85 pvin4-supply = <®_5v>;
86 status = "okay";
87 lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
88
89 regulators {
90 vdd_3v3: VDD_IO {
91 regulator-name = "VDD_IO";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 regulator-initial-mode = <2>;
95 regulator-allowed-modes = <2>, <4>;
96 regulator-always-on;
97
98 regulator-state-standby {
99 regulator-on-in-suspend;
100 regulator-mode = <4>;
101 };
102
103 regulator-state-mem {
104 regulator-off-in-suspend;
105 regulator-mode = <4>;
106 };
107 };
108
109 vddio_ddr: VDD_DDR {
110 regulator-name = "VDD_DDR";
111 regulator-min-microvolt = <1200000>;
112 regulator-max-microvolt = <1200000>;
113 regulator-initial-mode = <2>;
114 regulator-allowed-modes = <2>, <4>;
115 regulator-always-on;
116
117 regulator-state-standby {
118 regulator-on-in-suspend;
119 regulator-suspend-microvolt = <1200000>;
120 regulator-changeable-in-suspend;
121 regulator-mode = <4>;
122 };
123
124 regulator-state-mem {
125 regulator-on-in-suspend;
126 regulator-suspend-microvolt = <1200000>;
127 regulator-changeable-in-suspend;
128 regulator-mode = <4>;
129 };
130 };
131
132 vdd_core: VDD_CORE {
133 regulator-name = "VDD_CORE";
134 regulator-min-microvolt = <1250000>;
135 regulator-max-microvolt = <1250000>;
136 regulator-initial-mode = <2>;
137 regulator-allowed-modes = <2>, <4>;
138 regulator-always-on;
139
140 regulator-state-standby {
141 regulator-on-in-suspend;
142 regulator-mode = <4>;
143 };
144
145 regulator-state-mem {
146 regulator-off-in-suspend;
147 regulator-mode = <4>;
148 };
149 };
150
151 vdd_ddr: VDD_OTHER {
152 regulator-name = "VDD_OTHER";
153 regulator-min-microvolt = <1800000>;
154 regulator-max-microvolt = <1800000>;
155 regulator-initial-mode = <2>;
156 regulator-allowed-modes = <2>, <4>;
157 regulator-always-on;
158
159 regulator-state-standby {
160 regulator-on-in-suspend;
161 regulator-suspend-microvolt = <1800000>;
162 regulator-changeable-in-suspend;
163 regulator-mode = <4>;
164 };
165
166 regulator-state-mem {
167 regulator-on-in-suspend;
168 regulator-suspend-microvolt = <1800000>;
169 regulator-changeable-in-suspend;
170 regulator-mode = <4>;
171 };
172 };
173
174 LDO1 {
175 regulator-name = "LDO1";
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
178 regulator-always-on;
179
180 regulator-state-standby {
181 regulator-on-in-suspend;
182 };
183
184 regulator-state-mem {
185 regulator-off-in-suspend;
186 };
187 };
188
189 LDO2 {
190 regulator-name = "LDO2";
191 regulator-min-microvolt = <1800000>;
192 regulator-max-microvolt = <3300000>;
193
194 regulator-state-standby {
195 regulator-on-in-suspend;
196 };
197
198 regulator-state-mem {
199 regulator-off-in-suspend;
200 };
201 };
202 };
203 };
204 };
205
206 &macb0 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_macb0_default>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 phy-mode = "rmii";
212
213 ethernet-phy@0 {
214 reg = <0x0>;
215 interrupt-parent = <&pioA>;
216 interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
219 };
220 };
221
222 &pmc {
223 atmel,osc-bypass;
224 };
225
226 &qspi1 {
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_qspi1_default>;
229 status = "disabled";
230
231 qspi1_flash: flash@0 {
232 #address-cells = <1>;
233 #size-cells = <1>;
234 compatible = "jedec,spi-nor";
235 reg = <0>;
236 spi-max-frequency = <104000000>;
237 spi-cs-setup-ns = <7>;
238 spi-rx-bus-width = <4>;
239 spi-tx-bus-width = <4>;
240 m25p,fast-read;
241 status = "disabled";
242
243 at91bootstrap@0 {
244 label = "at91bootstrap";
245 reg = <0x0 0x40000>;
246 };
247
248 bootloader@40000 {
249 label = "bootloader";
250 reg = <0x40000 0xc0000>;
251 };
252
253 bootloaderenvred@100000 {
254 label = "bootloader env redundant";
255 reg = <0x100000 0x40000>;
256 };
257
258 bootloaderenv@140000 {
259 label = "bootloader env";
260 reg = <0x140000 0x40000>;
261 };
262
263 dtb@180000 {
264 label = "device tree";
265 reg = <0x180000 0x80000>;
266 };
267
268 kernel@200000 {
269 label = "kernel";
270 reg = <0x200000 0x600000>;
271 };
272 };
273 };
274
275 &pioA {
276 pinctrl_flx1_default: flx1_usart_default {
277 pinmux = <PIN_PA24__FLEXCOM1_IO0>,
278 <PIN_PA23__FLEXCOM1_IO1>,
279 <PIN_PA25__FLEXCOM1_IO3>,
280 <PIN_PA26__FLEXCOM1_IO4>;
281 bias-disable;
282 };
283
284 pinctrl_i2c0_default: i2c0_default {
285 pinmux = <PIN_PD21__TWD0>,
286 <PIN_PD22__TWCK0>;
287 bias-disable;
288 };
289
290 pinctrl_i2c0_gpio: i2c0_gpio {
291 pinmux = <PIN_PD21__GPIO>,
292 <PIN_PD22__GPIO>;
293 bias-disable;
294 };
295
296 pinctrl_i2c1_default: i2c1_default {
297 pinmux = <PIN_PD19__TWD1>,
298 <PIN_PD20__TWCK1>;
299 bias-disable;
300 };
301
302 pinctrl_i2c1_gpio: i2c1_gpio {
303 pinmux = <PIN_PD19__GPIO>,
304 <PIN_PD20__GPIO>;
305 bias-disable;
306 };
307
308 pinctrl_macb0_default: macb0_default {
309 pinmux = <PIN_PB14__GTXCK>,
310 <PIN_PB15__GTXEN>,
311 <PIN_PB16__GRXDV>,
312 <PIN_PB17__GRXER>,
313 <PIN_PB18__GRX0>,
314 <PIN_PB19__GRX1>,
315 <PIN_PB20__GTX0>,
316 <PIN_PB21__GTX1>,
317 <PIN_PB22__GMDC>,
318 <PIN_PB23__GMDIO>;
319 bias-disable;
320 };
321
322 pinctrl_macb0_phy_irq: macb0_phy_irq {
323 pinmux = <PIN_PB24__GPIO>;
324 bias-disable;
325 };
326
327 pinctrl_qspi1_default: qspi1_default {
328 pinmux = <PIN_PB5__QSPI1_SCK>,
329 <PIN_PB6__QSPI1_CS>,
330 <PIN_PB7__QSPI1_IO0>,
331 <PIN_PB8__QSPI1_IO1>,
332 <PIN_PB9__QSPI1_IO2>,
333 <PIN_PB10__QSPI1_IO3>;
334 bias-pull-up;
335 };
336
337 pinctrl_sdmmc1_default: sdmmc1_default {
338 cmd-data {
339 pinmux = <PIN_PA28__SDMMC1_CMD>,
340 <PIN_PA18__SDMMC1_DAT0>,
341 <PIN_PA19__SDMMC1_DAT1>,
342 <PIN_PA20__SDMMC1_DAT2>,
343 <PIN_PA21__SDMMC1_DAT3>;
344 bias-disable;
345 };
346
347 conf-ck {
348 pinmux = <PIN_PA22__SDMMC1_CK>;
349 bias-disable;
350 };
351 };
352
353 pinctrl_wilc_default: wilc_default {
354 conf-irq {
355 pinmux = <PIN_PB25__GPIO>;
356 bias-disable;
357 };
358 };
359
360 pinctrl_wilc_pwrseq: wilc_pwrseq {
361 conf-ce-nrst {
362 pinmux = <PIN_PA27__GPIO>,
363 <PIN_PA29__GPIO>;
364 bias-disable;
365 };
366
367 conf-rtcclk {
368 pinmux = <PIN_PB13__PCK1>;
369 bias-disable;
370 };
371 };
372 };
373
374 &sdmmc1 {
375 #address-cells = <1>;
376 #size-cells = <0>;
377 bus-width = <4>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_sdmmc1_default>;
380 mmc-pwrseq = <&wifi_pwrseq>;
381 no-1-8-v;
382 non-removable;
383 bus-width = <4>;
384 status = "okay";
385
386 wilc: wifi@0 {
387 reg = <0>;
388 compatible = "microchip,wilc1000";
389 pinctrl-names = "default";
390 pinctrl-0 = <&pinctrl_wilc_default>;
391 clocks = <&pmc PMC_TYPE_SYSTEM 9>;
392 clock-names = "rtc";
393 interrupts = <PIN_PB25 IRQ_TYPE_NONE>;
394 interrupt-parent = <&pioA>;
395 assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
396 assigned-clock-rates = <32768>;
397 };
398 };
399
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.