1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
4 *
5 * Copyright (C) 2015 Atmel,
6 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
7 */
8 /dts-v1/;
9 #include "sama5d2.dtsi"
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
15
16 / {
17 model = "Atmel SAMA5D2 Xplained";
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
19
20 aliases {
21 serial0 = &uart1; /* DBGU */
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2; /* XPRO EXT2 */
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 slow_xtal {
33 clock-frequency = <32768>;
34 };
35
36 main_xtal {
37 clock-frequency = <12000000>;
38 };
39 };
40
41 ahb {
42 usb0: gadget@300000 {
43 atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_usba_vbus>;
46 status = "okay";
47 };
48
49 usb1: ohci@400000 {
50 num-ports = <3>;
51 atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */
52 &pioA PIN_PB10 GPIO_ACTIVE_HIGH
53 0
54 >;
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_usb_default>;
57 status = "okay";
58 };
59
60 usb2: ehci@500000 {
61 status = "okay";
62 };
63
64 sdmmc0: sdio-host@a0000000 {
65 bus-width = <8>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_sdmmc0_default>;
68 non-removable;
69 mmc-ddr-3_3v;
70 status = "okay";
71 };
72
73 sdmmc1: sdio-host@b0000000 {
74 bus-width = <4>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_sdmmc1_default>;
77 status = "okay"; /* conflict with qspi0 */
78 vqmmc-supply = <&vdd_3v3_reg>;
79 vmmc-supply = <&vdd_3v3_reg>;
80 };
81
82 apb {
83 qspi0: spi@f0020000 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_qspi0_default>;
86 status = "disabled"; /* conflict with sdmmc1 */
87
88 flash@0 {
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "jedec,spi-nor";
92 reg = <0>;
93 spi-max-frequency = <80000000>;
94 spi-tx-bus-width = <4>;
95 spi-rx-bus-width = <4>;
96 m25p,fast-read;
97
98 at91bootstrap@0 {
99 label = "at91bootstrap";
100 reg = <0x00000000 0x00040000>;
101 };
102
103 bootloader@40000 {
104 label = "bootloader";
105 reg = <0x00040000 0x000c0000>;
106 };
107
108 bootloaderenvred@100000 {
109 label = "bootloader env redundant";
110 reg = <0x00100000 0x00040000>;
111 };
112
113 bootloaderenv@140000 {
114 label = "bootloader env";
115 reg = <0x00140000 0x00040000>;
116 };
117
118 dtb@180000 {
119 label = "device tree";
120 reg = <0x00180000 0x00080000>;
121 };
122
123 kernel@200000 {
124 label = "kernel";
125 reg = <0x00200000 0x00600000>;
126 };
127
128 misc@800000 {
129 label = "misc";
130 reg = <0x00800000 0x00000000>;
131 };
132 };
133 };
134
135 spi0: spi@f8000000 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_spi0_default>;
138 status = "okay";
139
140 flash@0 {
141 compatible = "atmel,at25df321a";
142 reg = <0>;
143 spi-max-frequency = <50000000>;
144 };
145 };
146
147 macb0: ethernet@f8008000 {
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 phy-mode = "rmii";
153 status = "okay";
154
155 ethernet-phy@1 {
156 reg = <0x1>;
157 interrupt-parent = <&pioA>;
158 interrupts = <PIN_PC9 IRQ_TYPE_LEVEL_LOW>;
159 };
160 };
161
162 tcb0: timer@f800c000 {
163 timer0: timer@0 {
164 compatible = "atmel,tcb-timer";
165 reg = <0>;
166 };
167
168 timer1: timer@1 {
169 compatible = "atmel,tcb-timer";
170 reg = <1>;
171 };
172 };
173
174 uart1: serial@f8020000 {
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_uart1_default>;
177 atmel,use-dma-rx;
178 atmel,use-dma-tx;
179 status = "okay";
180 };
181
182 i2c0: i2c@f8028000 {
183 dmas = <0>, <0>;
184 pinctrl-names = "default", "gpio";
185 pinctrl-0 = <&pinctrl_i2c0_default>;
186 pinctrl-1 = <&pinctrl_i2c0_gpio>;
187 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
188 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
189 i2c-sda-hold-time-ns = <350>;
190 status = "okay";
191
192 pmic@5b {
193 compatible = "active-semi,act8945a";
194 reg = <0x5b>;
195 active-semi,vsel-high;
196 status = "okay";
197
198 regulators {
199 vdd_1v35_reg: REG_DCDC1 {
200 regulator-name = "VDD_1V35";
201 regulator-min-microvolt = <1350000>;
202 regulator-max-microvolt = <1350000>;
203 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
204 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
205 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
206 regulator-always-on;
207
208 regulator-state-mem {
209 regulator-on-in-suspend;
210 regulator-suspend-min-microvolt = <1400000>;
211 regulator-suspend-max-microvolt = <1400000>;
212 regulator-changeable-in-suspend;
213 regulator-mode = <ACT8945A_REGULATOR_MODE_LOWPOWER>;
214 };
215 };
216
217 vdd_1v2_reg: REG_DCDC2 {
218 regulator-name = "VDD_1V2";
219 regulator-min-microvolt = <1100000>;
220 regulator-max-microvolt = <1300000>;
221 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
222 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
223 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
224 regulator-always-on;
225
226 regulator-state-mem {
227 regulator-off-in-suspend;
228 };
229 };
230
231 vdd_3v3_reg: REG_DCDC3 {
232 regulator-name = "VDD_3V3";
233 regulator-min-microvolt = <3300000>;
234 regulator-max-microvolt = <3300000>;
235 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
236 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
237 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
238 regulator-always-on;
239
240 regulator-state-mem {
241 regulator-off-in-suspend;
242 };
243 };
244
245 vdd_fuse_reg: REG_LDO1 {
246 regulator-name = "VDD_FUSE";
247 regulator-min-microvolt = <2500000>;
248 regulator-max-microvolt = <2500000>;
249 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
250 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
251 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
252 regulator-always-on;
253
254 regulator-state-mem {
255 regulator-off-in-suspend;
256 };
257 };
258
259 vdd_3v3_lp_reg: REG_LDO2 {
260 regulator-name = "VDD_3V3_LP";
261 regulator-min-microvolt = <3300000>;
262 regulator-max-microvolt = <3300000>;
263 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
264 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
265 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
266 regulator-always-on;
267
268 regulator-state-mem {
269 regulator-off-in-suspend;
270 };
271 };
272
273 vdd_led_reg: REG_LDO3 {
274 regulator-name = "VDD_LED";
275 regulator-min-microvolt = <3300000>;
276 regulator-max-microvolt = <3300000>;
277 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
278 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
279 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
280 regulator-always-on;
281
282 regulator-state-mem {
283 regulator-off-in-suspend;
284 };
285 };
286
287 vdd_sdhc_1v8_reg: REG_LDO4 {
288 regulator-name = "VDD_SDHC_1V8";
289 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <1800000>;
291 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
292 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
293 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
294 regulator-always-on;
295
296 regulator-state-mem {
297 regulator-off-in-suspend;
298 };
299 };
300 };
301
302 charger {
303 compatible = "active-semi,act8945a-charger";
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
306 interrupt-parent = <&pioA>;
307 interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>;
308
309 active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
310 active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
311 active-semi,input-voltage-threshold-microvolt = <6600>;
312 active-semi,precondition-timeout = <40>;
313 active-semi,total-timeout = <3>;
314 status = "okay";
315 };
316 };
317 };
318
319 pwm0: pwm@f802c000 {
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_pwm0_pwm2_default>;
322 status = "disabled"; /* conflict with leds */
323 };
324
325 flx0: flexcom@f8034000 {
326 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
327 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
328
329 uart5: serial@200 {
330 dmas = <0>, <0>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&pinctrl_flx0_default>;
333 status = "okay";
334 };
335
336 i2c2: i2c@600 {
337 dmas = <0>, <0>;
338 pinctrl-names = "default", "gpio";
339 pinctrl-0 = <&pinctrl_flx0_default>;
340 pinctrl-1 = <&pinctrl_i2c2_gpio>;
341 sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
342 scl-gpios = <&pioA PIN_PB29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
343 i2c-sda-hold-time-ns = <350>;
344 i2c-analog-filter;
345 i2c-digital-filter;
346 i2c-digital-filter-width-ns = <35>;
347 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
348 };
349 };
350
351 poweroff@f8048010 {
352 debounce-delay-us = <976>;
353 atmel,wakeup-rtc-timer;
354
355 input@0 {
356 reg = <0>;
357 };
358 };
359
360 watchdog@f8048040 {
361 status = "okay";
362 };
363
364 i2s0: i2s@f8050000 {
365 pinctrl-names = "default";
366 pinctrl-0 = <&pinctrl_i2s0_default>;
367 status = "disabled"; /* conflict with can0 */
368 };
369
370 can0: can@f8054000 {
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_can0_default>;
373 status = "okay";
374 };
375
376 uart3: serial@fc008000 {
377 atmel,use-dma-rx;
378 atmel,use-dma-tx;
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_uart3_default>;
381 status = "okay";
382 };
383
384 flx4: flexcom@fc018000 {
385 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
386 status = "okay";
387
388 i2c6: i2c@600 {
389 dmas = <0>, <0>;
390 pinctrl-names = "default", "gpio";
391 pinctrl-0 = <&pinctrl_flx4_default>;
392 pinctrl-1 = <&pinctrl_flx4_gpio>;
393 sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>;
394 scl-gpios = <&pioA PIN_PD13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
395 i2c-analog-filter;
396 i2c-digital-filter;
397 i2c-digital-filter-width-ns = <35>;
398 status = "okay";
399 };
400 };
401
402 i2c1: i2c@fc028000 {
403 dmas = <0>, <0>;
404 pinctrl-names = "default", "gpio";
405 pinctrl-0 = <&pinctrl_i2c1_default>;
406 i2c-analog-filter;
407 i2c-digital-filter;
408 i2c-digital-filter-width-ns = <35>;
409 pinctrl-1 = <&pinctrl_i2c1_gpio>;
410 sda-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_HIGH>;
411 scl-gpios = <&pioA PIN_PD5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
412 status = "okay";
413
414 at24@54 {
415 compatible = "atmel,24c02";
416 reg = <0x54>;
417 pagesize = <16>;
418 };
419 };
420
421 adc: adc@fc030000 {
422 vddana-supply = <&vdd_3v3_lp_reg>;
423 vref-supply = <&vdd_3v3_lp_reg>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
426 status = "okay";
427 };
428
429 pinctrl@fc038000 {
430 /*
431 * There is no real pinmux for ADC, if the pin
432 * is not requested by another peripheral then
433 * the muxing is done when channel is enabled.
434 * Requesting pins for ADC is GPIO is
435 * encouraged to prevent conflicts and to
436 * disable bias in order to be in the same
437 * state when the pin is not muxed to the adc.
438 */
439 pinctrl_adc_default: adc_default {
440 pinmux = <PIN_PD23__GPIO>;
441 bias-disable;
442 };
443
444 pinctrl_can0_default: can0_default {
445 pinmux = <PIN_PC10__CANTX0>,
446 <PIN_PC11__CANRX0>;
447 bias-disable;
448 };
449
450 pinctrl_can1_default: can1_default {
451 pinmux = <PIN_PC26__CANTX1>,
452 <PIN_PC27__CANRX1>;
453 bias-disable;
454 };
455
456 /*
457 * The ADTRG pin can work on any edge type.
458 * In here it's being pulled up, so need to
459 * connect it to ground to get an edge e.g.
460 * Trigger can be configured on falling, rise
461 * or any edge, and the pull-up can be changed
462 * to pull-down or left floating according to
463 * needs.
464 */
465 pinctrl_adtrg_default: adtrg_default {
466 pinmux = <PIN_PD31__ADTRG>;
467 bias-pull-up;
468 };
469
470 pinctrl_charger_chglev: charger_chglev {
471 pinmux = <PIN_PA12__GPIO>;
472 bias-disable;
473 };
474
475 pinctrl_charger_irq: charger_irq {
476 pinmux = <PIN_PB13__GPIO>;
477 bias-disable;
478 };
479
480 pinctrl_charger_lbo: charger_lbo {
481 pinmux = <PIN_PC8__GPIO>;
482 bias-pull-up;
483 };
484
485 pinctrl_classd_default_pfets: classd_default_pfets {
486 pinmux = <PIN_PB1__CLASSD_R0>,
487 <PIN_PB3__CLASSD_R2>;
488 bias-pull-up;
489 };
490
491 pinctrl_classd_default_nfets: classd_default_nfets {
492 pinmux = <PIN_PB2__CLASSD_R1>,
493 <PIN_PB4__CLASSD_R3>;
494 bias-pull-down;
495 };
496
497 pinctrl_flx0_default: flx0_default {
498 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
499 <PIN_PB29__FLEXCOM0_IO1>;
500 bias-disable;
501 };
502
503 pinctrl_flx4_default: flx4_default {
504 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
505 <PIN_PD13__FLEXCOM4_IO1>;
506 bias-disable;
507 };
508
509 pinctrl_flx4_gpio: flx4_gpio {
510 pinmux = <PIN_PD12__GPIO>,
511 <PIN_PD13__GPIO>;
512 bias-disable;
513 };
514
515 pinctrl_i2c0_default: i2c0_default {
516 pinmux = <PIN_PD21__TWD0>,
517 <PIN_PD22__TWCK0>;
518 bias-disable;
519 };
520
521 pinctrl_i2c0_gpio: i2c0_gpio {
522 pinmux = <PIN_PD21__GPIO>,
523 <PIN_PD22__GPIO>;
524 bias-disable;
525 };
526
527 pinctrl_i2c1_default: i2c1_default {
528 pinmux = <PIN_PD4__TWD1>,
529 <PIN_PD5__TWCK1>;
530 bias-disable;
531 };
532
533 pinctrl_i2c1_gpio: i2c1_gpio {
534 pinmux = <PIN_PD4__GPIO>,
535 <PIN_PD5__GPIO>;
536 bias-disable;
537 };
538
539 pinctrl_i2c2_gpio: i2c2_gpio {
540 pinmux = <PIN_PB28__GPIO>,
541 <PIN_PB29__GPIO>;
542 bias-disable;
543 };
544
545 pinctrl_i2s0_default: i2s0_default {
546 pinmux = <PIN_PC1__I2SC0_CK>,
547 <PIN_PC2__I2SC0_MCK>,
548 <PIN_PC3__I2SC0_WS>,
549 <PIN_PC4__I2SC0_DI0>,
550 <PIN_PC5__I2SC0_DO0>;
551 bias-disable;
552 };
553
554 pinctrl_i2s1_default: i2s1_default {
555 pinmux = <PIN_PA15__I2SC1_CK>,
556 <PIN_PA14__I2SC1_MCK>,
557 <PIN_PA16__I2SC1_WS>,
558 <PIN_PA17__I2SC1_DI0>,
559 <PIN_PA18__I2SC1_DO0>;
560 bias-disable;
561 };
562
563 pinctrl_key_gpio_default: key_gpio_default {
564 pinmux = <PIN_PB9__GPIO>;
565 bias-pull-up;
566 };
567
568 pinctrl_led_gpio_default: led_gpio_default {
569 pinmux = <PIN_PB0__GPIO>,
570 <PIN_PB5__GPIO>,
571 <PIN_PB6__GPIO>;
572 bias-pull-up;
573 };
574
575 pinctrl_macb0_default: macb0_default {
576 pinmux = <PIN_PB14__GTXCK>,
577 <PIN_PB15__GTXEN>,
578 <PIN_PB16__GRXDV>,
579 <PIN_PB17__GRXER>,
580 <PIN_PB18__GRX0>,
581 <PIN_PB19__GRX1>,
582 <PIN_PB20__GTX0>,
583 <PIN_PB21__GTX1>,
584 <PIN_PB22__GMDC>,
585 <PIN_PB23__GMDIO>;
586 bias-disable;
587 };
588
589 pinctrl_macb0_phy_irq: macb0_phy_irq {
590 pinmux = <PIN_PC9__GPIO>;
591 bias-disable;
592 };
593
594 pinctrl_qspi0_default: qspi0_default {
595 sck_cs {
596 pinmux = <PIN_PA22__QSPI0_SCK>,
597 <PIN_PA23__QSPI0_CS>;
598 bias-disable;
599 };
600
601 data {
602 pinmux = <PIN_PA24__QSPI0_IO0>,
603 <PIN_PA25__QSPI0_IO1>,
604 <PIN_PA26__QSPI0_IO2>,
605 <PIN_PA27__QSPI0_IO3>;
606 bias-pull-up;
607 };
608 };
609
610 pinctrl_sdmmc0_default: sdmmc0_default {
611 cmd_data {
612 pinmux = <PIN_PA1__SDMMC0_CMD>,
613 <PIN_PA2__SDMMC0_DAT0>,
614 <PIN_PA3__SDMMC0_DAT1>,
615 <PIN_PA4__SDMMC0_DAT2>,
616 <PIN_PA5__SDMMC0_DAT3>,
617 <PIN_PA6__SDMMC0_DAT4>,
618 <PIN_PA7__SDMMC0_DAT5>,
619 <PIN_PA8__SDMMC0_DAT6>,
620 <PIN_PA9__SDMMC0_DAT7>;
621 bias-disable;
622 };
623
624 ck_cd_rstn {
625 pinmux = <PIN_PA0__SDMMC0_CK>,
626 <PIN_PA10__SDMMC0_RSTN>,
627 <PIN_PA13__SDMMC0_CD>;
628 bias-disable;
629 };
630 };
631
632 pinctrl_sdmmc1_default: sdmmc1_default {
633 cmd_data {
634 pinmux = <PIN_PA28__SDMMC1_CMD>,
635 <PIN_PA18__SDMMC1_DAT0>,
636 <PIN_PA19__SDMMC1_DAT1>,
637 <PIN_PA20__SDMMC1_DAT2>,
638 <PIN_PA21__SDMMC1_DAT3>;
639 bias-disable;
640 };
641
642 conf-ck_cd {
643 pinmux = <PIN_PA22__SDMMC1_CK>,
644 <PIN_PA30__SDMMC1_CD>;
645 bias-disable;
646 };
647 };
648
649 pinctrl_spi0_default: spi0_default {
650 pinmux = <PIN_PA14__SPI0_SPCK>,
651 <PIN_PA15__SPI0_MOSI>,
652 <PIN_PA16__SPI0_MISO>,
653 <PIN_PA17__SPI0_NPCS0>;
654 bias-disable;
655 };
656
657 pinctrl_uart1_default: uart1_default {
658 pinmux = <PIN_PD2__URXD1>,
659 <PIN_PD3__UTXD1>;
660 bias-disable;
661 };
662
663 pinctrl_uart3_default: uart3_default {
664 pinmux = <PIN_PB11__URXD3>,
665 <PIN_PB12__UTXD3>;
666 bias-disable;
667 };
668
669 pinctrl_usb_default: usb_default {
670 pinmux = <PIN_PB10__GPIO>;
671 bias-disable;
672 };
673
674 pinctrl_usba_vbus: usba_vbus {
675 pinmux = <PIN_PA31__GPIO>;
676 bias-disable;
677 };
678
679 pinctrl_pwm0_pwm2_default: pwm0_pwm2_default {
680 pinmux = <PIN_PB5__PWMH2>,
681 <PIN_PB6__PWML2>;
682 bias-pull-up;
683 };
684 };
685
686 classd: classd@fc048000 {
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_classd_default_pfets &pinctrl_classd_default_nfets>;
689 atmel,pwm-type = "diff";
690 atmel,non-overlap-time = <10>;
691 status = "okay";
692 };
693
694 i2s1: i2s@fc04c000 {
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_i2s1_default>;
697 status = "disabled"; /* conflict with spi0, sdmmc1 */
698 };
699
700 can1: can@fc050000 {
701 pinctrl-names = "default";
702 pinctrl-0 = <&pinctrl_can1_default>;
703 status = "okay";
704 };
705 };
706 };
707
708 gpio-keys {
709 compatible = "gpio-keys";
710
711 pinctrl-names = "default";
712 pinctrl-0 = <&pinctrl_key_gpio_default>;
713
714 button {
715 label = "PB_USER";
716 gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>;
717 linux,code = <KEY_PROG1>;
718 wakeup-source;
719 };
720 };
721
722 leds {
723 compatible = "gpio-leds";
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_led_gpio_default>;
726 status = "okay"; /* conflict with pwm0 */
727
728 led-red {
729 label = "red";
730 gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>;
731 };
732
733
734 led-green {
735 label = "green";
736 gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>;
737 };
738
739 led-blue {
740 label = "blue";
741 gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>;
742 linux,default-trigger = "heartbeat";
743 };
744 };
745 };
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