1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6
7 / {
8 model = "NVIDIA Seaboard";
9 compatible = "nvidia,seaboard", "nvidia,tegra20";
10
11 aliases {
12 rtc0 = "/i2c@7000d000/tps6586x@34";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uartd;
15 };
16
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
20
21 memory@0 {
22 reg = <0x00000000 0x40000000>;
23 };
24
25 host1x@50000000 {
26 dc@54200000 {
27 rgb {
28 status = "okay";
29
30 nvidia,panel = <&panel>;
31 };
32 };
33
34 hdmi@54280000 {
35 status = "okay";
36
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
40
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
46
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
50
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata";
54 nvidia,function = "ide";
55 };
56 atb {
57 nvidia,pins = "atb", "gma", "gme";
58 nvidia,function = "sdio4";
59 };
60 atc {
61 nvidia,pins = "atc";
62 nvidia,function = "nand";
63 };
64 atd {
65 nvidia,pins = "atd", "ate", "gmb", "spia",
66 "spib", "spic";
67 nvidia,function = "gmi";
68 };
69 cdev1 {
70 nvidia,pins = "cdev1";
71 nvidia,function = "plla_out";
72 };
73 cdev2 {
74 nvidia,pins = "cdev2";
75 nvidia,function = "pllp_out4";
76 };
77 crtp {
78 nvidia,pins = "crtp", "lm1";
79 nvidia,function = "crt";
80 };
81 csus {
82 nvidia,pins = "csus";
83 nvidia,function = "vi_sensor_clk";
84 };
85 dap1 {
86 nvidia,pins = "dap1";
87 nvidia,function = "dap1";
88 };
89 dap2 {
90 nvidia,pins = "dap2";
91 nvidia,function = "dap2";
92 };
93 dap3 {
94 nvidia,pins = "dap3";
95 nvidia,function = "dap3";
96 };
97 dap4 {
98 nvidia,pins = "dap4";
99 nvidia,function = "dap4";
100 };
101 dta {
102 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
103 nvidia,function = "vi";
104 };
105 dtf {
106 nvidia,pins = "dtf";
107 nvidia,function = "i2c3";
108 };
109 gmc {
110 nvidia,pins = "gmc";
111 nvidia,function = "uartd";
112 };
113 gmd {
114 nvidia,pins = "gmd";
115 nvidia,function = "sflash";
116 };
117 gpu {
118 nvidia,pins = "gpu";
119 nvidia,function = "pwm";
120 };
121 gpu7 {
122 nvidia,pins = "gpu7";
123 nvidia,function = "rtck";
124 };
125 gpv {
126 nvidia,pins = "gpv", "slxa", "slxk";
127 nvidia,function = "pcie";
128 };
129 hdint {
130 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
131 "lsck", "lsda";
132 nvidia,function = "hdmi";
133 };
134 i2cp {
135 nvidia,pins = "i2cp";
136 nvidia,function = "i2cp";
137 };
138 irrx {
139 nvidia,pins = "irrx", "irtx";
140 nvidia,function = "uartb";
141 };
142 kbca {
143 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
144 "kbce", "kbcf";
145 nvidia,function = "kbc";
146 };
147 lcsn {
148 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
149 "lsdi", "lvp0";
150 nvidia,function = "rsvd4";
151 };
152 ld0 {
153 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
154 "ld5", "ld6", "ld7", "ld8", "ld9",
155 "ld10", "ld11", "ld12", "ld13", "ld14",
156 "ld15", "ld16", "ld17", "ldi", "lhp0",
157 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
158 "lspi", "lvp1", "lvs";
159 nvidia,function = "displaya";
160 };
161 owc {
162 nvidia,pins = "owc", "spdi", "spdo", "uac";
163 nvidia,function = "rsvd2";
164 };
165 pmc {
166 nvidia,pins = "pmc";
167 nvidia,function = "pwr_on";
168 };
169 rm {
170 nvidia,pins = "rm";
171 nvidia,function = "i2c1";
172 };
173 sdb {
174 nvidia,pins = "sdb", "sdc", "sdd";
175 nvidia,function = "sdio3";
176 };
177 sdio1 {
178 nvidia,pins = "sdio1";
179 nvidia,function = "sdio1";
180 };
181 slxc {
182 nvidia,pins = "slxc", "slxd";
183 nvidia,function = "spdif";
184 };
185 spid {
186 nvidia,pins = "spid", "spie", "spif";
187 nvidia,function = "spi1";
188 };
189 spig {
190 nvidia,pins = "spig", "spih";
191 nvidia,function = "spi2_alt";
192 };
193 uaa {
194 nvidia,pins = "uaa", "uab", "uda";
195 nvidia,function = "ulpi";
196 };
197 uad {
198 nvidia,pins = "uad";
199 nvidia,function = "irda";
200 };
201 uca {
202 nvidia,pins = "uca", "ucb";
203 nvidia,function = "uartc";
204 };
205 conf_ata {
206 nvidia,pins = "ata", "atb", "atc", "atd",
207 "cdev1", "cdev2", "dap1", "dap2",
208 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
209 "gme", "gpu", "gpu7", "i2cp", "irrx",
210 "irtx", "pta", "rm", "sdc", "sdd",
211 "slxd", "slxk", "spdi", "spdo", "uac",
212 "uad", "uca", "ucb", "uda";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215 };
216 conf_ate {
217 nvidia,pins = "ate", "csus", "dap3",
218 "gpv", "owc", "slxc", "spib", "spid",
219 "spie";
220 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221 nvidia,tristate = <TEGRA_PIN_ENABLE>;
222 };
223 conf_ck32 {
224 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
225 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 };
228 conf_crtp {
229 nvidia,pins = "crtp", "gmb", "slxa", "spia",
230 "spig", "spih";
231 nvidia,pull = <TEGRA_PIN_PULL_UP>;
232 nvidia,tristate = <TEGRA_PIN_ENABLE>;
233 };
234 conf_dta {
235 nvidia,pins = "dta", "dtb", "dtc", "dtd";
236 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
237 nvidia,tristate = <TEGRA_PIN_DISABLE>;
238 };
239 conf_dte {
240 nvidia,pins = "dte", "spif";
241 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
242 nvidia,tristate = <TEGRA_PIN_ENABLE>;
243 };
244 conf_hdint {
245 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
246 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
247 "lvp0";
248 nvidia,tristate = <TEGRA_PIN_ENABLE>;
249 };
250 conf_kbca {
251 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
252 "kbce", "kbcf", "sdio1", "spic", "uaa",
253 "uab";
254 nvidia,pull = <TEGRA_PIN_PULL_UP>;
255 nvidia,tristate = <TEGRA_PIN_DISABLE>;
256 };
257 conf_lc {
258 nvidia,pins = "lc", "ls";
259 nvidia,pull = <TEGRA_PIN_PULL_UP>;
260 };
261 conf_ld0 {
262 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
263 "ld5", "ld6", "ld7", "ld8", "ld9",
264 "ld10", "ld11", "ld12", "ld13", "ld14",
265 "ld15", "ld16", "ld17", "ldi", "lhp0",
266 "lhp1", "lhp2", "lhs", "lm0", "lpp",
267 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
268 "lvs", "pmc", "sdb";
269 nvidia,tristate = <TEGRA_PIN_DISABLE>;
270 };
271 conf_ld17_0 {
272 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
273 "ld23_22";
274 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
275 };
276 drive_sdio1 {
277 nvidia,pins = "drive_sdio1";
278 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
279 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
280 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
281 nvidia,pull-down-strength = <31>;
282 nvidia,pull-up-strength = <31>;
283 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
284 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
285 };
286 };
287
288 state_i2cmux_ddc: pinmux-i2cmux-ddc {
289 ddc {
290 nvidia,pins = "ddc";
291 nvidia,function = "i2c2";
292 };
293 pta {
294 nvidia,pins = "pta";
295 nvidia,function = "rsvd4";
296 };
297 };
298
299 state_i2cmux_idle: pinmux-i2cmux-idle {
300 ddc {
301 nvidia,pins = "ddc";
302 nvidia,function = "rsvd4";
303 };
304 pta {
305 nvidia,pins = "pta";
306 nvidia,function = "rsvd4";
307 };
308 };
309
310 state_i2cmux_pta: pinmux-i2cmux-pta {
311 ddc {
312 nvidia,pins = "ddc";
313 nvidia,function = "rsvd4";
314 };
315 pta {
316 nvidia,pins = "pta";
317 nvidia,function = "i2c2";
318 };
319 };
320 };
321
322 i2s@70002800 {
323 status = "okay";
324 };
325
326 serial@70006300 {
327 /delete-property/ dmas;
328 /delete-property/ dma-names;
329 status = "okay";
330 };
331
332 pwm: pwm@7000a000 {
333 status = "okay";
334 };
335
336 i2c@7000c000 {
337 status = "okay";
338 clock-frequency = <400000>;
339
340 wm8903: wm8903@1a {
341 compatible = "wlf,wm8903";
342 reg = <0x1a>;
343 interrupt-parent = <&gpio>;
344 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
345
346 gpio-controller;
347 #gpio-cells = <2>;
348
349 micdet-cfg = <0>;
350 micdet-delay = <100>;
351 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
352 };
353
354 /* ALS and proximity sensor */
355 isl29018@44 {
356 compatible = "isil,isl29018";
357 reg = <0x44>;
358 interrupt-parent = <&gpio>;
359 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
360 };
361
362 gyrometer@68 {
363 compatible = "invensense,mpu3050";
364 reg = <0x68>;
365 interrupt-parent = <&gpio>;
366 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
367 };
368 };
369
370 i2c@7000c400 {
371 status = "okay";
372 clock-frequency = <100000>;
373 };
374
375 i2c@7000c500 {
376 status = "okay";
377 clock-frequency = <400000>;
378 };
379
380 i2c@7000d000 {
381 status = "okay";
382 clock-frequency = <400000>;
383
384 magnetometer@c {
385 compatible = "asahi-kasei,ak8975";
386 reg = <0xc>;
387 interrupt-parent = <&gpio>;
388 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
389 };
390
391 pmic: tps6586x@34 {
392 compatible = "ti,tps6586x";
393 reg = <0x34>;
394 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
395
396 ti,system-power-controller;
397
398 #gpio-cells = <2>;
399 gpio-controller;
400
401 sys-supply = <&vdd_5v0_reg>;
402 vin-sm0-supply = <&sys_reg>;
403 vin-sm1-supply = <&sys_reg>;
404 vin-sm2-supply = <&sys_reg>;
405 vinldo01-supply = <&sm2_reg>;
406 vinldo23-supply = <&sm2_reg>;
407 vinldo4-supply = <&sm2_reg>;
408 vinldo678-supply = <&sm2_reg>;
409 vinldo9-supply = <&sm2_reg>;
410
411 regulators {
412 sys_reg: sys {
413 regulator-name = "vdd_sys";
414 regulator-always-on;
415 };
416
417 vdd_core: sm0 {
418 regulator-name = "vdd_sm0,vdd_core";
419 regulator-min-microvolt = <1300000>;
420 regulator-max-microvolt = <1300000>;
421 regulator-always-on;
422 };
423
424 sm1 {
425 regulator-name = "vdd_sm1,vdd_cpu";
426 regulator-min-microvolt = <1125000>;
427 regulator-max-microvolt = <1125000>;
428 regulator-always-on;
429 };
430
431 sm2_reg: sm2 {
432 regulator-name = "vdd_sm2,vin_ldo*";
433 regulator-min-microvolt = <3700000>;
434 regulator-max-microvolt = <3700000>;
435 regulator-always-on;
436 };
437
438 /* LDO0 is not connected to anything */
439
440 ldo1 {
441 regulator-name = "vdd_ldo1,avdd_pll*";
442 regulator-min-microvolt = <1100000>;
443 regulator-max-microvolt = <1100000>;
444 regulator-always-on;
445 };
446
447 ldo2 {
448 regulator-name = "vdd_ldo2,vdd_rtc";
449 regulator-min-microvolt = <1200000>;
450 regulator-max-microvolt = <1200000>;
451 };
452
453 ldo3 {
454 regulator-name = "vdd_ldo3,avdd_usb*";
455 regulator-min-microvolt = <3300000>;
456 regulator-max-microvolt = <3300000>;
457 regulator-always-on;
458 };
459
460 ldo4 {
461 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <1800000>;
464 regulator-always-on;
465 };
466
467 ldo5 {
468 regulator-name = "vdd_ldo5,vcore_mmc";
469 regulator-min-microvolt = <2850000>;
470 regulator-max-microvolt = <2850000>;
471 regulator-always-on;
472 };
473
474 ldo6 {
475 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
476 regulator-min-microvolt = <1800000>;
477 regulator-max-microvolt = <1800000>;
478 };
479
480 hdmi_vdd_reg: ldo7 {
481 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
482 regulator-min-microvolt = <3300000>;
483 regulator-max-microvolt = <3300000>;
484 };
485
486 hdmi_pll_reg: ldo8 {
487 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
488 regulator-min-microvolt = <1800000>;
489 regulator-max-microvolt = <1800000>;
490 };
491
492 ldo9 {
493 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
494 regulator-min-microvolt = <2850000>;
495 regulator-max-microvolt = <2850000>;
496 regulator-always-on;
497 };
498
499 ldo_rtc {
500 regulator-name = "vdd_rtc_out,vdd_cell";
501 regulator-min-microvolt = <3300000>;
502 regulator-max-microvolt = <3300000>;
503 regulator-always-on;
504 };
505 };
506 };
507
508 temperature-sensor@4c {
509 compatible = "onnn,nct1008";
510 reg = <0x4c>;
511 };
512 };
513
514 kbc@7000e200 {
515 status = "okay";
516 nvidia,debounce-delay-ms = <32>;
517 nvidia,repeat-delay-ms = <160>;
518 nvidia,ghost-filter;
519 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
520 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
521 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
522 MATRIX_KEY(0x00, 0x03, KEY_S)
523 MATRIX_KEY(0x00, 0x04, KEY_A)
524 MATRIX_KEY(0x00, 0x05, KEY_Z)
525 MATRIX_KEY(0x00, 0x07, KEY_FN)
526
527 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
528 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
529 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
530
531 MATRIX_KEY(0x03, 0x00, KEY_5)
532 MATRIX_KEY(0x03, 0x01, KEY_4)
533 MATRIX_KEY(0x03, 0x02, KEY_R)
534 MATRIX_KEY(0x03, 0x03, KEY_E)
535 MATRIX_KEY(0x03, 0x04, KEY_F)
536 MATRIX_KEY(0x03, 0x05, KEY_D)
537 MATRIX_KEY(0x03, 0x06, KEY_X)
538
539 MATRIX_KEY(0x04, 0x00, KEY_7)
540 MATRIX_KEY(0x04, 0x01, KEY_6)
541 MATRIX_KEY(0x04, 0x02, KEY_T)
542 MATRIX_KEY(0x04, 0x03, KEY_H)
543 MATRIX_KEY(0x04, 0x04, KEY_G)
544 MATRIX_KEY(0x04, 0x05, KEY_V)
545 MATRIX_KEY(0x04, 0x06, KEY_C)
546 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
547
548 MATRIX_KEY(0x05, 0x00, KEY_9)
549 MATRIX_KEY(0x05, 0x01, KEY_8)
550 MATRIX_KEY(0x05, 0x02, KEY_U)
551 MATRIX_KEY(0x05, 0x03, KEY_Y)
552 MATRIX_KEY(0x05, 0x04, KEY_J)
553 MATRIX_KEY(0x05, 0x05, KEY_N)
554 MATRIX_KEY(0x05, 0x06, KEY_B)
555 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
556
557 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
558 MATRIX_KEY(0x06, 0x01, KEY_0)
559 MATRIX_KEY(0x06, 0x02, KEY_O)
560 MATRIX_KEY(0x06, 0x03, KEY_I)
561 MATRIX_KEY(0x06, 0x04, KEY_L)
562 MATRIX_KEY(0x06, 0x05, KEY_K)
563 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
564 MATRIX_KEY(0x06, 0x07, KEY_M)
565
566 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
567 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
568 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
569 MATRIX_KEY(0x07, 0x07, KEY_MENU)
570
571 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
572 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
573
574 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
575 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
576
577 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
578 MATRIX_KEY(0x0B, 0x01, KEY_P)
579 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
580 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
581 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
582 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
583
584 MATRIX_KEY(0x0C, 0x00, KEY_F10)
585 MATRIX_KEY(0x0C, 0x01, KEY_F9)
586 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
587 MATRIX_KEY(0x0C, 0x03, KEY_3)
588 MATRIX_KEY(0x0C, 0x04, KEY_2)
589 MATRIX_KEY(0x0C, 0x05, KEY_UP)
590 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
591 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
592
593 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
594 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
595 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
596 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
597 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
598 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
599 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
600
601 MATRIX_KEY(0x0E, 0x00, KEY_F11)
602 MATRIX_KEY(0x0E, 0x01, KEY_F12)
603 MATRIX_KEY(0x0E, 0x02, KEY_F8)
604 MATRIX_KEY(0x0E, 0x03, KEY_Q)
605 MATRIX_KEY(0x0E, 0x04, KEY_F4)
606 MATRIX_KEY(0x0E, 0x05, KEY_F3)
607 MATRIX_KEY(0x0E, 0x06, KEY_1)
608 MATRIX_KEY(0x0E, 0x07, KEY_F7)
609
610 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
611 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
612 MATRIX_KEY(0x0F, 0x02, KEY_F5)
613 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
614 MATRIX_KEY(0x0F, 0x04, KEY_F1)
615 MATRIX_KEY(0x0F, 0x05, KEY_F2)
616 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
617 MATRIX_KEY(0x0F, 0x07, KEY_F6)
618
619 /* Software Handled Function Keys */
620 MATRIX_KEY(0x14, 0x00, KEY_KP7)
621
622 MATRIX_KEY(0x15, 0x00, KEY_KP9)
623 MATRIX_KEY(0x15, 0x01, KEY_KP8)
624 MATRIX_KEY(0x15, 0x02, KEY_KP4)
625 MATRIX_KEY(0x15, 0x04, KEY_KP1)
626
627 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
628 MATRIX_KEY(0x16, 0x02, KEY_KP6)
629 MATRIX_KEY(0x16, 0x03, KEY_KP5)
630 MATRIX_KEY(0x16, 0x04, KEY_KP3)
631 MATRIX_KEY(0x16, 0x05, KEY_KP2)
632 MATRIX_KEY(0x16, 0x07, KEY_KP0)
633
634 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
635 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
636 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
637 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
638
639 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
640
641 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
642 MATRIX_KEY(0x1D, 0x04, KEY_END)
643 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
644 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
645 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
646
647 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
648 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
649 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
650
651 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
652 };
653
654 pmc@7000e400 {
655 nvidia,invert-interrupt;
656 nvidia,suspend-mode = <1>;
657 nvidia,cpu-pwr-good-time = <5000>;
658 nvidia,cpu-pwr-off-time = <5000>;
659 nvidia,core-pwr-good-time = <3845 3845>;
660 nvidia,core-pwr-off-time = <3875>;
661 nvidia,sys-clock-req-active-high;
662 core-supply = <&vdd_core>;
663 };
664
665 memory-controller@7000f400 {
666 emc-table@190000 {
667 reg = <190000>;
668 compatible = "nvidia,tegra20-emc-table";
669 clock-frequency = <190000>;
670 nvidia,emc-registers = <0x0000000c 0x00000026
671 0x00000009 0x00000003 0x00000004 0x00000004
672 0x00000002 0x0000000c 0x00000003 0x00000003
673 0x00000002 0x00000001 0x00000004 0x00000005
674 0x00000004 0x00000009 0x0000000d 0x0000059f
675 0x00000000 0x00000003 0x00000003 0x00000003
676 0x00000003 0x00000001 0x0000000b 0x000000c8
677 0x00000003 0x00000007 0x00000004 0x0000000f
678 0x00000002 0x00000000 0x00000000 0x00000002
679 0x00000000 0x00000000 0x00000083 0xa06204ae
680 0x007dc010 0x00000000 0x00000000 0x00000000
681 0x00000000 0x00000000 0x00000000 0x00000000>;
682 };
683
684 emc-table@380000 {
685 reg = <380000>;
686 compatible = "nvidia,tegra20-emc-table";
687 clock-frequency = <380000>;
688 nvidia,emc-registers = <0x00000017 0x0000004b
689 0x00000012 0x00000006 0x00000004 0x00000005
690 0x00000003 0x0000000c 0x00000006 0x00000006
691 0x00000003 0x00000001 0x00000004 0x00000005
692 0x00000004 0x00000009 0x0000000d 0x00000b5f
693 0x00000000 0x00000003 0x00000003 0x00000006
694 0x00000006 0x00000001 0x00000011 0x000000c8
695 0x00000003 0x0000000e 0x00000007 0x0000000f
696 0x00000002 0x00000000 0x00000000 0x00000002
697 0x00000000 0x00000000 0x00000083 0xe044048b
698 0x007d8010 0x00000000 0x00000000 0x00000000
699 0x00000000 0x00000000 0x00000000 0x00000000>;
700 };
701 };
702
703 usb@c5000000 {
704 status = "okay";
705 dr_mode = "otg";
706 };
707
708 usb-phy@c5000000 {
709 status = "okay";
710 vbus-supply = <&vbus_reg>;
711 dr_mode = "otg";
712 };
713
714 usb@c5004000 {
715 status = "okay";
716 };
717
718 usb-phy@c5004000 {
719 status = "okay";
720 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
721 GPIO_ACTIVE_LOW>;
722 };
723
724 usb@c5008000 {
725 status = "okay";
726 };
727
728 usb-phy@c5008000 {
729 status = "okay";
730 };
731
732 mmc@c8000000 {
733 status = "okay";
734 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
735 bus-width = <4>;
736 keep-power-in-suspend;
737 };
738
739 mmc@c8000400 {
740 status = "okay";
741 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
742 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
743 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
744 bus-width = <4>;
745 };
746
747 mmc@c8000600 {
748 status = "okay";
749 bus-width = <8>;
750 non-removable;
751 };
752
753 backlight: backlight {
754 compatible = "pwm-backlight";
755
756 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
757 power-supply = <&vdd_bl_reg>;
758 pwms = <&pwm 2 5000000>;
759
760 brightness-levels = <0 4 8 16 32 64 128 255>;
761 default-brightness-level = <6>;
762 };
763
764 clk32k_in: clock-32k {
765 compatible = "fixed-clock";
766 clock-frequency = <32768>;
767 #clock-cells = <0>;
768 };
769
770 gpio-keys {
771 compatible = "gpio-keys";
772
773 key-power {
774 label = "Power";
775 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
776 linux,code = <KEY_POWER>;
777 wakeup-source;
778 };
779
780 switch-lid {
781 label = "Lid";
782 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
783 linux,input-type = <5>; /* EV_SW */
784 linux,code = <0>; /* SW_LID */
785 debounce-interval = <1>;
786 wakeup-source;
787 };
788 };
789
790 i2cmux {
791 compatible = "i2c-mux-pinctrl";
792 #address-cells = <1>;
793 #size-cells = <0>;
794
795 i2c-parent = <&{/i2c@7000c400}>;
796
797 pinctrl-names = "ddc", "pta", "idle";
798 pinctrl-0 = <&state_i2cmux_ddc>;
799 pinctrl-1 = <&state_i2cmux_pta>;
800 pinctrl-2 = <&state_i2cmux_idle>;
801
802 hdmi_ddc: i2c@0 {
803 reg = <0>;
804 #address-cells = <1>;
805 #size-cells = <0>;
806 };
807
808 lvds_ddc: i2c@1 {
809 reg = <1>;
810 #address-cells = <1>;
811 #size-cells = <0>;
812
813 smart-battery@b {
814 compatible = "ti,bq20z75", "sbs,sbs-battery";
815 reg = <0xb>;
816 sbs,i2c-retry-count = <2>;
817 sbs,poll-retry-count = <10>;
818 };
819 };
820 };
821
822 panel: panel {
823 compatible = "chunghwa,claa101wa01a";
824
825 power-supply = <&vdd_pnl_reg>;
826 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
827
828 backlight = <&backlight>;
829 ddc-i2c-bus = <&lvds_ddc>;
830 };
831
832 vdd_5v0_reg: regulator-5v0 {
833 compatible = "regulator-fixed";
834 regulator-name = "vdd_5v0";
835 regulator-min-microvolt = <5000000>;
836 regulator-max-microvolt = <5000000>;
837 regulator-always-on;
838 };
839
840 regulator-1v5 {
841 compatible = "regulator-fixed";
842 regulator-name = "vdd_1v5";
843 regulator-min-microvolt = <1500000>;
844 regulator-max-microvolt = <1500000>;
845 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
846 };
847
848 regulator-1v2 {
849 compatible = "regulator-fixed";
850 regulator-name = "vdd_1v2";
851 regulator-min-microvolt = <1200000>;
852 regulator-max-microvolt = <1200000>;
853 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
854 enable-active-high;
855 };
856
857 vbus_reg: regulator-vbus {
858 compatible = "regulator-fixed";
859 regulator-name = "vdd_vbus_wup1";
860 regulator-min-microvolt = <5000000>;
861 regulator-max-microvolt = <5000000>;
862 enable-active-high;
863 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
864 regulator-always-on;
865 regulator-boot-on;
866 };
867
868 vdd_pnl_reg: regulator-pnl {
869 compatible = "regulator-fixed";
870 regulator-name = "vdd_pnl";
871 regulator-min-microvolt = <2800000>;
872 regulator-max-microvolt = <2800000>;
873 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
874 enable-active-high;
875 };
876
877 vdd_bl_reg: regulator-bl {
878 compatible = "regulator-fixed";
879 regulator-name = "vdd_bl";
880 regulator-min-microvolt = <2800000>;
881 regulator-max-microvolt = <2800000>;
882 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
883 enable-active-high;
884 };
885
886 vdd_hdmi: regulator-hdmi {
887 compatible = "regulator-fixed";
888 regulator-name = "VDDIO_HDMI";
889 regulator-min-microvolt = <5000000>;
890 regulator-max-microvolt = <5000000>;
891 gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
892 enable-active-high;
893 vin-supply = <&vdd_5v0_reg>;
894 };
895
896 sound {
897 compatible = "nvidia,tegra-audio-wm8903-seaboard",
898 "nvidia,tegra-audio-wm8903";
899 nvidia,model = "NVIDIA Tegra Seaboard";
900
901 nvidia,audio-routing =
902 "Headphone Jack", "HPOUTR",
903 "Headphone Jack", "HPOUTL",
904 "Int Spk", "ROP",
905 "Int Spk", "RON",
906 "Int Spk", "LOP",
907 "Int Spk", "LON",
908 "Mic Jack", "MICBIAS",
909 "IN1R", "Mic Jack";
910
911 nvidia,i2s-controller = <&tegra_i2s1>;
912 nvidia,audio-codec = <&wm8903>;
913
914 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
915 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
916
917 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
918 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
919 <&tegra_car TEGRA20_CLK_CDEV1>;
920 clock-names = "pll_a", "pll_a_out0", "mclk";
921 };
922 };
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