1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4 */
5
6 /dts-v1/;
7 #include "imx51-eukrea-cpuimx51.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9
10 / {
11 model = "Eukrea CPUIMX51";
12 compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
13
14 clocks {
15 clk24M: can_clock {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <24000000>;
19 };
20 };
21
22 gpio_keys {
23 compatible = "gpio-keys";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpiokeys_1>;
26
27 button-1 {
28 label = "BP1";
29 gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
30 linux,code = <256>;
31 wakeup-source;
32 linux,input-type = <1>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_gpioled>;
40
41 led1 {
42 label = "led1";
43 gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
44 linux,default-trigger = "heartbeat";
45 };
46 };
47
48 reg_can: regulator-can {
49 compatible = "regulator-fixed";
50 regulator-name = "CAN_RST";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
54 startup-delay-us = <20000>;
55 enable-active-high;
56 };
57
58 sound {
59 compatible = "eukrea,asoc-tlv320";
60 eukrea,model = "imx51-eukrea-tlv320aic23";
61 ssi-controller = <&ssi2>;
62 fsl,mux-int-port = <2>;
63 fsl,mux-ext-port = <3>;
64 };
65
66 usbphy1: usbphy1 {
67 compatible = "usb-nop-xceiv";
68 clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
69 clock-names = "main_clk";
70 clock-frequency = <19200000>;
71 #phy-cells = <0>;
72 };
73 };
74
75 &audmux {
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_audmux>;
78 status = "okay";
79 };
80
81 &esdhc1 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
84 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
85 status = "okay";
86 };
87
88 &ecspi1 {
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_ecspi1>;
91 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
92 status = "okay";
93
94 can0: can@0 {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_can>;
97 compatible = "microchip,mcp2515";
98 reg = <0>;
99 clocks = <&clk24M>;
100 spi-max-frequency = <10000000>;
101 interrupt-parent = <&gpio1>;
102 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
103 vdd-supply = <®_can>;
104 };
105 };
106
107 &i2c1 {
108 tlv320aic23: codec@1a {
109 compatible = "ti,tlv320aic23";
110 reg = <0x1a>;
111 };
112 };
113
114 &iomuxc {
115 imx51-eukrea {
116 pinctrl_audmux: audmuxgrp {
117 fsl,pins = <
118 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
119 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
120 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
121 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
122 >;
123 };
124
125
126 pinctrl_can: cangrp {
127 fsl,pins = <
128 MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
129 MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
130 >;
131 };
132
133 pinctrl_ecspi1: ecspi1grp {
134 fsl,pins = <
135 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
136 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
137 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
138 MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
139 >;
140 };
141
142 pinctrl_esdhc1: esdhc1grp {
143 fsl,pins = <
144 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
145 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
146 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
147 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
148 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
149 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
150 >;
151 };
152
153 pinctrl_uart1: uart1grp {
154 fsl,pins = <
155 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
156 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
157 >;
158 };
159
160 pinctrl_uart3: uart3grp {
161 fsl,pins = <
162 MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
163 MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
164 >;
165 };
166
167 pinctrl_uart3_rtscts: uart3rtsctsgrp {
168 fsl,pins = <
169 MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
170 MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
171 >;
172 };
173
174 pinctrl_backlight_1: backlightgrp-1 {
175 fsl,pins = <
176 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
177 >;
178 };
179
180 pinctrl_esdhc1_cd: esdhc1_cd {
181 fsl,pins = <
182 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
183 >;
184 };
185
186 pinctrl_gpiokeys_1: gpiokeysgrp-1 {
187 fsl,pins = <
188 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
189 >;
190 };
191
192 pinctrl_gpioled: gpioledgrp-1 {
193 fsl,pins = <
194 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
195 >;
196 };
197
198 pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
199 fsl,pins = <
200 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
201 >;
202 };
203
204 pinctrl_usbh1: usbh1grp {
205 fsl,pins = <
206 MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
207 MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
208 MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
209 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
210 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
211 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
212 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
213 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
214 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
215 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
216 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
217 MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
218 >;
219 };
220
221 pinctrl_usbh1_vbus: usbh1-vbusgrp {
222 fsl,pins = <
223 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
224 >;
225 };
226 };
227 };
228
229 &ssi2 {
230 codec-handle = <&tlv320aic23>;
231 status = "okay";
232 };
233
234 &uart1 {
235 pinctrl-names = "default";
236 pinctrl-0 = <&pinctrl_uart1>;
237 uart-has-rtscts;
238 status = "okay";
239 };
240
241 &uart3 {
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
244 uart-has-rtscts;
245 status = "okay";
246 };
247
248 &usbh1 {
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_usbh1>;
251 fsl,usbphy = <&usbphy1>;
252 dr_mode = "host";
253 phy_type = "ulpi";
254 status = "okay";
255 };
256
257 &usbotg {
258 dr_mode = "otg";
259 phy_type = "utmi_wide";
260 status = "okay";
261 };
262
263 &usbphy0 {
264 pinctrl-names = "default";
265 pinctrl-0 = <&pinctrl_usbh1_vbus>;
266 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
267 };
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