1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright 2023 Linaro Ltd.
4
5 /dts-v1/;
6
7 #include <dt-bindings/pwm/pwm.h>
8 #include "imx53-sk-imx53-atm0700d4.dtsi"
9
10 / {
11 lvds-decoder {
12 compatible = "ti,sn65lvds94", "lvds-decoder";
13
14 ports {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 port@0 {
19 reg = <0>;
20
21 lvds_decoder_in: endpoint {
22 remote-endpoint = <&lvds0_out>;
23 };
24 };
25
26 port@1 {
27 reg = <1>;
28
29 lvds_decoder_out: endpoint {
30 remote-endpoint = <&panel_rgb_in>;
31 };
32 };
33 };
34 };
35 };
36
37 &iomuxc {
38 pinctrl_lvds0: lvds0grp {
39 /* LVDS pins only have pin mux configuration */
40 fsl,pins = <
41 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
42 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
43 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
44 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
45 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
46 >;
47 };
48
49 pinctrl_spi_gpio: spigrp {
50 fsl,pins = <
51 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
52 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
53 MX53_PAD_EIM_A16__GPIO2_22 0x1f4
54 MX53_PAD_EIM_A18__GPIO2_20 0x1f4
55 >;
56 };
57 };
58
59 &ldb {
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_lvds0>;
62 status = "okay";
63
64 lvds0: lvds-channel@0 {
65 reg = <0>;
66 fsl,data-mapping = "spwg";
67 fsl,data-width = <24>;
68 status = "okay";
69
70 port@2 {
71 reg = <2>;
72
73 lvds0_out: endpoint {
74 remote-endpoint = <&lvds_decoder_in>;
75 };
76 };
77 };
78 };
79
80 &panel_rgb_in {
81 remote-endpoint = <&lvds_decoder_out>;
82 };
83
84 &spi_ts {
85 pinctrl-0 = <&pinctrl_spi_gpio>;
86 pinctrl-names = "default";
87
88 sck-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
89 miso-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
90 mosi-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
91 cs-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
92 };
93
94 &touchscreen {
95 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_BOTH>;
96 pendown-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
97 };
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