1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright 2015 Technexion Ltd.
4 //
5 // Author: Wig Cheng <wig.cheng@technexion.com>
6 // Richard Hu <richard.hu@technexion.com>
7 // Tapani Utriainen <tapani@technexion.com>
8 /dts-v1/;
9
10 #include "imx6ul-pico.dtsi"
11 / {
12 model = "TechNexion PICO-IMX6UL and HOBBIT baseboard";
13 compatible = "technexion,imx6ul-pico-hobbit", "fsl,imx6ul";
14
15 leds {
16 compatible = "gpio-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_gpio_leds>;
19
20 led {
21 label = "gpio-led";
22 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
23 };
24 };
25
26 sound {
27 compatible = "fsl,imx-audio-sgtl5000";
28 model = "imx6ul-sgtl5000";
29 audio-cpu = <&sai1>;
30 audio-codec = <&sgtl5000>;
31 audio-routing =
32 "LINE_IN", "Line In Jack",
33 "MIC_IN", "Mic Jack",
34 "Mic Jack", "Mic Bias",
35 "Headphone Jack", "HP_OUT";
36 };
37
38 sys_mclk: clock-sys-mclk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <24576000>;
42 };
43 };
44
45 &i2c2 {
46 clock-frequency = <100000>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_i2c2>;
49 status = "okay";
50
51 sgtl5000: codec@a {
52 reg = <0x0a>;
53 compatible = "fsl,sgtl5000";
54 #sound-dai-cells = <0>;
55 clocks = <&sys_mclk>;
56 VDDA-supply = <®_2p5v>;
57 VDDIO-supply = <®_3p3v>;
58 };
59 };
60
61 &i2c3 {
62 status = "okay";
63
64 polytouch: touchscreen@38 {
65 compatible = "edt,edt-ft5x06";
66 reg = <0x38>;
67 interrupt-parent = <&gpio1>;
68 interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
69 reset-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
70 touchscreen-size-x = <800>;
71 touchscreen-size-y = <480>;
72 };
73
74 adc081c: adc@50 {
75 compatible = "ti,adc081c";
76 reg = <0x50>;
77 vref-supply = <®_3p3v>;
78 };
79 };
80
81 &iomuxc {
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_hog>;
84
85 pinctrl_hog: hoggrp {
86 fsl,pins = <
87 MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x10b0
88 MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x10b0
89 MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x10b0
90 MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x10b0
91 MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x10b0
92 MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x10b0
93 >;
94 };
95
96 pinctrl_gpio_leds: gpioledsgrp {
97 fsl,pins = <
98 MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x10b0
99 >;
100 };
101 };
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