1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "8devices Jalapeno";
10 compatible = "8dev,jalapeno", "qcom,ipq4018";
11 };
12
13 &tlmm {
14 mdio_pins: mdio-state {
15 mdio-pins {
16 pins = "gpio53";
17 function = "mdio";
18 bias-pull-up;
19 };
20
21 mdc-pins {
22 pins = "gpio52";
23 function = "mdc";
24 bias-pull-up;
25 };
26 };
27
28 serial_pins: serial-state{
29 pins = "gpio60", "gpio61";
30 function = "blsp_uart0";
31 bias-disable;
32 };
33
34 spi_0_pins: spi-0-state {
35 spi0-pins {
36 function = "blsp_spi0";
37 pins = "gpio55", "gpio56", "gpio57";
38 drive-strength = <2>;
39 bias-disable;
40 };
41
42 spi0-cs-pins {
43 function = "gpio";
44 pins = "gpio54", "gpio59";
45 drive-strength = <2>;
46 bias-disable;
47 output-high;
48 };
49 };
50 };
51
52 &watchdog {
53 status = "okay";
54 };
55
56 &prng {
57 status = "okay";
58 };
59
60 &blsp_dma {
61 status = "okay";
62 };
63
64 &blsp1_spi1 {
65 status = "okay";
66
67 pinctrl-0 = <&spi_0_pins>;
68 pinctrl-names = "default";
69 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
70
71 flash@0 {
72 status = "okay";
73
74 compatible = "jedec,spi-nor";
75 reg = <0>;
76 spi-max-frequency = <24000000>;
77
78 partitions {
79 compatible = "fixed-partitions";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 partition@0 {
84 label = "SBL1";
85 reg = <0x00000000 0x00040000>;
86 read-only;
87 };
88
89 partition@40000 {
90 label = "MIBIB";
91 reg = <0x00040000 0x00020000>;
92 read-only;
93 };
94
95 partition@60000 {
96 label = "QSEE";
97 reg = <0x00060000 0x00060000>;
98 read-only;
99 };
100
101 partition@c0000 {
102 label = "CDT";
103 reg = <0x000c0000 0x00010000>;
104 read-only;
105 };
106
107 partition@d0000 {
108 label = "DDRPARAMS";
109 reg = <0x000d0000 0x00010000>;
110 read-only;
111 };
112
113 partition@e0000 {
114 label = "u-boot-env";
115 reg = <0x000e0000 0x00010000>;
116 };
117
118 partition@f0000 {
119 label = "u-boot";
120 reg = <0x000f0000 0x00080000>;
121 read-only;
122 };
123
124 partition@170000 {
125 label = "ART";
126 reg = <0x00170000 0x00010000>;
127 read-only;
128 };
129 };
130 };
131
132 spi-nand@1 {
133 status = "okay";
134
135 compatible = "spi-nand";
136 reg = <1>;
137 spi-max-frequency = <24000000>;
138
139 partitions {
140 compatible = "fixed-partitions";
141 #address-cells = <1>;
142 #size-cells = <1>;
143
144 partition@0 {
145 label = "ubi1";
146 reg = <0x00000000 0x04000000>;
147 };
148
149 partition@4000000 {
150 label = "ubi2";
151 reg = <0x04000000 0x04000000>;
152 };
153 };
154 };
155 };
156
157 &blsp1_uart1 {
158 status = "okay";
159
160 pinctrl-0 = <&serial_pins>;
161 pinctrl-names = "default";
162 };
163
164 &cryptobam {
165 status = "okay";
166 };
167
168 &crypto {
169 status = "okay";
170 };
171
172 &mdio {
173 status = "okay";
174
175 pinctrl-0 = <&mdio_pins>;
176 pinctrl-names = "default";
177 };
178
179 &wifi0 {
180 status = "okay";
181
182 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
183 };
184
185 &wifi1 {
186 status = "okay";
187
188 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
189 };
190
191 &usb3_ss_phy {
192 status = "okay";
193 };
194
195 &usb3_hs_phy {
196 status = "okay";
197 };
198
199 &usb3 {
200 status = "okay";
201 };
202
203 &usb2_hs_phy {
204 status = "okay";
205 };
206
207 &usb2 {
208 status = "okay";
209 };
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