1 /*
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44
45 &pinctrl {
46
47 i2c1_pins_a: i2c1-0 {
48 pins {
49 pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
50 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
54 };
55 };
56
57 ethernet_rmii: rmii-0 {
58 pins {
59 pinmux = <STM32_PINMUX('G', 11, AF11)>,
60 <STM32_PINMUX('G', 13, AF11)>,
61 <STM32_PINMUX('G', 12, AF11)>,
62 <STM32_PINMUX('C', 4, AF11)>,
63 <STM32_PINMUX('C', 5, AF11)>,
64 <STM32_PINMUX('A', 7, AF11)>,
65 <STM32_PINMUX('C', 1, AF11)>,
66 <STM32_PINMUX('A', 2, AF11)>,
67 <STM32_PINMUX('A', 1, AF11)>;
68 slew-rate = <2>;
69 };
70 };
71
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
73 pins {
74 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
75 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
76 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
77 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
78 <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */
79 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
80 slew-rate = <3>;
81 drive-push-pull;
82 bias-disable;
83 };
84 };
85
86 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
87 pins1 {
88 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
89 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
90 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
91 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
92 <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
93 slew-rate = <3>;
94 drive-push-pull;
95 bias-disable;
96 };
97 pins2 {
98 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
99 slew-rate = <3>;
100 drive-open-drain;
101 bias-disable;
102 };
103 };
104
105 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
106 pins {
107 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
108 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
109 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
110 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
111 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
112 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
113 };
114 };
115
116 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
117 pins1 {
118 pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */
119 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
120 <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */
121 slew-rate = <3>;
122 drive-push-pull;
123 bias-pull-up;
124 };
125 pins2 {
126 pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */
127 bias-pull-up;
128 };
129 };
130
131 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
132 pins {
133 pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */
134 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
135 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
136 <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */
137 };
138 };
139
140 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
141 pins {
142 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */
143 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
144 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
145 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
146 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */
147 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
148 slew-rate = <3>;
149 drive-push-pull;
150 bias-disable;
151 };
152 };
153
154 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
155 pins1 {
156 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
157 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */
158 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */
159 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */
160 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */
161 slew-rate = <3>;
162 drive-push-pull;
163 bias-disable;
164 };
165 pins2 {
166 pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */
167 slew-rate = <3>;
168 drive-open-drain;
169 bias-disable;
170 };
171 };
172
173 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
174 pins {
175 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */
176 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */
177 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */
178 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */
179 <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */
180 <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */
181 };
182 };
183
184 spi1_pins: spi1-0 {
185 pins1 {
186 pinmux = <STM32_PINMUX('A', 5, AF5)>,
187 /* SPI1_CLK */
188 <STM32_PINMUX('B', 5, AF5)>;
189 /* SPI1_MOSI */
190 bias-disable;
191 drive-push-pull;
192 slew-rate = <2>;
193 };
194 pins2 {
195 pinmux = <STM32_PINMUX('G', 9, AF5)>;
196 /* SPI1_MISO */
197 bias-disable;
198 };
199 };
200
201 uart4_pins: uart4-0 {
202 pins1 {
203 pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */
204 bias-disable;
205 drive-push-pull;
206 slew-rate = <0>;
207 };
208 pins2 {
209 pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */
210 bias-disable;
211 };
212 };
213
214 usart1_pins: usart1-0 {
215 pins1 {
216 pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
217 bias-disable;
218 drive-push-pull;
219 slew-rate = <0>;
220 };
221 pins2 {
222 pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */
223 bias-disable;
224 };
225 };
226
227 usart2_pins: usart2-0 {
228 pins1 {
229 pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
230 bias-disable;
231 drive-push-pull;
232 slew-rate = <0>;
233 };
234 pins2 {
235 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
236 bias-disable;
237 };
238 };
239
240 usart3_pins: usart3-0 {
241 pins1 {
242 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
243 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */
244 bias-disable;
245 drive-push-pull;
246 slew-rate = <0>;
247 };
248 pins2 {
249 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
250 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
251 bias-disable;
252 };
253 };
254
255 usbotg_hs_pins_a: usbotg-hs-0 {
256 pins {
257 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */
258 <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */
259 <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */
260 <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */
261 <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */
262 <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */
263 <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */
264 <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */
265 <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */
266 <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */
267 <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */
268 <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */
269 bias-disable;
270 drive-push-pull;
271 slew-rate = <2>;
272 };
273 };
274 };
275
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