1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2019 Phytec Messtechnik GmbH
4 * Author: Teresa Remmet <t.remmet@phytec.de>
5 *
6 */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/am33xx.h>
10
11 / {
12 model = "Phytec AM335x phyBOARD-REGOR";
13 compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
14
15 vcc3v3: fixedregulator@1 {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc3v3";
18 regulator-min-microvolt = <3300000>;
19 regulator-max-microvolt = <3300000>;
20 regulator-boot-on;
21 };
22
23 /* User IO */
24 user_leds: user-leds {
25 compatible = "gpio-leds";
26 pinctrl-names = "default";
27 pinctrl-0 = <&user_leds_pins>;
28
29 run_stop-led {
30 gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
31 linux,default-trigger = "gpio";
32 default-state = "off";
33 };
34
35 error-led {
36 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
37 linux,default-trigger = "gpio";
38 default-state = "off";
39 };
40 };
41 };
42
43 /* User Leds */
44 &am33xx_pinmux {
45 user_leds_pins: pinmux-user-leds-pins {
46 pinctrl-single,pins = <
47 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
48 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
49 >;
50 };
51 };
52
53 /* CAN Busses */
54 &am33xx_pinmux {
55 dcan1_pins: pinmux-dcan1-pins {
56 pinctrl-single,pins = <
57 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
58 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
59 >;
60 };
61 };
62
63 &dcan1 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&dcan1_pins>;
66 status = "okay";
67 };
68
69 /* Ethernet */
70 &am33xx_pinmux {
71 ethernet1_pins: pinmux-ethernet1-pins {
72 pinctrl-single,pins = <
73 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
74 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
75 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1) /* gpmc_a2.mii2_txd3 */
76 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1) /* gpmc_a3.mii2_txd2 */
77 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1) /* gpmc_a4.mii2_txd1 */
78 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1) /* gpmc_a5.mii2_txd0 */
79 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a6.mii2_txclk */
80 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a7.mii2_rxclk */
81 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
82 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
83 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
84 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
85 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
86 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_ben1.mii2_col */
87 >;
88 };
89 };
90
91 &cpsw_port2 {
92 status = "okay";
93 phy-handle = <&phy1>;
94 phy-mode = "mii";
95 ti,dual-emac-pvid = <2>;
96 };
97
98 &davinci_mdio_sw {
99 phy1: ethernet-phy@1 {
100 reg = <1>;
101 };
102 };
103
104 &mac_sw {
105 pinctrl-names = "default";
106 pinctrl-0 = <ðernet0_pins ðernet1_pins>;
107 };
108
109 /* GPIOs */
110 &am33xx_pinmux {
111 pinctrl-names = "default";
112 pinctrl-0 = <&user_gpios_pins>;
113
114 user_gpios_pins: pinmux-user-gpios-pins {
115 pinctrl-single,pins = <
116 /* DIGIN 1-4 */
117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
118 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
120 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) /* gpmc_ad8.gpio0_22 */
121 /* DIGOUT 1-4 */
122 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad15.gpio1_15 */
123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad14.gpio1_14 */
124 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad13.gpio1_13 */
125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad12.gpio1_12 */
126 >;
127 };
128 };
129
130 /* MMC */
131 &am33xx_pinmux {
132 mmc1_pins: pinmux-mmc1-pins {
133 pinctrl-single,pins = <
134 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
135 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
136 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
137 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
138 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
139 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
140 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
141 >;
142 };
143 };
144
145 &mmc1 {
146 vmmc-supply = <&vcc3v3>;
147 bus-width = <4>;
148 pinctrl-names = "default";
149 pinctrl-0 = <&mmc1_pins>;
150 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
151 status = "okay";
152 };
153
154 /* RTC */
155 &i2c_rtc {
156 status = "okay";
157 };
158
159 /* UARTs */
160 &am33xx_pinmux {
161 uart0_pins: pinmux-uart0-pins {
162 pinctrl-single,pins = <
163 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
164 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
165 >;
166 };
167
168 uart2_pins: pinmux-uart2-pins {
169 pinctrl-single,pins = <
170 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
171 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
172 >;
173 };
174 };
175
176 &uart0 {
177 pinctrl-names = "default";
178 pinctrl-0 = <&uart0_pins>;
179 status = "okay";
180 };
181
182 &uart2 {
183 pinctrl-names = "default";
184 pinctrl-0 = <&uart2_pins>;
185 status = "okay";
186 };
187
188 /* RS485 - UART1 */
189 &am33xx_pinmux {
190 uart1_rs485_pins: pinmux-uart1-rs485-pins {
191 pinctrl-single,pins = <
192 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
193 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
194 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
195 >;
196 };
197 };
198
199 &uart1 {
200 pinctrl-names = "default";
201 pinctrl-0 = <&uart1_rs485_pins>;
202 status = "okay";
203 linux,rs485-enabled-at-boot-time;
204 /*
205 * un-intuitively, yet with the default (active-high),
206 * am335x RTS is high on idle and gets low on active !
207 */
208 rs485-rts-active-low;
209 };
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