1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Based on "omap4.dtsi"
6 */
7
8 #include "dra7.dtsi"
9
10 / {
11 compatible = "ti,dra722", "ti,dra72", "ti,dra7";
12
13 aliases {
14 rproc0 = &ipu1;
15 rproc1 = &ipu2;
16 rproc2 = &dsp1;
17 };
18
19 pmu {
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
22 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
23 };
24 };
25
26 &l4_per2 {
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
29 reg = <0x5b000 0x4>,
30 <0x5b010 0x4>;
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
33 <SYSC_IDLE_NO>;
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
35 <SYSC_IDLE_NO>;
36 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
37 clock-names = "fck";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges = <0x0 0x5b000 0x1000>;
41
42 cal: cal@0 {
43 compatible = "ti,dra72-cal";
44 reg = <0x0000 0x400>,
45 <0x0800 0x40>,
46 <0x0900 0x40>;
47 reg-names = "cal_top",
48 "cal_rx_core0",
49 "cal_rx_core1";
50 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
51 ti,camerrx-control = <&scm_conf 0xE94>;
52
53 ports {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 csi2_0: port@0 {
58 reg = <0>;
59 };
60 csi2_1: port@1 {
61 reg = <1>;
62 };
63 };
64 };
65 };
66 };
67
68 &dss {
69 reg = <0 0x80>,
70 <0x4054 0x4>,
71 <0x4300 0x20>;
72 reg-names = "dss", "pll1_clkctrl", "pll1";
73
74 clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>,
75 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>;
76 clock-names = "fck", "video1_clk";
77 };
78
79 &mailbox5 {
80 mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
81 ti,mbox-tx = <6 2 2>;
82 ti,mbox-rx = <4 2 2>;
83 status = "disabled";
84 };
85 mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
86 ti,mbox-tx = <5 2 2>;
87 ti,mbox-rx = <1 2 2>;
88 status = "disabled";
89 };
90 };
91
92 &mailbox6 {
93 mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
94 ti,mbox-tx = <6 2 2>;
95 ti,mbox-rx = <4 2 2>;
96 status = "disabled";
97 };
98 };
99
100 &pcie1_rc {
101 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
102 };
103
104 &pcie1_ep {
105 compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep";
106 };
107
108 &pcie2_rc {
109 compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie";
110 };
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