1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include "omap443x.dtsi"
6 #include "motorola-cpcap-mapphone.dtsi"
7
8 / {
9 /*
10 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
11 * then 1023 - 1024 seems to contain mbm.
12 */
13 memory {
14 device_type = "memory";
15 reg = <0x80000000 0x3fd00000>; /* 1021 MB */
16 };
17
18 /* Poweroff GPIO probably connected to CPCAP */
19 gpio-poweroff {
20 compatible = "gpio-poweroff";
21 pinctrl-0 = <&poweroff_gpio>;
22 pinctrl-names = "default";
23 gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; /* gpio50 */
24 };
25
26 hdmi0: connector {
27 compatible = "hdmi-connector";
28 pinctrl-0 = <&hdmi_hpd_gpio>;
29 pinctrl-names = "default";
30 label = "hdmi";
31 type = "d";
32
33 hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio63 */
34
35 port {
36 hdmi_connector_in: endpoint {
37 remote-endpoint = <&hdmi_out>;
38 };
39 };
40 };
41
42 /*
43 * HDMI 5V regulator probably sourced from battery. Let's keep
44 * keep this as always enabled for HDMI to work until we've
45 * figured what the encoder chip is.
46 */
47 hdmi_regulator: regulator-hdmi {
48 compatible = "regulator-fixed";
49 regulator-name = "hdmi";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio59 */
53 enable-active-high;
54 regulator-always-on;
55 };
56
57 /* This is probably coming straight from the battery.. */
58 wl12xx_vmmc: regulator-wl12xx {
59 compatible = "regulator-fixed";
60 regulator-name = "vwl1271";
61 regulator-min-microvolt = <1650000>;
62 regulator-max-microvolt = <1650000>;
63 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */
64 startup-delay-us = <70000>;
65 enable-active-high;
66 };
67
68 soundcard {
69 compatible = "audio-graph-card";
70 label = "Mapphone Audio";
71
72 widgets =
73 "Speaker", "Earpiece",
74 "Speaker", "Loudspeaker",
75 "Headphone", "Headphone Jack",
76 "Microphone", "Internal Mic";
77
78 routing =
79 "Earpiece", "EP",
80 "Loudspeaker", "SPKR",
81 "Headphone Jack", "HSL",
82 "Headphone Jack", "HSR",
83 "MICR", "Internal Mic";
84
85 dais = <&mcbsp2_port>, <&mcbsp3_port>;
86 };
87 };
88
89 &cpu_thermal {
90 polling-delay = <10000>; /* milliseconds */
91 };
92
93 &cpu_alert0 {
94 temperature = <80000>; /* millicelsius */
95 };
96
97 &cpu0 {
98 /*
99 * Note that the 1.2GiHz mode is enabled for all SoC variants for
100 * the Motorola Android Linux v3.0.8 based kernel.
101 */
102 operating-points = <
103 /* kHz uV */
104 300000 1025000
105 600000 1200000
106 800000 1313000
107 1008000 1375000
108 1200000 1375000
109 >;
110 };
111
112 &dss {
113 status = "okay";
114 };
115
116 &hdmi {
117 status = "okay";
118 pinctrl-0 = <&dss_hdmi_pins>;
119 pinctrl-names = "default";
120 vdda-supply = <&vdac>;
121
122 port {
123 hdmi_out: endpoint {
124 remote-endpoint = <&hdmi_connector_in>;
125 lanes = <1 0 3 2 5 4 7 6>;
126 };
127 };
128 };
129
130 &i2c1 {
131 tmp105@48 {
132 compatible = "ti,tmp105";
133 reg = <0x48>;
134 pinctrl-0 = <&tmp105_irq>;
135 pinctrl-names = "default";
136 /* kpd_row0.gpio_178 */
137 interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
138 &omap4_pmx_core 0x14e>;
139 interrupt-names = "irq", "wakeup";
140 wakeup-source;
141 };
142 };
143
144 &mmc1 {
145 vmmc-supply = <&vwlan2>;
146 bus-width = <4>;
147 cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio176 */
148 };
149
150 &mmc2 {
151 vmmc-supply = <&vsdio>;
152 bus-width = <8>;
153 ti,non-removable;
154 };
155
156 &mmc3 {
157 pinctrl-names = "default";
158 pinctrl-0 = <&mmc3_pins>;
159 vmmc-supply = <&wl12xx_vmmc>;
160 /* uart2_tx.sdmmc3_dat1 pad as wakeirq */
161 interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
162 &omap4_pmx_core 0xde>;
163 interrupt-names = "irq", "wakeup";
164 non-removable;
165 bus-width = <4>;
166 cap-power-off-card;
167 keep-power-in-suspend;
168
169 #address-cells = <1>;
170 #size-cells = <0>;
171 wlcore: wlcore@2 {
172 compatible = "ti,wl1285";
173 reg = <2>;
174 /* gpio_100 with gpmc_wait2 pad as wakeirq */
175 interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
176 <&omap4_pmx_core 0x4e>;
177 interrupt-names = "irq", "wakeup";
178 ref-clock-frequency = <26000000>;
179 tcxo-clock-frequency = <26000000>;
180 };
181 };
182
183 &omap4_pmx_core {
184
185 /* hdmi_hpd.gpio_63 */
186 hdmi_hpd_gpio: hdmi-hpd-pins {
187 pinctrl-single,pins = <
188 OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
189 >;
190 };
191
192 /* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
193 dss_hdmi_pins: dss-hdmi-pins {
194 pinctrl-single,pins = <
195 OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
196 OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
197 OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
198 >;
199 };
200
201 /*
202 * Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
203 * for gpio_100, but the internal pull makes wlan flakey on some
204 * devices. Off mode value should be tested if we have off mode working
205 * later on.
206 */
207 mmc3_pins: mmc3-pins {
208 pinctrl-single,pins = <
209 /* 0x4a10008e gpmc_wait2.gpio_100 d23 */
210 OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
211
212 /* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
213 OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
214
215 /* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
216 OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
217
218 /* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
219 OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
220
221 /* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
222 OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
223
224 /* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
225 OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
226
227 /* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
228 OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
229 >;
230 };
231
232 /* gpmc_ncs0.gpio_50 */
233 poweroff_gpio: poweroff-pins {
234 pinctrl-single,pins = <
235 OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
236 >;
237 };
238
239 /* kpd_row0.gpio_178 */
240 tmp105_irq: tmp105-irq-pins {
241 pinctrl-single,pins = <
242 OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
243 >;
244 };
245
246 usb_gpio_mux_sel1: usb-gpio-mux-sel1-pins {
247 /* gpio_60 */
248 pinctrl-single,pins = <
249 OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
250 >;
251 };
252
253 usb_ulpi_pins: usb-ulpi-pins {
254 pinctrl-single,pins = <
255 OMAP4_IOPAD(0x196, MUX_MODE7)
256 OMAP4_IOPAD(0x198, MUX_MODE7)
257 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
258 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
259 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
260 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
261 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
262 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
263 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
264 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
265 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
266 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
267 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
268 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
269 >;
270 };
271
272 /* usb0_otg_dp and usb0_otg_dm */
273 usb_utmi_pins: usb-utmi-pins {
274 pinctrl-single,pins = <
275 OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
276 OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
277 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
278 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
279 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
280 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
281 OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
282 OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
283 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
284 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
285 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
286 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
287 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
288 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
289 >;
290 };
291
292 /*
293 * Note that the v3.0.8 stock userspace dynamically remuxes uart1
294 * rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
295 * when not used. If needed, we can add rts pin remux later based
296 * on power measurements.
297 */
298 uart1_pins: uart1-pins {
299 pinctrl-single,pins = <
300 /* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
301 OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
302
303 /* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
304 OMAP4_IOPAD(0x13e, MUX_MODE1)
305
306 /* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
307 OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
308
309 /* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
310 OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
311 >;
312 };
313
314 /* uart3_tx_irtx and uart3_rx_irrx */
315 uart3_pins: uart3-pins {
316 pinctrl-single,pins = <
317 OMAP4_IOPAD(0x196, MUX_MODE7)
318 OMAP4_IOPAD(0x198, MUX_MODE7)
319 OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
320 OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
321 OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
322 OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
323 OMAP4_IOPAD(0x1ba, MUX_MODE2)
324 OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
325 OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
326 OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
327 OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
328 OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
329 OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
330 OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
331 >;
332 };
333
334 uart4_pins: uart4-pins {
335 pinctrl-single,pins = <
336 OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
337 OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
338 OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */
339 OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
340 >;
341 };
342
343 mcbsp2_pins: mcbsp2-pins {
344 pinctrl-single,pins = <
345 OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
346 OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
347 OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */
348 OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
349 >;
350 };
351
352 mcbsp3_pins: mcbsp3-pins {
353 pinctrl-single,pins = <
354 OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
355 OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
356 OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
357 OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
358 >;
359 };
360 };
361
362 &omap4_pmx_wkup {
363 usb_gpio_mux_sel2: usb-gpio-mux-sel2-pins {
364 /* gpio_wk0 */
365 pinctrl-single,pins = <
366 OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
367 >;
368 };
369 };
370
371 /* RNG is used by secure mode and not accessible */
372 &rng_target {
373 status = "disabled";
374 };
375
376 /*
377 * The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
378 * for wake-up events for both the USB PHY and the UART. We can use gpio_149
379 * pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
380 * have gpio_149 trigger before the UART transfer starts.
381 */
382 &uart1 {
383 pinctrl-names = "default";
384 pinctrl-0 = <&uart1_pins>;
385 interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
386 &omap4_pmx_core 0x110>;
387 uart-has-rtscts;
388 current-speed = <115200>;
389 };
390
391 &uart3 {
392 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
393 &omap4_pmx_core 0x17c>;
394 overrun-throttle-ms = <500>;
395 };
396
397 &uart4 {
398 pinctrl-names = "default";
399 pinctrl-0 = <&uart4_pins>;
400
401 bluetooth {
402 compatible = "ti,wl1285-st";
403 enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */
404 max-speed = <3686400>;
405 };
406 };
407
408 /* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
409 &usb_otg_hs {
410 interface-type = <1>;
411 mode = <3>;
412
413 /*
414 * Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4.
415 * VBUS Regulator Main Characteristics". Binding uses 2 mA units.
416 */
417 power = <150>;
418 };
419
420 &mcbsp2 {
421 #sound-dai-cells = <0>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&mcbsp2_pins>;
424 status = "okay";
425
426 mcbsp2_port: port {
427 cpu_dai2: endpoint {
428 dai-format = "i2s";
429 remote-endpoint = <&cpcap_audio_codec0>;
430 frame-master = <&cpcap_audio_codec0>;
431 bitclock-master = <&cpcap_audio_codec0>;
432 };
433 };
434 };
435
436 &mcbsp3 {
437 #sound-dai-cells = <0>;
438 pinctrl-names = "default";
439 pinctrl-0 = <&mcbsp3_pins>;
440 status = "okay";
441
442 mcbsp3_port: port {
443 cpu_dai3: endpoint {
444 dai-format = "dsp_a";
445 frame-master = <&cpcap_audio_codec1>;
446 bitclock-master = <&cpcap_audio_codec1>;
447 remote-endpoint = <&cpcap_audio_codec1>;
448 };
449 };
450 };
451
452 &cpcap_audio_codec0 {
453 remote-endpoint = <&cpu_dai2>;
454 };
455
456 &cpcap_audio_codec1 {
457 remote-endpoint = <&cpu_dai3>;
458 };
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