1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Author: Anil Kumar <anilk4.v@gmail.com>
4 */
5
6 #include <dt-bindings/input/input.h>
7
8 #include "omap34xx.dtsi"
9 / {
10 memory@80000000 {
11 device_type = "memory";
12 reg = <0x80000000 0x10000000>; /* 256 MB */
13 };
14
15 leds {
16 compatible = "gpio-leds";
17
18 led-heartbeat {
19 label = "devkit8000::led1";
20 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
21 default-state = "on";
22 linux,default-trigger = "heartbeat";
23 };
24
25 led-mmc {
26 label = "devkit8000::led2";
27 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
28 default-state = "on";
29 linux,default-trigger = "none";
30 };
31
32 led-usr {
33 label = "devkit8000::led3";
34 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
35 default-state = "on";
36 linux,default-trigger = "usr";
37 };
38
39 led-pmu-stat {
40 label = "devkit8000::pmu_stat";
41 gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
42 };
43 };
44
45 sound {
46 compatible = "ti,omap-twl4030";
47 ti,model = "devkit8000";
48
49 ti,mcbsp = <&mcbsp2>;
50 ti,audio-routing =
51 "Ext Spk", "PREDRIVEL",
52 "Ext Spk", "PREDRIVER",
53 "MAINMIC", "Main Mic",
54 "Main Mic", "Mic Bias 1";
55 };
56
57 gpio_keys {
58 compatible = "gpio-keys";
59
60 user {
61 label = "user";
62 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
63 linux,code = <BTN_EXTRA>;
64 wakeup-source;
65 };
66 };
67
68 tfp410: encoder0 {
69 compatible = "ti,tfp410";
70 powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
71
72 ports {
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 port@0 {
77 reg = <0>;
78
79 tfp410_in: endpoint {
80 remote-endpoint = <&dpi_dvi_out>;
81 };
82 };
83
84 port@1 {
85 reg = <1>;
86
87 tfp410_out: endpoint {
88 remote-endpoint = <&dvi_connector_in>;
89 };
90 };
91 };
92 };
93
94 dvi0: connector0 {
95 compatible = "dvi-connector";
96 label = "dvi";
97
98 digital;
99
100 ddc-i2c-bus = <&i2c2>;
101
102 port {
103 dvi_connector_in: endpoint {
104 remote-endpoint = <&tfp410_out>;
105 };
106 };
107 };
108
109 tv0: connector1 {
110 compatible = "svideo-connector";
111 label = "tv";
112
113 port {
114 tv_connector_in: endpoint {
115 remote-endpoint = <&venc_out>;
116 };
117 };
118 };
119 };
120
121 &i2c1 {
122 clock-frequency = <2600000>;
123
124 twl: twl@48 {
125 reg = <0x48>;
126 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
127
128 twl_audio: audio {
129 compatible = "ti,twl4030-audio";
130 codec {
131 };
132 };
133 };
134 };
135
136 &i2c2 {
137 clock-frequency = <400000>;
138 };
139
140 &i2c3 {
141 status = "disabled";
142 };
143
144 #include "twl4030.dtsi"
145 #include "twl4030_omap3.dtsi"
146
147 &mmc1 {
148 vmmc-supply = <&vmmc1>;
149 vqmmc-supply = <&vsim>;
150 bus-width = <8>;
151 };
152
153 &mmc2 {
154 status = "disabled";
155 };
156
157 &mmc3 {
158 status = "disabled";
159 };
160
161 /* Unusable as clockevent because if unreliable oscillator, allow to idle */
162 &timer1_target {
163 /delete-property/ti,no-reset-on-init;
164 /delete-property/ti,no-idle;
165 timer@0 {
166 /delete-property/ti,timer-alwon;
167 };
168 };
169
170 /* Preferred timer for clockevent */
171 &timer12_target {
172 ti,no-reset-on-init;
173 ti,no-idle;
174 timer@0 {
175 /* Always clocked by secure_32k_fck */
176 };
177 };
178
179 &twl_gpio {
180 ti,use-leds;
181 /*
182 * pulldowns:
183 * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
184 * BIT(15), BIT(16), BIT(17)
185 */
186 ti,pulldowns = <0x03a1c6>;
187 };
188
189 &twl_keypad {
190 linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
191 MATRIX_KEY(1, 0, KEY_2)
192 MATRIX_KEY(2, 0, KEY_3)
193 MATRIX_KEY(0, 1, KEY_4)
194 MATRIX_KEY(1, 1, KEY_5)
195 MATRIX_KEY(2, 1, KEY_6)
196 MATRIX_KEY(3, 1, KEY_F5)
197 MATRIX_KEY(0, 2, KEY_7)
198 MATRIX_KEY(1, 2, KEY_8)
199 MATRIX_KEY(2, 2, KEY_9)
200 MATRIX_KEY(3, 2, KEY_F6)
201 MATRIX_KEY(0, 3, KEY_F7)
202 MATRIX_KEY(1, 3, KEY_0)
203 MATRIX_KEY(2, 3, KEY_F8)
204 MATRIX_KEY(4, 5, KEY_RESERVED)
205 MATRIX_KEY(4, 4, KEY_VOLUMEUP)
206 MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
207 >;
208 };
209
210 &wdt2 {
211 status = "disabled";
212 };
213
214 &mcbsp2 {
215 status = "okay";
216 };
217
218 &gpmc {
219 ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
220 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
221
222 nand@0,0 {
223 compatible = "ti,omap2-nand";
224 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
225 interrupt-parent = <&gpmc>;
226 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
227 <1 IRQ_TYPE_NONE>; /* termcount */
228 nand-bus-width = <16>;
229 gpmc,device-width = <2>;
230 ti,nand-ecc-opt = "sw";
231
232 gpmc,sync-clk-ps = <0>;
233 gpmc,cs-on-ns = <0>;
234 gpmc,cs-rd-off-ns = <44>;
235 gpmc,cs-wr-off-ns = <44>;
236 gpmc,adv-on-ns = <6>;
237 gpmc,adv-rd-off-ns = <34>;
238 gpmc,adv-wr-off-ns = <44>;
239 gpmc,we-off-ns = <40>;
240 gpmc,oe-off-ns = <54>;
241 gpmc,access-ns = <64>;
242 gpmc,rd-cycle-ns = <82>;
243 gpmc,wr-cycle-ns = <82>;
244 gpmc,wr-access-ns = <40>;
245 gpmc,wr-data-mux-bus-ns = <0>;
246
247 #address-cells = <1>;
248 #size-cells = <1>;
249
250 x-loader@0 {
251 label = "X-Loader";
252 reg = <0 0x80000>;
253 };
254
255 bootloaders@80000 {
256 label = "U-Boot";
257 reg = <0x80000 0x1e0000>;
258 };
259
260 bootloaders_env@260000 {
261 label = "U-Boot Env";
262 reg = <0x260000 0x20000>;
263 };
264
265 kernel@280000 {
266 label = "Kernel";
267 reg = <0x280000 0x400000>;
268 };
269
270 filesystem@680000 {
271 label = "File System";
272 reg = <0x680000 0xf980000>;
273 };
274 };
275
276 ethernet@6,0 {
277 compatible = "davicom,dm9000";
278 reg = <6 0x000 2>,
279 <6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
280 bank-width = <2>;
281 interrupt-parent = <&gpio1>;
282 interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
283 davicom,no-eeprom;
284
285 gpmc,mux-add-data = <0>;
286 gpmc,device-width = <1>;
287 gpmc,wait-pin = <0>;
288 gpmc,cycle2cycle-samecsen;
289 gpmc,cycle2cycle-diffcsen;
290
291 gpmc,cs-on-ns = <6>;
292 gpmc,cs-rd-off-ns = <180>;
293 gpmc,cs-wr-off-ns = <180>;
294 gpmc,adv-on-ns = <0>;
295 gpmc,adv-rd-off-ns = <18>;
296 gpmc,adv-wr-off-ns = <48>;
297 gpmc,oe-on-ns = <54>;
298 gpmc,oe-off-ns = <168>;
299 gpmc,we-on-ns = <54>;
300 gpmc,we-off-ns = <168>;
301 gpmc,rd-cycle-ns = <186>;
302 gpmc,wr-cycle-ns = <186>;
303 gpmc,access-ns = <144>;
304 gpmc,page-burst-access-ns = <24>;
305 gpmc,bus-turnaround-ns = <90>;
306 gpmc,cycle2cycle-delay-ns = <90>;
307 gpmc,wait-monitoring-ns = <0>;
308 gpmc,clk-activation-ns = <0>;
309 gpmc,wr-data-mux-bus-ns = <0>;
310 gpmc,wr-access-ns = <0>;
311 };
312 };
313
314 &omap3_pmx_core {
315 dss_dpi_pins: dss-dpi-pins {
316 pinctrl-single,pins = <
317 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
318 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
319 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
320 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
321 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
322 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
323 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
324 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
325 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
326 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
327 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
328 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
329 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
330 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
331 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
332 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
333 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
334 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
335 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
336 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
337 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
338 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
339 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
340 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
341 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
342 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
343 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
344 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
345 >;
346 };
347 };
348
349 &vpll1 {
350 /* Needed for DSS */
351 regulator-name = "vdds_dsi";
352
353 regulator-min-microvolt = <1800000>;
354 regulator-max-microvolt = <1800000>;
355 };
356
357 &dss {
358 status = "okay";
359
360 pinctrl-names = "default";
361 pinctrl-0 = <&dss_dpi_pins>;
362
363 vdds_dsi-supply = <&vpll1>;
364 vdda_dac-supply = <&vdac>;
365
366 port {
367 #address-cells = <1>;
368 #size-cells = <0>;
369 dpi_dvi_out: endpoint@0 {
370 reg = <0>;
371 remote-endpoint = <&tfp410_in>;
372 data-lines = <24>;
373 };
374
375 endpoint@1 {
376 reg = <1>;
377 };
378 };
379 };
380
381 &venc {
382 status = "okay";
383
384 vdda-supply = <&vdac>;
385
386 port {
387 venc_out: endpoint {
388 remote-endpoint = <&tv_connector_in>;
389 ti,channels = <2>;
390 };
391 };
392 };
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