1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2011 - 2014 Xilinx
4 * Copyright (C) 2012 National Instruments Corp.
5 */
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9
10 / {
11 model = "Xilinx ZC702 board";
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
13
14 aliases {
15 ethernet0 = &gem0;
16 i2c0 = &i2c0;
17 serial0 = &uart1;
18 mmc0 = &sdhci0;
19 };
20
21 memory@0 {
22 device_type = "memory";
23 reg = <0x0 0x40000000>;
24 };
25
26 chosen {
27 bootargs = "";
28 stdout-path = "serial0:115200n8";
29 };
30
31 gpio-keys {
32 compatible = "gpio-keys";
33 autorepeat;
34 switch-14 {
35 label = "sw14";
36 gpios = <&gpio0 12 0>;
37 linux,code = <108>; /* down */
38 wakeup-source;
39 autorepeat;
40 };
41 switch-13 {
42 label = "sw13";
43 gpios = <&gpio0 14 0>;
44 linux,code = <103>; /* up */
45 wakeup-source;
46 autorepeat;
47 };
48 };
49
50 leds {
51 compatible = "gpio-leds";
52
53 led-ds23 {
54 label = "ds23";
55 gpios = <&gpio0 10 0>;
56 linux,default-trigger = "heartbeat";
57 };
58 };
59
60 usb_phy0: phy0 {
61 compatible = "usb-nop-xceiv";
62 #phy-cells = <0>;
63 };
64 };
65
66 &amba {
67 ocm: sram@fffc0000 {
68 compatible = "mmio-sram";
69 reg = <0xfffc0000 0x10000>;
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges = <0 0xfffc0000 0x10000>;
73 ocm-sram@0 {
74 reg = <0x0 0x10000>;
75 };
76 };
77 };
78
79 &can0 {
80 status = "okay";
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_can0_default>;
83 };
84
85 &clkc {
86 ps-clk-frequency = <33333333>;
87 };
88
89 &gem0 {
90 status = "okay";
91 phy-mode = "rgmii-id";
92 phy-handle = <ðernet_phy>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_gem0_default>;
95
96 ethernet_phy: ethernet-phy@7 {
97 reg = <7>;
98 device_type = "ethernet-phy";
99 };
100 };
101
102 &gpio0 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_gpio0_default>;
105 };
106
107 &i2c0 {
108 status = "okay";
109 clock-frequency = <400000>;
110 pinctrl-names = "default", "gpio";
111 pinctrl-0 = <&pinctrl_i2c0_default>;
112 pinctrl-1 = <&pinctrl_i2c0_gpio>;
113 scl-gpios = <&gpio0 50 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
114 sda-gpios = <&gpio0 51 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
115
116 i2c-mux@74 {
117 compatible = "nxp,pca9548";
118 #address-cells = <1>;
119 #size-cells = <0>;
120 reg = <0x74>;
121
122 i2c@0 {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 reg = <0>;
126 si570: clock-generator@5d {
127 #clock-cells = <0>;
128 compatible = "silabs,si570";
129 temperature-stability = <50>;
130 reg = <0x5d>;
131 factory-fout = <156250000>;
132 clock-frequency = <148500000>;
133 };
134 };
135
136 i2c@1 {
137 #address-cells = <1>;
138 #size-cells = <0>;
139 reg = <1>;
140 adv7511: hdmi-tx@39 {
141 compatible = "adi,adv7511";
142 reg = <0x39>;
143 adi,input-depth = <8>;
144 adi,input-colorspace = "yuv422";
145 adi,input-clock = "1x";
146 adi,input-style = <3>;
147 adi,input-justification = "right";
148 };
149 };
150
151 i2c@2 {
152 #address-cells = <1>;
153 #size-cells = <0>;
154 reg = <2>;
155 eeprom@54 {
156 compatible = "atmel,24c08";
157 reg = <0x54>;
158 };
159 };
160
161 i2c@3 {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 reg = <3>;
165 gpio@21 {
166 compatible = "ti,tca6416";
167 reg = <0x21>;
168 gpio-controller;
169 #gpio-cells = <2>;
170 };
171 };
172
173 i2c@4 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 reg = <4>;
177 rtc@51 {
178 compatible = "nxp,pcf8563";
179 reg = <0x51>;
180 };
181 };
182
183 i2c@7 {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 reg = <7>;
187 hwmon@34 {
188 compatible = "ti,ucd9248";
189 reg = <0x34>;
190 };
191 hwmon@35 {
192 compatible = "ti,ucd9248";
193 reg = <0x35>;
194 };
195 hwmon@36 {
196 compatible = "ti,ucd9248";
197 reg = <0x36>;
198 };
199 };
200 };
201 };
202
203 &pinctrl0 {
204 pinctrl_can0_default: can0-default {
205 mux {
206 function = "can0";
207 groups = "can0_9_grp";
208 };
209
210 conf {
211 groups = "can0_9_grp";
212 slew-rate = <0>;
213 io-standard = <1>;
214 };
215
216 conf-rx {
217 pins = "MIO46";
218 bias-high-impedance;
219 };
220
221 conf-tx {
222 pins = "MIO47";
223 bias-disable;
224 };
225 };
226
227 pinctrl_gem0_default: gem0-default {
228 mux {
229 function = "ethernet0";
230 groups = "ethernet0_0_grp";
231 };
232
233 conf {
234 groups = "ethernet0_0_grp";
235 slew-rate = <0>;
236 io-standard = <4>;
237 };
238
239 conf-rx {
240 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
241 bias-high-impedance;
242 low-power-disable;
243 };
244
245 conf-tx {
246 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
247 bias-disable;
248 low-power-enable;
249 };
250
251 mux-mdio {
252 function = "mdio0";
253 groups = "mdio0_0_grp";
254 };
255
256 conf-mdio {
257 groups = "mdio0_0_grp";
258 slew-rate = <0>;
259 io-standard = <1>;
260 bias-disable;
261 };
262 };
263
264 pinctrl_gpio0_default: gpio0-default {
265 mux {
266 function = "gpio0";
267 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
268 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
269 "gpio0_13_grp", "gpio0_14_grp";
270 };
271
272 conf {
273 groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
274 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
275 "gpio0_13_grp", "gpio0_14_grp";
276 slew-rate = <0>;
277 io-standard = <1>;
278 };
279
280 conf-pull-up {
281 pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
282 bias-pull-up;
283 };
284
285 conf-pull-none {
286 pins = "MIO7", "MIO8";
287 bias-disable;
288 };
289 };
290
291 pinctrl_i2c0_default: i2c0-default {
292 mux {
293 groups = "i2c0_10_grp";
294 function = "i2c0";
295 };
296
297 conf {
298 groups = "i2c0_10_grp";
299 bias-pull-up;
300 slew-rate = <0>;
301 io-standard = <1>;
302 };
303 };
304
305 pinctrl_i2c0_gpio: i2c0-gpio {
306 mux {
307 groups = "gpio0_50_grp", "gpio0_51_grp";
308 function = "gpio0";
309 };
310
311 conf {
312 groups = "gpio0_50_grp", "gpio0_51_grp";
313 slew-rate = <0>;
314 io-standard = <1>;
315 };
316 };
317
318 pinctrl_sdhci0_default: sdhci0-default {
319 mux {
320 groups = "sdio0_2_grp";
321 function = "sdio0";
322 };
323
324 conf {
325 groups = "sdio0_2_grp";
326 slew-rate = <0>;
327 io-standard = <1>;
328 bias-disable;
329 };
330
331 mux-cd {
332 groups = "gpio0_0_grp";
333 function = "sdio0_cd";
334 };
335
336 conf-cd {
337 groups = "gpio0_0_grp";
338 bias-high-impedance;
339 bias-pull-up;
340 slew-rate = <0>;
341 io-standard = <1>;
342 };
343
344 mux-wp {
345 groups = "gpio0_15_grp";
346 function = "sdio0_wp";
347 };
348
349 conf-wp {
350 groups = "gpio0_15_grp";
351 bias-high-impedance;
352 bias-pull-up;
353 slew-rate = <0>;
354 io-standard = <1>;
355 };
356 };
357
358 pinctrl_uart1_default: uart1-default {
359 mux {
360 groups = "uart1_10_grp";
361 function = "uart1";
362 };
363
364 conf {
365 groups = "uart1_10_grp";
366 slew-rate = <0>;
367 io-standard = <1>;
368 };
369
370 conf-rx {
371 pins = "MIO49";
372 bias-high-impedance;
373 };
374
375 conf-tx {
376 pins = "MIO48";
377 bias-disable;
378 };
379 };
380
381 pinctrl_usb0_default: usb0-default {
382 mux {
383 groups = "usb0_0_grp";
384 function = "usb0";
385 };
386
387 conf {
388 groups = "usb0_0_grp";
389 slew-rate = <0>;
390 io-standard = <1>;
391 };
392
393 conf-rx {
394 pins = "MIO29", "MIO31", "MIO36";
395 bias-high-impedance;
396 };
397
398 conf-tx {
399 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
400 "MIO35", "MIO37", "MIO38", "MIO39";
401 bias-disable;
402 };
403 };
404 };
405
406 &sdhci0 {
407 status = "okay";
408 pinctrl-names = "default";
409 pinctrl-0 = <&pinctrl_sdhci0_default>;
410 };
411
412 &uart1 {
413 status = "okay";
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_uart1_default>;
416 };
417
418 &usb0 {
419 status = "okay";
420 dr_mode = "host";
421 usb-phy = <&usb_phy0>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_usb0_default>;
424 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.