1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2017 Andreas Färber
4 */
5
6 /dts-v1/;
7
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
11
12 / {
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
14 model = "FriendlyARM NanoPi K2";
15
16 aliases {
17 serial0 = &uart_AO;
18 ethernet0 = ðmac;
19 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x0 0x0 0x80000000>;
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led-stat {
34 label = "nanopi-k2:blue:stat";
35 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
36 default-state = "on";
37 panic-indicator;
38 };
39 };
40
41 vdd_5v: regulator-vdd-5v {
42 compatible = "regulator-fixed";
43 regulator-name = "VDD_5V";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 };
47
48 vddio_ao18: regulator-vddio-ao18 {
49 compatible = "regulator-fixed";
50 regulator-name = "VDDIO_AO18";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <1800000>;
53 };
54
55 vddio_ao3v3: regulator-vddio-ao3v3 {
56 compatible = "regulator-fixed";
57 regulator-name = "VDDIO_AO3.3V";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 };
61
62 vddio_tf: regulator-vddio-tf {
63 compatible = "regulator-gpio";
64
65 regulator-name = "VDDIO_TF";
66 regulator-min-microvolt = <1800000>;
67 regulator-max-microvolt = <3300000>;
68
69 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
70 gpios-states = <0>;
71
72 states = <3300000 0>,
73 <1800000 1>;
74
75 regulator-settling-time-up-us = <100>;
76 regulator-settling-time-down-us = <5000>;
77 };
78
79 wifi_32k: wifi-32k {
80 compatible = "pwm-clock";
81 #clock-cells = <0>;
82 clock-frequency = <32768>;
83 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
84 };
85
86 sdio_pwrseq: sdio-pwrseq {
87 compatible = "mmc-pwrseq-simple";
88 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
89 clocks = <&wifi_32k>;
90 clock-names = "ext_clock";
91 };
92
93 vcc1v8: regulator-vcc1v8 {
94 compatible = "regulator-fixed";
95 regulator-name = "VCC1.8V";
96 regulator-min-microvolt = <1800000>;
97 regulator-max-microvolt = <1800000>;
98 };
99
100 vcc3v3: regulator-vcc3v3 {
101 compatible = "regulator-fixed";
102 regulator-name = "VCC3.3V";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 };
106
107 emmc_pwrseq: emmc-pwrseq {
108 compatible = "mmc-pwrseq-emmc";
109 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
110 };
111
112 /* CVBS is available on CON1 pin 36, disabled by default */
113 cvbs-connector {
114 compatible = "composite-video-connector";
115 status = "disabled";
116
117 port {
118 cvbs_connector_in: endpoint {
119 remote-endpoint = <&cvbs_vdac_out>;
120 };
121 };
122 };
123
124 hdmi-connector {
125 compatible = "hdmi-connector";
126 type = "a";
127
128 port {
129 hdmi_connector_in: endpoint {
130 remote-endpoint = <&hdmi_tx_tmds_out>;
131 };
132 };
133 };
134
135 sound {
136 compatible = "amlogic,gx-sound-card";
137 model = "NANOPI-K2";
138 clocks = <&clkc CLKID_MPLL0>,
139 <&clkc CLKID_MPLL1>,
140 <&clkc CLKID_MPLL2>;
141
142 assigned-clocks = <&clkc CLKID_MPLL0>,
143 <&clkc CLKID_MPLL1>,
144 <&clkc CLKID_MPLL2>;
145 assigned-clock-parents = <0>, <0>, <0>;
146 assigned-clock-rates = <294912000>,
147 <270950400>,
148 <393216000>;
149
150 dai-link-0 {
151 sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
152 };
153
154 dai-link-1 {
155 sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
156 dai-format = "i2s";
157 mclk-fs = <256>;
158
159 codec-0 {
160 sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
161 };
162 };
163
164 dai-link-2 {
165 sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
166
167 codec-0 {
168 sound-dai = <&hdmi_tx>;
169 };
170 };
171 };
172 };
173
174 &aiu {
175 status = "okay";
176 };
177
178 &cec_AO {
179 status = "okay";
180 pinctrl-0 = <&ao_cec_pins>;
181 pinctrl-names = "default";
182 hdmi-phandle = <&hdmi_tx>;
183 };
184
185 &cvbs_vdac_port {
186 cvbs_vdac_out: endpoint {
187 remote-endpoint = <&cvbs_connector_in>;
188 };
189 };
190
191 ðmac {
192 status = "okay";
193 pinctrl-0 = <ð_rgmii_pins>;
194 pinctrl-names = "default";
195
196 phy-handle = <ð_phy0>;
197 phy-mode = "rgmii";
198
199 amlogic,tx-delay-ns = <2>;
200
201 mdio {
202 compatible = "snps,dwmac-mdio";
203 #address-cells = <1>;
204 #size-cells = <0>;
205
206 eth_phy0: ethernet-phy@0 {
207 /* Realtek RTL8211F (0x001cc916) */
208 reg = <0>;
209
210 reset-assert-us = <10000>;
211 reset-deassert-us = <80000>;
212 reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
213
214 interrupt-parent = <&gpio_intc>;
215 /* MAC_INTR on GPIOZ_15 */
216 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
217 };
218 };
219 };
220
221 &hdmi_tx {
222 status = "okay";
223 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
224 pinctrl-names = "default";
225 };
226
227 &hdmi_tx_tmds_port {
228 hdmi_tx_tmds_out: endpoint {
229 remote-endpoint = <&hdmi_connector_in>;
230 };
231 };
232
233 &ir {
234 status = "okay";
235 pinctrl-0 = <&remote_input_ao_pins>;
236 pinctrl-names = "default";
237 };
238
239 &gpio_ao {
240 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
241 "VCCK En", "CON1 Header Pin31",
242 "I2S Header Pin6", "IR In", "I2S Header Pin7",
243 "I2S Header Pin3", "I2S Header Pin4",
244 "I2S Header Pin5", "HDMI CEC", "SYS LED",
245 /* GPIO_TEST_N */
246 "";
247 };
248
249 &gpio {
250 gpio-line-names = /* Bank GPIOZ */
251 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
252 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
253 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
254 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
255 "Eth PHY nRESET", "Eth PHY Intc",
256 /* Bank GPIOH */
257 "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL",
258 "CON1 Header Pin33",
259 /* Bank BOOT */
260 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
261 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
262 "eMMC Reset", "eMMC CMD",
263 "", "", "", "", "eMMC DS",
264 "", "",
265 /* Bank CARD */
266 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
267 "SDCard D3", "SDCard D2", "SDCard Det",
268 /* Bank GPIODV */
269 "", "", "", "", "", "", "", "", "", "", "", "", "",
270 "", "", "", "", "", "", "", "", "", "", "",
271 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
272 "VDDEE Regulator", "VCCK Regulator",
273 /* Bank GPIOY */
274 "CON1 Header Pin7", "CON1 Header Pin11",
275 "CON1 Header Pin13", "CON1 Header Pin15",
276 "CON1 Header Pin18", "CON1 Header Pin19",
277 "CON1 Header Pin22", "CON1 Header Pin21",
278 "CON1 Header Pin24", "CON1 Header Pin23",
279 "CON1 Header Pin26", "CON1 Header Pin29",
280 "CON1 Header Pin32", "CON1 Header Pin8",
281 "CON1 Header Pin10", "CON1 Header Pin16",
282 "CON1 Header Pin12",
283 /* Bank GPIOX */
284 "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
285 "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
286 "WIFI Power Enable", "WIFI WAKE HOST",
287 "Bluetooth PCM DOUT", "Bluetooth PCM DIN",
288 "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
289 "Bluetooth UART TX", "Bluetooth UART RX",
290 "Bluetooth UART CTS", "Bluetooth UART RTS",
291 "", "", "", "WIFI 32K", "Bluetooth Enable",
292 "Bluetooth WAKE HOST", "",
293 /* Bank GPIOCLK */
294 "", "CON1 Header Pin35", "", "";
295 };
296
297 &pwm_ef {
298 status = "okay";
299 pinctrl-0 = <&pwm_e_pins>;
300 pinctrl-names = "default";
301 clocks = <&clkc CLKID_FCLK_DIV4>;
302 clock-names = "clkin0";
303 };
304
305 &saradc {
306 status = "okay";
307 vref-supply = <&vddio_ao18>;
308 };
309
310 /* SDIO */
311 &sd_emmc_a {
312 status = "okay";
313 pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>;
314 pinctrl-1 = <&sdio_clk_gate_pins>;
315 pinctrl-names = "default", "clk-gate";
316 #address-cells = <1>;
317 #size-cells = <0>;
318
319 bus-width = <4>;
320 cap-sd-highspeed;
321 max-frequency = <50000000>;
322
323 non-removable;
324 disable-wp;
325
326 /* WiFi firmware requires power to be kept while in suspend */
327 keep-power-in-suspend;
328
329 mmc-pwrseq = <&sdio_pwrseq>;
330
331 vmmc-supply = <&vddio_ao3v3>;
332 vqmmc-supply = <&vddio_ao18>;
333
334 brcmf: wifi@1 {
335 compatible = "brcm,bcm4329-fmac";
336 reg = <1>;
337 };
338 };
339
340 /* SD */
341 &sd_emmc_b {
342 status = "okay";
343 pinctrl-0 = <&sdcard_pins>;
344 pinctrl-1 = <&sdcard_clk_gate_pins>;
345 pinctrl-names = "default", "clk-gate";
346
347 bus-width = <4>;
348 cap-sd-highspeed;
349 sd-uhs-sdr12;
350 sd-uhs-sdr25;
351 sd-uhs-sdr50;
352 sd-uhs-ddr50;
353 max-frequency = <100000000>;
354 disable-wp;
355
356 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
357
358 vmmc-supply = <&vddio_ao3v3>;
359 vqmmc-supply = <&vddio_tf>;
360 };
361
362 /* eMMC */
363 &sd_emmc_c {
364 status = "disabled";
365 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
366 pinctrl-1 = <&emmc_clk_gate_pins>;
367 pinctrl-names = "default", "clk-gate";
368
369 bus-width = <8>;
370 max-frequency = <200000000>;
371 non-removable;
372 disable-wp;
373 cap-mmc-highspeed;
374 mmc-ddr-1_8v;
375 mmc-hs200-1_8v;
376
377 mmc-pwrseq = <&emmc_pwrseq>;
378 vmmc-supply = <&vcc3v3>;
379 vqmmc-supply = <&vcc1v8>;
380 };
381
382 /* DBG_UART */
383 &uart_AO {
384 status = "okay";
385 pinctrl-0 = <&uart_ao_a_pins>;
386 pinctrl-names = "default";
387 };
388
389 /* Bluetooth on AP6212 */
390 &uart_A {
391 status = "okay";
392 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
393 pinctrl-names = "default";
394 uart-has-rtscts;
395
396 bluetooth {
397 compatible = "brcm,bcm43438-bt";
398 clocks = <&wifi_32k>;
399 clock-names = "lpo";
400 vbat-supply = <&vddio_ao3v3>;
401 vddio-supply = <&vddio_ao18>;
402 host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
403 shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
404 };
405 };
406
407 /* 40-pin CON1 */
408 &uart_C {
409 status = "disabled";
410 pinctrl-0 = <&uart_c_pins>;
411 pinctrl-names = "default";
412 };
413
414 &usb0_phy {
415 status = "okay";
416 phy-supply = <&vdd_5v>;
417 };
418
419 &usb1_phy {
420 status = "okay";
421 };
422
423 &usb0 {
424 status = "okay";
425 };
426
427 &usb1 {
428 status = "okay";
429 };
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