1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2023 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7 #include <dt-bindings/clock/g12a-clkc.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/gpio/meson-g12a-gpio.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
13 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14
15 / {
16 aliases {
17 serial0 = &uart_AO;
18 ethernet0 = ðmac;
19 spi0 = &spifc;
20 };
21
22 memory@0 {
23 device_type = "memory";
24 reg = <0x0 0x0 0x0 0x80000000>;
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 dioo2133: audio-amplifier-0 {
32 compatible = "simple-audio-amplifier";
33 enable-gpios = <&gpio GPIOX_0 GPIO_ACTIVE_HIGH>;
34 VCC-supply = <&vcc_5v>;
35 sound-name-prefix = "10U2";
36 };
37
38 /* TOFIX: handle CVBS_DET on SARADC channel 0 */
39 cvbs-connector {
40 compatible = "composite-video-connector";
41
42 port {
43 cvbs_connector_in: endpoint {
44 remote-endpoint = <&cvbs_vdac_out>;
45 };
46 };
47 };
48
49 emmc_pwrseq: emmc-pwrseq {
50 compatible = "mmc-pwrseq-emmc";
51 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
52 };
53
54 hdmi-connector {
55 compatible = "hdmi-connector";
56 type = "a";
57
58 port {
59 hdmi_connector_in: endpoint {
60 remote-endpoint = <&hdmi_tx_tmds_out>;
61 };
62 };
63 };
64
65 led-blue {
66 compatible = "pwm-leds";
67
68 led {
69 color = <LED_COLOR_ID_BLUE>;
70 function = LED_FUNCTION_ACTIVITY;
71 linux,default-trigger = "heartbeat";
72 max-brightness = <255>;
73 pwms = <&pwm_ab 1 1250 0>;
74 active-low;
75 };
76 };
77
78 led-green {
79 compatible = "pwm-leds";
80
81 led {
82 color = <LED_COLOR_ID_GREEN>;
83 function = LED_FUNCTION_STATUS;
84 linux,default-trigger = "default-on";
85 max-brightness = <255>;
86 pwms = <&pwm_cd 1 1250 0>;
87 active-low;
88 };
89 };
90
91 led-orange {
92 compatible = "gpio-leds";
93
94 led {
95 color = <LED_COLOR_ID_AMBER>;
96 function = LED_FUNCTION_STANDBY;
97 gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
98 panic-indicator;
99 };
100 };
101
102 dc_in: regulator-dc-in {
103 compatible = "regulator-fixed";
104 regulator-name = "5V_IN";
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107 regulator-always-on;
108 };
109
110 flash_1v8: regulator-flash-1v8 {
111 compatible = "regulator-fixed";
112 regulator-name = "FLASH_1V8";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <1800000>;
115 regulator-always-on;
116 vin-supply = <&vcc_3v3>;
117 };
118
119 vcc_card: regulator-vcc-card {
120 compatible = "regulator-fixed";
121 regulator-name = "VCC_CARD";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 vin-supply = <&vddao_3v3>;
125 gpio = <&gpio GPIOX_2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
126 enable-active-high;
127 gpio-open-drain;
128 };
129
130 vcc_3v3: regulator-vcc-3v3 {
131 compatible = "regulator-fixed";
132 regulator-name = "VCC_3V3";
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
135 regulator-always-on;
136 vin-supply = <&vddao_3v3>;
137
138 /* FIXME: controlled by TEST_N */
139 };
140
141 vcc_5v: regulator-vcc-5v {
142 compatible = "regulator-fixed";
143 regulator-name = "VCC_5V";
144 regulator-min-microvolt = <5000000>;
145 regulator-max-microvolt = <5000000>;
146 regulator-always-on;
147 vin-supply = <&dc_in>;
148 gpio = <&gpio GPIOH_8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
149 enable-active-high;
150 gpio-open-drain;
151 };
152
153 vddao_3v3: regulator-vddao-3v3 {
154 compatible = "regulator-fixed";
155 regulator-name = "VDDAO_3V3";
156 regulator-min-microvolt = <3300000>;
157 regulator-max-microvolt = <3300000>;
158 regulator-always-on;
159 vin-supply = <&dc_in>;
160 };
161
162 vddcpu_b: regulator-vddcpu-b {
163 compatible = "pwm-regulator";
164 regulator-name = "VDDCPU_B";
165 regulator-min-microvolt = <730000>;
166 regulator-max-microvolt = <1011000>;
167 regulator-boot-on;
168 regulator-always-on;
169 pwm-supply = <&dc_in>;
170 pwms = <&pwm_AO_cd 1 1250 0>;
171 pwm-dutycycle-range = <100 0>;
172 };
173
174 vddio_ao18: regulator-vddio-ao18 {
175 compatible = "regulator-fixed";
176 regulator-name = "VDDIO_AO18";
177 regulator-min-microvolt = <1800000>;
178 regulator-max-microvolt = <1800000>;
179 regulator-always-on;
180 vin-supply = <&vddao_3v3>;
181 };
182
183 vddio_c: regulator-vddio-c {
184 compatible = "regulator-gpio";
185 regulator-name = "VDDIO_C";
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <3300000>;
188 regulator-settling-time-up-us = <200>;
189 regulator-settling-time-down-us = <50000>;
190 vin-supply = <&vddao_3v3>;
191 gpios = <&gpio GPIOX_4 GPIO_ACTIVE_HIGH>;
192 states = <3300000 0>,
193 <1800000 1>;
194 };
195
196 sound {
197 compatible = "amlogic,axg-sound-card";
198 audio-widgets = "Line", "Lineout";
199 audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmout_c>,
200 <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
201 <&dioo2133>;
202
203 clocks = <&clkc CLKID_MPLL2>,
204 <&clkc CLKID_MPLL0>,
205 <&clkc CLKID_MPLL1>;
206
207 assigned-clocks = <&clkc CLKID_MPLL2>,
208 <&clkc CLKID_MPLL0>,
209 <&clkc CLKID_MPLL1>;
210 assigned-clock-parents = <0>, <0>, <0>;
211 assigned-clock-rates = <294912000>,
212 <270950400>,
213 <393216000>;
214
215 dai-link-0 {
216 sound-dai = <&frddr_a>;
217 };
218
219 dai-link-1 {
220 sound-dai = <&frddr_b>;
221 };
222
223 dai-link-2 {
224 sound-dai = <&frddr_c>;
225 };
226
227 dai-link-3 {
228 sound-dai = <&toddr_a>;
229 };
230
231 dai-link-4 {
232 sound-dai = <&toddr_b>;
233 };
234
235 dai-link-5 {
236 sound-dai = <&toddr_c>;
237 };
238
239 /*
240 * Audio setup: The 40 pins header provides access to 2 TDMs,
241 * SPDIF In/Out and PDM inputs.
242 * - TDM A: 2 lanes
243 * D0: 40/X9
244 * D1: 38/X8
245 * BCLK: 12/X11
246 * FS: 35/X10
247 * - TDM B: 4 lanes
248 * D0: 37/A3
249 * D1: 16/A4
250 * D2: 18/A5 or 7/AO6
251 * D3: 22/A6 or 21/H5
252 * BCLK: 29/A1 or 8/AO8
253 * FS: 31/A2 or 11/AO7
254 * - 2 Master Clocks:
255 * MCLK0: 15/A0 or 10/AO9
256 * MCLK1: 33/X15
257 * - SPDIF:
258 * OUT: 32/A11
259 * IN: 21/H5
260 * - PDM Input:
261 * DO: 13/A8
262 * D1: 26/A9
263 * D2: 22/A6
264 * D3: 18/A5
265 * DCLK: 36/A7
266 *
267 * TDM C is not usable on the 40 pins connector so it is
268 * setup for the HDMI 4 lanes i2s.
269 *
270 * No pinctrl is enabled by default to preserve the
271 * genericity of the 40 pins header. Many configurations are
272 * possible based on the desired use case. Please adjust TDM
273 * masks, clock setups and pinctrl accordingly.
274 */
275
276 dai-link-6 {
277 sound-dai = <&tdmif_a>;
278 dai-format = "dsp_a";
279 dai-tdm-slot-tx-mask-0 = <1 1>;
280 mclk-fs = <256>;
281
282 codec-0 {
283 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
284 };
285
286 codec-1 {
287 sound-dai = <&toacodec TOACODEC_IN_A>;
288 };
289 };
290
291 dai-link-7 {
292 sound-dai = <&tdmif_b>;
293 dai-format = "i2s";
294 dai-tdm-slot-tx-mask-0 = <1 1>;
295 dai-tdm-slot-rx-mask-1 = <1 1>;
296 mclk-fs = <256>;
297
298 codec-0 {
299 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
300 };
301
302 codec-1 {
303 sound-dai = <&toacodec TOACODEC_IN_B>;
304 };
305 };
306
307 dai-link-8 {
308 sound-dai = <&tdmif_c>;
309 dai-format = "i2s";
310 dai-tdm-slot-tx-mask-0 = <1 1>;
311 dai-tdm-slot-tx-mask-1 = <1 1>;
312 dai-tdm-slot-tx-mask-2 = <1 1>;
313 dai-tdm-slot-tx-mask-3 = <1 1>;
314 mclk-fs = <256>;
315
316 codec-0 {
317 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
318 };
319
320 codec-1 {
321 sound-dai = <&toacodec TOACODEC_IN_C>;
322 };
323 };
324
325 dai-link-9 {
326 sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
327
328 codec {
329 sound-dai = <&hdmi_tx>;
330 };
331 };
332
333 dai-link-10 {
334 sound-dai = <&toacodec TOACODEC_OUT>;
335
336 codec {
337 sound-dai = <&acodec>;
338 };
339 };
340 };
341 };
342
343 &acodec {
344 status = "okay";
345 AVDD-supply = <&vddio_ao18>;
346 };
347
348 &arb {
349 status = "okay";
350 };
351
352 &cecb_AO {
353 status = "okay";
354 pinctrl-0 = <&cec_ao_b_h_pins>;
355 pinctrl-names = "default";
356 hdmi-phandle = <&hdmi_tx>;
357 };
358
359 &clkc_audio {
360 status = "okay";
361 };
362
363 &cvbs_vdac_port {
364 cvbs_vdac_out: endpoint {
365 remote-endpoint = <&cvbs_connector_in>;
366 };
367 };
368
369 &dwc3 {
370 #address-cells = <1>;
371 #size-cells = <0>;
372
373 hub: hub@1 {
374 compatible = "usb5e3,626";
375 reg = <1>;
376 reset-gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
377 vdd-supply = <&vcc_5v>;
378 };
379 };
380
381 ðmac {
382 pinctrl-0 = <ð_pins>, <ð_rgmii_pins>, <ð_phy_irq_pins>;
383 pinctrl-names = "default";
384 status = "okay";
385 phy-mode = "rgmii";
386 phy-handle = <&external_phy>;
387 amlogic,tx-delay-ns = <2>;
388 };
389
390 &ext_mdio {
391 external_phy: ethernet-phy@0 {
392 /* Realtek RTL8211F (0x001cc916) */
393 reg = <0>;
394 max-speed = <1000>;
395
396 reset-assert-us = <100000>;
397 reset-deassert-us = <100000>;
398 reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
399
400 interrupt-parent = <&gpio_intc>;
401 /* MAC_INTR on GPIOZ_14 */
402 interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
403 };
404 };
405
406 &frddr_a {
407 status = "okay";
408 };
409
410 &frddr_b {
411 status = "okay";
412 };
413
414 &frddr_c {
415 status = "okay";
416 };
417
418 &hdmi_tx {
419 status = "okay";
420 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
421 pinctrl-names = "default";
422 hdmi-supply = <&vcc_5v>;
423 };
424
425 &hdmi_tx_tmds_port {
426 hdmi_tx_tmds_out: endpoint {
427 remote-endpoint = <&hdmi_connector_in>;
428 };
429 };
430
431 &ir {
432 status = "okay";
433 pinctrl-0 = <&remote_input_ao_pins>;
434 pinctrl-names = "default";
435 };
436
437 &periphs_pinctrl {
438 spi_cs_disable_pins: spi-cs-disable {
439 mux {
440 groups = "BOOT_14";
441 function = "gpio_periphs";
442 bias-disable;
443 output-high;
444 };
445 };
446
447 eth_phy_irq_pins: eth-phy-irq {
448 mux {
449 groups = "GPIOZ_14";
450 function = "gpio_periphs";
451 bias-pull-up;
452 output-disable;
453 };
454 };
455 };
456
457 &pwm_AO_cd {
458 status = "okay";
459 pinctrl-0 = <&pwm_ao_d_e_pins>;
460 pinctrl-names = "default";
461 clocks = <&xtal>;
462 clock-names = "clkin1";
463 };
464
465 &pwm_ab {
466 status = "okay";
467 pinctrl-0 = <&pwm_b_x7_pins>;
468 pinctrl-names = "default";
469 clocks = <&xtal>;
470 clock-names = "clkin1";
471 };
472
473 &pwm_cd {
474 status = "okay";
475 pinctrl-0 = <&pwm_d_x3_pins>;
476 pinctrl-names = "default";
477 clocks = <&xtal>;
478 clock-names = "clkin1";
479 };
480
481 &saradc {
482 status = "okay";
483 vref-supply = <&vddio_ao18>;
484 };
485
486 /* SD card */
487 &sd_emmc_b {
488 status = "okay";
489 pinctrl-0 = <&sdcard_c_pins>;
490 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
491 pinctrl-names = "default", "clk-gate";
492
493 bus-width = <4>;
494 cap-sd-highspeed;
495 sd-uhs-sdr12;
496 sd-uhs-sdr25;
497 sd-uhs-sdr50;
498 sd-uhs-sdr104;
499 max-frequency = <200000000>;
500 disable-wp;
501
502 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
503 vmmc-supply = <&vcc_card>;
504 vqmmc-supply = <&vddio_c>;
505 };
506
507 /*
508 * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
509 * and eMMC Data 4 to 7 pins.
510 * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
511 * and change bus-width to 4 then spifc can be enabled.
512 */
513 &sd_emmc_c {
514 status = "okay";
515 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>,
516 <&spi_cs_disable_pins>;
517 pinctrl-1 = <&emmc_clk_gate_pins>;
518 pinctrl-names = "default", "clk-gate";
519
520 bus-width = <8>;
521 cap-mmc-highspeed;
522 mmc-hs200-1_8v;
523 max-frequency = <200000000>;
524 disable-wp;
525
526 mmc-pwrseq = <&emmc_pwrseq>;
527 vmmc-supply = <&vcc_3v3>;
528 vqmmc-supply = <&flash_1v8>;
529 };
530
531 &spifc {
532 status = "disabled";
533 pinctrl-0 = <&nor_pins>;
534 pinctrl-names = "default";
535 cs-gpios = <&gpio BOOT_14 GPIO_ACTIVE_LOW>;
536
537 w25lq128d: flash@0 {
538 compatible = "jedec,spi-nor";
539 reg = <0>;
540 #address-cells = <1>;
541 #size-cells = <1>;
542 spi-max-frequency = <80000000>;
543 };
544 };
545
546 &tdmif_a {
547 status = "okay";
548 };
549
550 &tdmif_b {
551 status = "okay";
552 };
553
554 &tdmif_c {
555 status = "okay";
556 };
557
558 &tdmin_a {
559 status = "okay";
560 };
561
562 &tdmin_b {
563 status = "okay";
564 };
565
566 &tdmin_c {
567 status = "okay";
568 };
569
570 &tdmout_a {
571 status = "okay";
572 };
573
574 &tdmout_b {
575 status = "okay";
576 };
577
578 &tdmout_c {
579 status = "okay";
580 };
581
582 &toacodec {
583 status = "okay";
584 };
585
586 &toddr_a {
587 status = "okay";
588 };
589
590 &toddr_b {
591 status = "okay";
592 };
593
594 &toddr_c {
595 status = "okay";
596 };
597
598 &tohdmitx {
599 status = "okay";
600 };
601
602 &uart_AO {
603 status = "okay";
604 pinctrl-0 = <&uart_ao_a_pins>;
605 pinctrl-names = "default";
606 };
607
608 &usb2_phy1 {
609 phy-supply = <&dc_in>;
610 };
611
612 &usb3_pcie_phy {
613 phy-supply = <&vcc_5v>;
614 };
615
616 &usb {
617 status = "okay";
618 };
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