1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
2 /*
3 * PMGR Power domains for the Apple T8112 "M2" SoC
4 *
5 * Copyright The Asahi Linux Contributors
6 */
7
8
9 &pmgr {
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 reg = <0x100 4>;
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
15 label = "sbr";
16 apple,always-on; /* Core device */
17 };
18
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 reg = <0x108 4>;
22 #power-domain-cells = <0>;
23 #reset-cells = <0>;
24 label = "aic";
25 apple,always-on; /* Core device */
26 };
27
28 ps_dwi: power-controller@110 {
29 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
30 reg = <0x110 4>;
31 #power-domain-cells = <0>;
32 #reset-cells = <0>;
33 label = "dwi";
34 apple,always-on; /* Core device */
35 };
36
37 ps_soc_spmi0: power-controller@118 {
38 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
39 reg = <0x118 4>;
40 #power-domain-cells = <0>;
41 #reset-cells = <0>;
42 label = "soc_spmi0";
43 };
44
45 ps_gpio: power-controller@120 {
46 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
47 reg = <0x120 4>;
48 #power-domain-cells = <0>;
49 #reset-cells = <0>;
50 label = "gpio";
51 };
52
53 ps_pms_busif: power-controller@128 {
54 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
55 reg = <0x128 4>;
56 #power-domain-cells = <0>;
57 #reset-cells = <0>;
58 label = "pms_busif";
59 apple,always-on; /* Core device */
60 };
61
62 ps_pms: power-controller@130 {
63 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
64 reg = <0x130 4>;
65 #power-domain-cells = <0>;
66 #reset-cells = <0>;
67 label = "pms";
68 apple,always-on; /* Core device */
69 };
70
71 ps_pms_c1ppt: power-controller@160 {
72 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
73 reg = <0x160 4>;
74 #power-domain-cells = <0>;
75 #reset-cells = <0>;
76 label = "pms_c1ppt";
77 power-domains = <&ps_pms>;
78 };
79
80 ps_soc_dpe: power-controller@168 {
81 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
82 reg = <0x168 4>;
83 #power-domain-cells = <0>;
84 #reset-cells = <0>;
85 label = "soc_dpe";
86 apple,always-on; /* Core device */
87 };
88
89 ps_pmgr_soc_ocla: power-controller@170 {
90 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
91 reg = <0x170 4>;
92 #power-domain-cells = <0>;
93 #reset-cells = <0>;
94 label = "pmgr_soc_ocla";
95 power-domains = <&ps_pms>;
96 };
97
98 ps_ispsens0: power-controller@178 {
99 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
100 reg = <0x178 4>;
101 #power-domain-cells = <0>;
102 #reset-cells = <0>;
103 label = "ispsens0";
104 };
105
106 ps_ispsens1: power-controller@180 {
107 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
108 reg = <0x180 4>;
109 #power-domain-cells = <0>;
110 #reset-cells = <0>;
111 label = "ispsens1";
112 };
113
114 ps_ispsens2: power-controller@188 {
115 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
116 reg = <0x188 4>;
117 #power-domain-cells = <0>;
118 #reset-cells = <0>;
119 label = "ispsens2";
120 };
121
122 ps_ispsens3: power-controller@190 {
123 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
124 reg = <0x190 4>;
125 #power-domain-cells = <0>;
126 #reset-cells = <0>;
127 label = "ispsens3";
128 };
129
130 ps_pcie_ref: power-controller@198 {
131 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
132 reg = <0x198 4>;
133 #power-domain-cells = <0>;
134 #reset-cells = <0>;
135 label = "pcie_ref";
136 };
137
138 ps_aft0: power-controller@1a0 {
139 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
140 reg = <0x1a0 4>;
141 #power-domain-cells = <0>;
142 #reset-cells = <0>;
143 label = "aft0";
144 };
145
146 ps_imx: power-controller@1a8 {
147 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
148 reg = <0x1a8 4>;
149 #power-domain-cells = <0>;
150 #reset-cells = <0>;
151 label = "imx";
152 apple,always-on; /* Apple fabric, critical block */
153 };
154
155 ps_sio_busif: power-controller@1b0 {
156 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
157 reg = <0x1b0 4>;
158 #power-domain-cells = <0>;
159 #reset-cells = <0>;
160 label = "sio_busif";
161 };
162
163 ps_sio: power-controller@1b8 {
164 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
165 reg = <0x1b8 4>;
166 #power-domain-cells = <0>;
167 #reset-cells = <0>;
168 label = "sio";
169 apple,always-on;
170 power-domains = <&ps_sio_busif>;
171 };
172
173 ps_sio_cpu: power-controller@1c0 {
174 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
175 reg = <0x1c0 4>;
176 #power-domain-cells = <0>;
177 #reset-cells = <0>;
178 label = "sio_cpu";
179 power-domains = <&ps_sio>;
180 };
181
182 ps_fpwm0: power-controller@1c8 {
183 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
184 reg = <0x1c8 4>;
185 #power-domain-cells = <0>;
186 #reset-cells = <0>;
187 label = "fpwm0";
188 power-domains = <&ps_sio>;
189 };
190
191 ps_fpwm1: power-controller@1d0 {
192 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
193 reg = <0x1d0 4>;
194 #power-domain-cells = <0>;
195 #reset-cells = <0>;
196 label = "fpwm1";
197 power-domains = <&ps_sio>;
198 };
199
200 ps_fpwm2: power-controller@1d8 {
201 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
202 reg = <0x1d8 4>;
203 #power-domain-cells = <0>;
204 #reset-cells = <0>;
205 label = "fpwm2";
206 power-domains = <&ps_sio>;
207 };
208
209 ps_i2c0: power-controller@1e0 {
210 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
211 reg = <0x1e0 4>;
212 #power-domain-cells = <0>;
213 #reset-cells = <0>;
214 label = "i2c0";
215 power-domains = <&ps_sio>;
216 };
217
218 ps_i2c1: power-controller@1e8 {
219 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
220 reg = <0x1e8 4>;
221 #power-domain-cells = <0>;
222 #reset-cells = <0>;
223 label = "i2c1";
224 power-domains = <&ps_sio>;
225 };
226
227 ps_i2c2: power-controller@1f0 {
228 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
229 reg = <0x1f0 4>;
230 #power-domain-cells = <0>;
231 #reset-cells = <0>;
232 label = "i2c2";
233 power-domains = <&ps_sio>;
234 };
235
236 ps_i2c3: power-controller@1f8 {
237 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
238 reg = <0x1f8 4>;
239 #power-domain-cells = <0>;
240 #reset-cells = <0>;
241 label = "i2c3";
242 power-domains = <&ps_sio>;
243 };
244
245 ps_i2c4: power-controller@200 {
246 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
247 reg = <0x200 4>;
248 #power-domain-cells = <0>;
249 #reset-cells = <0>;
250 label = "i2c4";
251 power-domains = <&ps_sio>;
252 };
253
254 ps_spi_p: power-controller@208 {
255 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
256 reg = <0x208 4>;
257 #power-domain-cells = <0>;
258 #reset-cells = <0>;
259 label = "spi_p";
260 power-domains = <&ps_sio>;
261 };
262
263 ps_uart_p: power-controller@210 {
264 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
265 reg = <0x210 4>;
266 #power-domain-cells = <0>;
267 #reset-cells = <0>;
268 label = "uart_p";
269 power-domains = <&ps_sio>;
270 };
271
272 ps_audio_p: power-controller@218 {
273 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
274 reg = <0x218 4>;
275 #power-domain-cells = <0>;
276 #reset-cells = <0>;
277 label = "audio_p";
278 power-domains = <&ps_sio>;
279 };
280
281 ps_aes: power-controller@220 {
282 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
283 reg = <0x220 4>;
284 #power-domain-cells = <0>;
285 #reset-cells = <0>;
286 label = "aes";
287 power-domains = <&ps_sio>;
288 };
289
290 ps_spi0: power-controller@228 {
291 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
292 reg = <0x228 4>;
293 #power-domain-cells = <0>;
294 #reset-cells = <0>;
295 label = "spi0";
296 power-domains = <&ps_spi_p>;
297 };
298
299 ps_spi1: power-controller@230 {
300 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
301 reg = <0x230 4>;
302 #power-domain-cells = <0>;
303 #reset-cells = <0>;
304 label = "spi1";
305 power-domains = <&ps_spi_p>;
306 };
307
308 ps_spi2: power-controller@238 {
309 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
310 reg = <0x238 4>;
311 #power-domain-cells = <0>;
312 #reset-cells = <0>;
313 label = "spi2";
314 power-domains = <&ps_spi_p>;
315 };
316
317 ps_spi3: power-controller@240 {
318 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
319 reg = <0x240 4>;
320 #power-domain-cells = <0>;
321 #reset-cells = <0>;
322 label = "spi3";
323 power-domains = <&ps_spi_p>;
324 };
325
326 ps_spi4: power-controller@248 {
327 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
328 reg = <0x248 4>;
329 #power-domain-cells = <0>;
330 #reset-cells = <0>;
331 label = "spi4";
332 power-domains = <&ps_spi_p>;
333 };
334
335 ps_spi5: power-controller@250 {
336 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
337 reg = <0x250 4>;
338 #power-domain-cells = <0>;
339 #reset-cells = <0>;
340 label = "spi5";
341 power-domains = <&ps_spi_p>;
342 };
343
344 ps_uart_n: power-controller@258 {
345 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
346 reg = <0x258 4>;
347 #power-domain-cells = <0>;
348 #reset-cells = <0>;
349 label = "uart_n";
350 power-domains = <&ps_uart_p>;
351 };
352
353 ps_uart0: power-controller@260 {
354 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
355 reg = <0x260 4>;
356 #power-domain-cells = <0>;
357 #reset-cells = <0>;
358 label = "uart0";
359 power-domains = <&ps_uart_p>;
360 };
361
362 ps_uart1: power-controller@268 {
363 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
364 reg = <0x268 4>;
365 #power-domain-cells = <0>;
366 #reset-cells = <0>;
367 label = "uart1";
368 power-domains = <&ps_uart_p>;
369 };
370
371 ps_uart2: power-controller@270 {
372 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
373 reg = <0x270 4>;
374 #power-domain-cells = <0>;
375 #reset-cells = <0>;
376 label = "uart2";
377 power-domains = <&ps_uart_p>;
378 };
379
380 ps_uart3: power-controller@278 {
381 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
382 reg = <0x278 4>;
383 #power-domain-cells = <0>;
384 #reset-cells = <0>;
385 label = "uart3";
386 power-domains = <&ps_uart_p>;
387 };
388
389 ps_uart4: power-controller@280 {
390 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
391 reg = <0x280 4>;
392 #power-domain-cells = <0>;
393 #reset-cells = <0>;
394 label = "uart4";
395 power-domains = <&ps_uart_p>;
396 };
397
398 ps_uart5: power-controller@288 {
399 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
400 reg = <0x288 4>;
401 #power-domain-cells = <0>;
402 #reset-cells = <0>;
403 label = "uart5";
404 power-domains = <&ps_uart_p>;
405 };
406
407 ps_uart6: power-controller@290 {
408 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
409 reg = <0x290 4>;
410 #power-domain-cells = <0>;
411 #reset-cells = <0>;
412 label = "uart6";
413 power-domains = <&ps_uart_p>;
414 };
415
416 ps_uart7: power-controller@298 {
417 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
418 reg = <0x298 4>;
419 #power-domain-cells = <0>;
420 #reset-cells = <0>;
421 label = "uart7";
422 power-domains = <&ps_uart_p>;
423 };
424
425 ps_uart8: power-controller@2a0 {
426 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
427 reg = <0x2a0 4>;
428 #power-domain-cells = <0>;
429 #reset-cells = <0>;
430 label = "uart8";
431 power-domains = <&ps_uart_p>;
432 };
433
434 ps_sio_adma: power-controller@2a8 {
435 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
436 reg = <0x2a8 4>;
437 #power-domain-cells = <0>;
438 #reset-cells = <0>;
439 label = "sio_adma";
440 power-domains = <&ps_spi_p>, <&ps_audio_p>;
441 };
442
443 ps_dpa0: power-controller@2b0 {
444 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
445 reg = <0x2b0 4>;
446 #power-domain-cells = <0>;
447 #reset-cells = <0>;
448 label = "dpa0";
449 power-domains = <&ps_audio_p>;
450 };
451
452 ps_dpa1: power-controller@2b8 {
453 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
454 reg = <0x2b8 4>;
455 #power-domain-cells = <0>;
456 #reset-cells = <0>;
457 label = "dpa1";
458 power-domains = <&ps_audio_p>;
459 };
460
461 ps_mca0: power-controller@2c0 {
462 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
463 reg = <0x2c0 4>;
464 #power-domain-cells = <0>;
465 #reset-cells = <0>;
466 label = "mca0";
467 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
468 };
469
470 ps_mca1: power-controller@2c8 {
471 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
472 reg = <0x2c8 4>;
473 #power-domain-cells = <0>;
474 #reset-cells = <0>;
475 label = "mca1";
476 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
477 };
478
479 ps_mca2: power-controller@2d0 {
480 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
481 reg = <0x2d0 4>;
482 #power-domain-cells = <0>;
483 #reset-cells = <0>;
484 label = "mca2";
485 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
486 };
487
488 ps_mca3: power-controller@2d8 {
489 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
490 reg = <0x2d8 4>;
491 #power-domain-cells = <0>;
492 #reset-cells = <0>;
493 label = "mca3";
494 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
495 };
496
497 ps_mca4: power-controller@2e0 {
498 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
499 reg = <0x2e0 4>;
500 #power-domain-cells = <0>;
501 #reset-cells = <0>;
502 label = "mca4";
503 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
504 };
505
506 ps_mca5: power-controller@2e8 {
507 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
508 reg = <0x2e8 4>;
509 #power-domain-cells = <0>;
510 #reset-cells = <0>;
511 label = "mca5";
512 power-domains = <&ps_sio_adma>, <&ps_audio_p>;
513 };
514
515 ps_mcc: power-controller@2f0 {
516 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
517 reg = <0x2f0 4>;
518 #power-domain-cells = <0>;
519 #reset-cells = <0>;
520 label = "mcc";
521 apple,always-on; /* Memory controller */
522 };
523
524 ps_dcs0: power-controller@2f8 {
525 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
526 reg = <0x2f8 4>;
527 #power-domain-cells = <0>;
528 #reset-cells = <0>;
529 label = "dcs0";
530 apple,always-on; /* LPDDR4 interface */
531 };
532
533 ps_dcs2: power-controller@300 {
534 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
535 reg = <0x300 4>;
536 #power-domain-cells = <0>;
537 #reset-cells = <0>;
538 label = "dcs2";
539 apple,always-on; /* LPDDR4 interface */
540 };
541
542 ps_dcs1: power-controller@308 {
543 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
544 reg = <0x308 4>;
545 #power-domain-cells = <0>;
546 #reset-cells = <0>;
547 label = "dcs1";
548 apple,always-on; /* LPDDR4 interface */
549 };
550
551 ps_dcs3: power-controller@310 {
552 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
553 reg = <0x310 4>;
554 #power-domain-cells = <0>;
555 #reset-cells = <0>;
556 label = "dcs3";
557 apple,always-on; /* LPDDR4 interface */
558 };
559
560 ps_dcs4: power-controller@318 {
561 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
562 reg = <0x318 4>;
563 #power-domain-cells = <0>;
564 #reset-cells = <0>;
565 label = "dcs4";
566 apple,always-on; /* LPDDR4 interface */
567 };
568
569 ps_dcs5: power-controller@320 {
570 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
571 reg = <0x320 4>;
572 #power-domain-cells = <0>;
573 #reset-cells = <0>;
574 label = "dcs5";
575 apple,always-on; /* LPDDR4 interface */
576 };
577
578 ps_dcs6: power-controller@328 {
579 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
580 reg = <0x328 4>;
581 #power-domain-cells = <0>;
582 #reset-cells = <0>;
583 label = "dcs6";
584 apple,always-on; /* LPDDR4 interface */
585 };
586
587 ps_dcs7: power-controller@330 {
588 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
589 reg = <0x330 4>;
590 #power-domain-cells = <0>;
591 #reset-cells = <0>;
592 label = "dcs7";
593 apple,always-on; /* LPDDR4 interface */
594 };
595
596 ps_smx0: power-controller@338 {
597 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
598 reg = <0x338 4>;
599 #power-domain-cells = <0>;
600 #reset-cells = <0>;
601 label = "smx0";
602 apple,always-on; /* Apple fabric, critical block */
603 };
604
605 ps_smx1: power-controller@340 {
606 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
607 reg = <0x340 4>;
608 #power-domain-cells = <0>;
609 #reset-cells = <0>;
610 label = "smx1";
611 apple,always-on; /* Apple fabric, critical block */
612 };
613
614 ps_apcie: power-controller@348 {
615 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
616 reg = <0x348 4>;
617 #power-domain-cells = <0>;
618 #reset-cells = <0>;
619 label = "apcie";
620 power-domains = <&ps_imx>, <&ps_pcie_ref>;
621 };
622
623 ps_rmx0: power-controller@350 {
624 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
625 reg = <0x350 4>;
626 #power-domain-cells = <0>;
627 #reset-cells = <0>;
628 label = "rmx0";
629 /* Apple Fabric, display/image stuff: this can power down */
630 };
631
632 ps_rmx1: power-controller@358 {
633 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
634 reg = <0x358 4>;
635 #power-domain-cells = <0>;
636 #reset-cells = <0>;
637 label = "rmx1";
638 /* Apple Fabric, display/image stuff: this can power down */
639 };
640
641 ps_cmx: power-controller@360 {
642 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
643 reg = <0x360 4>;
644 #power-domain-cells = <0>;
645 #reset-cells = <0>;
646 label = "cmx";
647 apple,always-on; /* Apple fabric, critical block */
648 };
649
650 ps_mmx: power-controller@368 {
651 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
652 reg = <0x368 4>;
653 #power-domain-cells = <0>;
654 #reset-cells = <0>;
655 label = "mmx";
656 /* Apple Fabric, media stuff: this can power down */
657 };
658
659 ps_disp0_sys: power-controller@370 {
660 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
661 reg = <0x370 4>;
662 #power-domain-cells = <0>;
663 #reset-cells = <0>;
664 label = "disp0_sys";
665 power-domains = <&ps_rmx1>;
666 apple,always-on; /* TODO: figure out if we can enable PM here */
667 };
668
669 ps_disp0_fe: power-controller@378 {
670 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
671 reg = <0x378 4>;
672 #power-domain-cells = <0>;
673 #reset-cells = <0>;
674 label = "disp0_fe";
675 power-domains = <&ps_disp0_sys>;
676 apple,always-on; /* TODO: figure out if we can enable PM here */
677 };
678
679 ps_dispext_sys: power-controller@380 {
680 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
681 reg = <0x380 4>;
682 #power-domain-cells = <0>;
683 #reset-cells = <0>;
684 label = "dispext_sys";
685 power-domains = <&ps_rmx0>;
686 };
687
688 ps_dispext_fe: power-controller@388 {
689 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
690 reg = <0x388 4>;
691 #power-domain-cells = <0>;
692 #reset-cells = <0>;
693 label = "dispext_fe";
694 power-domains = <&ps_dispext_sys>;
695 };
696
697 ps_dispext_cpu0: power-controller@3c8 {
698 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
699 reg = <0x3c8 4>;
700 #power-domain-cells = <0>;
701 #reset-cells = <0>;
702 label = "dispext_cpu0";
703 power-domains = <&ps_dispext_fe>;
704 apple,min-state = <4>;
705 };
706
707 ps_dptx_ext_phy: power-controller@3d8 {
708 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
709 reg = <0x3d8 4>;
710 #power-domain-cells = <0>;
711 #reset-cells = <0>;
712 label = "dptx_ext_phy";
713 };
714
715 ps_dispdfr_fe: power-controller@3e0 {
716 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
717 reg = <0x3e0 4>;
718 #power-domain-cells = <0>;
719 #reset-cells = <0>;
720 label = "dispdfr_fe";
721 power-domains = <&ps_rmx0>;
722 };
723
724 ps_dispdfr_be: power-controller@3e8 {
725 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
726 reg = <0x3e8 4>;
727 #power-domain-cells = <0>;
728 #reset-cells = <0>;
729 label = "dispdfr_be";
730 power-domains = <&ps_dispdfr_fe>;
731 };
732
733 ps_mipi_dsi: power-controller@3f0 {
734 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
735 reg = <0x3f0 4>;
736 #power-domain-cells = <0>;
737 #reset-cells = <0>;
738 label = "mipi_dsi";
739 power-domains = <&ps_dispdfr_be>;
740 };
741
742 ps_jpg: power-controller@3f8 {
743 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
744 reg = <0x3f8 4>;
745 #power-domain-cells = <0>;
746 #reset-cells = <0>;
747 label = "jpg";
748 power-domains = <&ps_cmx>;
749 };
750
751 ps_apcie_gp: power-controller@400 {
752 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
753 reg = <0x400 4>;
754 #power-domain-cells = <0>;
755 #reset-cells = <0>;
756 label = "apcie_gp";
757 power-domains = <&ps_apcie>;
758 apple,always-on; /* Breaks things if shut down */
759 };
760
761 ps_msr: power-controller@408 {
762 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
763 reg = <0x408 4>;
764 #power-domain-cells = <0>;
765 #reset-cells = <0>;
766 label = "msr";
767 power-domains = <&ps_imx>;
768 };
769
770 ps_pmp: power-controller@410 {
771 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
772 reg = <0x410 4>;
773 #power-domain-cells = <0>;
774 #reset-cells = <0>;
775 label = "pmp";
776 apple,always-on;
777 };
778
779 ps_pms_sram: power-controller@418 {
780 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
781 reg = <0x418 4>;
782 #power-domain-cells = <0>;
783 #reset-cells = <0>;
784 label = "pms_sram";
785 apple,always-on;
786 };
787
788 ps_msr_ase_core: power-controller@420 {
789 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
790 reg = <0x420 4>;
791 #power-domain-cells = <0>;
792 #reset-cells = <0>;
793 label = "msr_ase_core";
794 power-domains = <&ps_msr>;
795 };
796
797 ps_ans: power-controller@428 {
798 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
799 reg = <0x428 4>;
800 #power-domain-cells = <0>;
801 #reset-cells = <0>;
802 label = "ans";
803 power-domains = <&ps_imx>;
804 };
805
806 ps_gfx: power-controller@430 {
807 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
808 reg = <0x430 4>;
809 #power-domain-cells = <0>;
810 #reset-cells = <0>;
811 label = "gfx";
812 };
813
814 ps_isp_sys: power-controller@438 {
815 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
816 reg = <0x438 4>;
817 #power-domain-cells = <0>;
818 #reset-cells = <0>;
819 label = "isp_sys";
820 power-domains = <&ps_rmx1>;
821 };
822
823 ps_venc_sys: power-controller@440 {
824 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
825 reg = <0x440 4>;
826 #power-domain-cells = <0>;
827 #reset-cells = <0>;
828 label = "venc_sys";
829 power-domains = <&ps_rmx1>;
830 };
831
832 ps_avd_sys: power-controller@448 {
833 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
834 reg = <0x448 4>;
835 #power-domain-cells = <0>;
836 #reset-cells = <0>;
837 label = "avd_sys";
838 power-domains = <&ps_mmx>;
839 };
840
841 ps_apcie_st: power-controller@450 {
842 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
843 reg = <0x450 4>;
844 #power-domain-cells = <0>;
845 #reset-cells = <0>;
846 label = "apcie_st";
847 power-domains = <&ps_apcie>, <&ps_ans>;
848 };
849
850 ps_atc0_common: power-controller@458 {
851 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
852 reg = <0x458 4>;
853 #power-domain-cells = <0>;
854 #reset-cells = <0>;
855 label = "atc0_common";
856 power-domains = <&ps_imx>;
857 };
858
859 ps_atc0_pcie: power-controller@460 {
860 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
861 reg = <0x460 4>;
862 #power-domain-cells = <0>;
863 #reset-cells = <0>;
864 label = "atc0_pcie";
865 power-domains = <&ps_atc0_common>;
866 };
867
868 ps_atc0_cio: power-controller@468 {
869 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
870 reg = <0x468 4>;
871 #power-domain-cells = <0>;
872 #reset-cells = <0>;
873 label = "atc0_cio";
874 power-domains = <&ps_atc0_common>;
875 };
876
877 ps_atc0_cio_pcie: power-controller@470 {
878 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
879 reg = <0x470 4>;
880 #power-domain-cells = <0>;
881 #reset-cells = <0>;
882 label = "atc0_cio_pcie";
883 power-domains = <&ps_atc0_cio>;
884 };
885
886 ps_atc0_cio_usb: power-controller@478 {
887 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
888 reg = <0x478 4>;
889 #power-domain-cells = <0>;
890 #reset-cells = <0>;
891 label = "atc0_cio_usb";
892 power-domains = <&ps_atc0_cio>;
893 };
894
895 ps_atc1_common: power-controller@480 {
896 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
897 reg = <0x480 4>;
898 #power-domain-cells = <0>;
899 #reset-cells = <0>;
900 label = "atc1_common";
901 power-domains = <&ps_rmx0>;
902 };
903
904 ps_atc1_pcie: power-controller@488 {
905 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
906 reg = <0x488 4>;
907 #power-domain-cells = <0>;
908 #reset-cells = <0>;
909 label = "atc1_pcie";
910 power-domains = <&ps_atc1_common>;
911 };
912
913 ps_atc1_cio: power-controller@490 {
914 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
915 reg = <0x490 4>;
916 #power-domain-cells = <0>;
917 #reset-cells = <0>;
918 label = "atc1_cio";
919 power-domains = <&ps_atc1_common>;
920 };
921
922 ps_atc1_cio_pcie: power-controller@498 {
923 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
924 reg = <0x498 4>;
925 #power-domain-cells = <0>;
926 #reset-cells = <0>;
927 label = "atc1_cio_pcie";
928 power-domains = <&ps_atc1_cio>;
929 };
930
931 ps_atc1_cio_usb: power-controller@4a0 {
932 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
933 reg = <0x4a0 4>;
934 #power-domain-cells = <0>;
935 #reset-cells = <0>;
936 label = "atc1_cio_usb";
937 power-domains = <&ps_atc1_cio>;
938 };
939
940 ps_ane_sys: power-controller@4a8 {
941 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
942 reg = <0x4a8 4>;
943 #power-domain-cells = <0>;
944 #reset-cells = <0>;
945 label = "ane_sys";
946 power-domains = <&ps_mmx>;
947 };
948
949 ps_scodec: power-controller@4b0 {
950 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
951 reg = <0x4b0 4>;
952 #power-domain-cells = <0>;
953 #reset-cells = <0>;
954 label = "scodec";
955 power-domains = <&ps_rmx0>;
956 };
957
958 ps_sep: power-controller@c00 {
959 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
960 reg = <0xc00 4>;
961 #power-domain-cells = <0>;
962 #reset-cells = <0>;
963 label = "sep";
964 apple,always-on;
965 };
966
967 ps_venc_dma: power-controller@8000 {
968 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
969 reg = <0x8000 4>;
970 #power-domain-cells = <0>;
971 #reset-cells = <0>;
972 label = "venc_dma";
973 power-domains = <&ps_venc_sys>;
974 };
975
976 ps_venc_pipe4: power-controller@8008 {
977 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
978 reg = <0x8008 4>;
979 #power-domain-cells = <0>;
980 #reset-cells = <0>;
981 label = "venc_pipe4";
982 power-domains = <&ps_venc_dma>;
983 };
984
985 ps_venc_pipe5: power-controller@8010 {
986 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
987 reg = <0x8010 4>;
988 #power-domain-cells = <0>;
989 #reset-cells = <0>;
990 label = "venc_pipe5";
991 power-domains = <&ps_venc_dma>;
992 };
993
994 ps_venc_me0: power-controller@8018 {
995 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
996 reg = <0x8018 4>;
997 #power-domain-cells = <0>;
998 #reset-cells = <0>;
999 label = "venc_me0";
1000 power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>;
1001 };
1002
1003 ps_venc_me1: power-controller@8020 {
1004 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1005 reg = <0x8020 4>;
1006 #power-domain-cells = <0>;
1007 #reset-cells = <0>;
1008 label = "venc_me1";
1009 power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>;
1010 };
1011
1012 ps_disp0_cpu0: power-controller@10000 {
1013 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1014 reg = <0x10000 4>;
1015 #power-domain-cells = <0>;
1016 #reset-cells = <0>;
1017 label = "disp0_cpu0";
1018 power-domains = <&ps_disp0_fe>;
1019 apple,min-state = <4>;
1020 };
1021 };
1022
1023 &pmgr_mini {
1024
1025 ps_debug_gated: power-controller@58 {
1026 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1027 reg = <0x58 4>;
1028 #power-domain-cells = <0>;
1029 #reset-cells = <0>;
1030 label = "debug_gated";
1031 apple,always-on; /* Core AON device */
1032 };
1033
1034 ps_nub_spmi0: power-controller@60 {
1035 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1036 reg = <0x60 4>;
1037 #power-domain-cells = <0>;
1038 #reset-cells = <0>;
1039 label = "nub_spmi0";
1040 apple,always-on; /* Core AON device */
1041 };
1042
1043 ps_nub_spmi1: power-controller@68 {
1044 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1045 reg = <0x68 4>;
1046 #power-domain-cells = <0>;
1047 #reset-cells = <0>;
1048 label = "nub_spmi1";
1049 apple,always-on; /* Core AON device */
1050 };
1051
1052 ps_nub_aon: power-controller@70 {
1053 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1054 reg = <0x70 4>;
1055 #power-domain-cells = <0>;
1056 #reset-cells = <0>;
1057 label = "nub_aon";
1058 apple,always-on; /* Core AON device */
1059 };
1060
1061 ps_msg: power-controller@78 {
1062 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1063 reg = <0x78 4>;
1064 #power-domain-cells = <0>;
1065 #reset-cells = <0>;
1066 label = "msg";
1067 };
1068
1069 ps_nub_gpio: power-controller@80 {
1070 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1071 reg = <0x80 4>;
1072 #power-domain-cells = <0>;
1073 #reset-cells = <0>;
1074 label = "nub_gpio";
1075 apple,always-on;
1076 };
1077
1078 ps_atc0_usb_aon: power-controller@88 {
1079 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1080 reg = <0x88 4>;
1081 #power-domain-cells = <0>;
1082 #reset-cells = <0>;
1083 label = "atc0_usb_aon";
1084 apple,always-on; /* Needs to stay on for dwc3 to work */
1085 };
1086
1087 ps_atc1_usb_aon: power-controller@90 {
1088 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1089 reg = <0x90 4>;
1090 #power-domain-cells = <0>;
1091 #reset-cells = <0>;
1092 label = "atc1_usb_aon";
1093 apple,always-on; /* Needs to stay on for dwc3 to work */
1094 };
1095
1096 ps_atc0_usb: power-controller@98 {
1097 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1098 reg = <0x98 4>;
1099 #power-domain-cells = <0>;
1100 #reset-cells = <0>;
1101 label = "atc0_usb";
1102 power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
1103 };
1104
1105 ps_atc1_usb: power-controller@a0 {
1106 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1107 reg = <0xa0 4>;
1108 #power-domain-cells = <0>;
1109 #reset-cells = <0>;
1110 label = "atc1_usb";
1111 power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
1112 };
1113
1114 ps_nub_fabric: power-controller@a8 {
1115 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1116 reg = <0xa8 4>;
1117 #power-domain-cells = <0>;
1118 #reset-cells = <0>;
1119 label = "nub_fabric";
1120 apple,always-on; /* Core AON device */
1121 };
1122
1123 ps_nub_sram: power-controller@b0 {
1124 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1125 reg = <0xb0 4>;
1126 #power-domain-cells = <0>;
1127 #reset-cells = <0>;
1128 label = "nub_sram";
1129 apple,always-on; /* Core AON device */
1130 };
1131
1132 ps_debug_switch: power-controller@b8 {
1133 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
1134 reg = <0xb8 4>;
1135 #power-domain-cells = <0>;
1136 #reset-cells = <0>;
1137 label = "debug_switch";
1138 apple,always-on; /* Core AON device */
1139 };
1140 };
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