1 /*
2 * BSD LICENSE
3 *
4 * Copyright (c) 2016 Broadcom. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 * * Neither the name of Broadcom Corporation nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <dt-bindings/clock/bcm-ns2.h>
34
35 osc: oscillator {
36 #clock-cells = <0>;
37 compatible = "fixed-clock";
38 clock-frequency = <25000000>;
39 };
40
41 lcpll_ddr: lcpll_ddr@6501d058 {
42 #clock-cells = <1>;
43 compatible = "brcm,ns2-lcpll-ddr";
44 reg = <0x6501d058 0x20>,
45 <0x6501c020 0x4>,
46 <0x6501d04c 0x4>;
47 clocks = <&osc>;
48 clock-output-names = "lcpll_ddr", "pcie_sata_usb",
49 "ddr", "ddr_ch2_unused",
50 "ddr_ch3_unused", "ddr_ch4_unused",
51 "ddr_ch5_unused";
52 };
53
54 lcpll_ports: lcpll_ports@6501d078 {
55 #clock-cells = <1>;
56 compatible = "brcm,ns2-lcpll-ports";
57 reg = <0x6501d078 0x20>,
58 <0x6501c020 0x4>,
59 <0x6501d054 0x4>;
60 clocks = <&osc>;
61 clock-output-names = "lcpll_ports", "wan", "rgmii",
62 "ports_ch2_unused",
63 "ports_ch3_unused",
64 "ports_ch4_unused",
65 "ports_ch5_unused";
66 };
67
68 genpll_scr: genpll_scr@6501d098 {
69 #clock-cells = <1>;
70 compatible = "brcm,ns2-genpll-scr";
71 reg = <0x6501d098 0x32>,
72 <0x6501c020 0x4>,
73 <0x6501d044 0x4>;
74 clocks = <&osc>;
75 clock-output-names = "genpll_scr", "scr", "fs",
76 "audio_ref", "scr_ch3_unused",
77 "scr_ch4_unused", "scr_ch5_unused";
78 };
79
80 iprocmed: iprocmed {
81 #clock-cells = <0>;
82 compatible = "fixed-factor-clock";
83 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
84 clock-div = <2>;
85 clock-mult = <1>;
86 };
87
88 iprocslow: iprocslow {
89 #clock-cells = <0>;
90 compatible = "fixed-factor-clock";
91 clocks = <&genpll_scr BCM_NS2_GENPLL_SCR_SCR_CLK>;
92 clock-div = <4>;
93 clock-mult = <1>;
94 };
95
96 genpll_sw: genpll_sw@6501d0c4 {
97 #clock-cells = <1>;
98 compatible = "brcm,ns2-genpll-sw";
99 reg = <0x6501d0c4 0x32>,
100 <0x6501c020 0x4>,
101 <0x6501d044 0x4>;
102 clocks = <&osc>;
103 clock-output-names = "genpll_sw", "rpe", "250", "nic",
104 "chimp", "port", "sdio";
105 };
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