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Linux/scripts/dtc/include-prefixes/arm64/freescale/fsl-lx2162a-sr-som.dtsi

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  1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2 //
  3 // Device Tree file for LX2162A-SOM
  4 //
  5 // Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
  6 // Copyright 2023 Josua Mayer <josua@solid-run.com>
  7 
  8 &crypto {
  9         status = "okay";
 10 };
 11 
 12 &dpmac17 {
 13         phy-handle = <&ethernet_phy0>;
 14         phy-connection-type = "rgmii-id";
 15 };
 16 
 17 &emdio1 {
 18         status = "okay";
 19 
 20         ethernet_phy0: ethernet-phy@1 {
 21                 reg = <1>;
 22         };
 23 };
 24 
 25 &esdhc1 {
 26         bus-width = <8>;
 27         mmc-hs200-1_8v;
 28         mmc-hs400-1_8v;
 29         status = "okay";
 30 };
 31 
 32 &fspi {
 33         status = "okay";
 34 
 35         flash@0 {
 36                 compatible = "jedec,spi-nor";
 37                 reg = <0>;
 38                 m25p,fast-read;
 39                 spi-max-frequency = <50000000>;
 40                 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
 41                 spi-rx-bus-width = <8>;
 42                 spi-tx-bus-width = <1>;
 43         };
 44 };
 45 
 46 &i2c0 {
 47         status = "okay";
 48 
 49         fan-controller@18 {
 50                 compatible = "ti,amc6821";
 51                 reg = <0x18>;
 52         };
 53 
 54         ddr_spd: eeprom@51 {
 55                 compatible = "st,24c02", "atmel,24c02";
 56                 reg = <0x51>;
 57                 read-only;
 58         };
 59 
 60         config_eeprom: eeprom@57 {
 61                 compatible = "st,24c02", "atmel,24c02";
 62                 reg = <0x57>;
 63         };
 64 };
 65 
 66 &i2c4 {
 67         status = "okay";
 68 
 69         variable_eeprom: eeprom@54 {
 70                 compatible = "st,24c2048", "atmel,24c2048";
 71                 reg = <0x54>;
 72         };
 73 };
 74 
 75 &i2c5 {
 76         status = "okay";
 77 
 78         rtc@6f {
 79                 compatible = "microchip,mcp7940x";
 80                 reg = <0x6f>;
 81         };
 82 };

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