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Linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mm-icore-mx8mm-edimm2.2.dts

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  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 /*
  3  * Copyright (c) 2019 NXP
  4  * Copyright (c) 2019 Engicam srl
  5  * Copyright (c) 2020 Amarula Solutions(India)
  6  */
  7 
  8 /dts-v1/;
  9 #include "imx8mm.dtsi"
 10 #include "imx8mm-icore-mx8mm.dtsi"
 11 
 12 / {
 13         model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
 14         compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
 15                      "fsl,imx8mm";
 16 
 17         chosen {
 18                 stdout-path = &uart2;
 19         };
 20 };
 21 
 22 &fec1 {
 23         status = "okay";
 24 };
 25 
 26 &i2c2 {
 27         clock-frequency = <400000>;
 28         pinctrl-names = "default";
 29         pinctrl-0 = <&pinctrl_i2c2>;
 30         status = "okay";
 31 };
 32 
 33 &i2c4 {
 34         clock-frequency = <100000>;
 35         pinctrl-names = "default";
 36         pinctrl-0 = <&pinctrl_i2c4>;
 37         status = "okay";
 38 };
 39 
 40 &iomuxc {
 41         pinctrl_i2c2: i2c2grp {
 42                 fsl,pins = <
 43                         MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
 44                         MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA          0x400001c3
 45                 >;
 46         };
 47 
 48         pinctrl_i2c4: i2c4grp {
 49                 fsl,pins = <
 50                         MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
 51                         MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA          0x400001c3
 52                 >;
 53         };
 54 
 55         pinctrl_uart2: uart2grp {
 56                 fsl,pins = <
 57                         MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
 58                         MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
 59                 >;
 60         };
 61 
 62         pinctrl_usdhc1_gpio: usdhc1gpiogrp {
 63                 fsl,pins = <
 64                         MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6       0x41
 65                 >;
 66         };
 67 
 68         pinctrl_usdhc1: usdhc1grp {
 69                 fsl,pins = <
 70                         MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK         0x190
 71                         MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD         0x1d0
 72                         MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0     0x1d0
 73                         MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1     0x1d0
 74                         MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2     0x1d0
 75                         MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3     0x1d0
 76                 >;
 77         };
 78 };
 79 
 80 &uart2 {
 81         pinctrl-names = "default";
 82         pinctrl-0 = <&pinctrl_uart2>;
 83         status = "okay";
 84 };
 85 
 86 /* SD */
 87 &usdhc1 {
 88         pinctrl-names = "default";
 89         pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
 90         cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
 91         max-frequency = <50000000>;
 92         bus-width = <4>;
 93         no-1-8-v;
 94         keep-power-in-suspend;
 95         status = "okay";
 96 };

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