1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6 / {
7 dmic_codec: dmic-codec {
8 compatible = "dmic-codec";
9 num-channels = <1>;
10 #sound-dai-cells = <0>;
11 };
12
13 leds {
14 compatible = "gpio-leds";
15
16 led-0 {
17 label = "gen_led0";
18 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
19 default-state = "off";
20 };
21
22 led-1 {
23 label = "gen_led1";
24 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
25 default-state = "off";
26 };
27
28 led-2 {
29 label = "gen_led2";
30 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
31 default-state = "off";
32 };
33
34 led-3 {
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_led3>;
37 label = "heartbeat";
38 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
39 linux,default-trigger = "heartbeat";
40 };
41 };
42
43 reg_1v5: regulator-1v5 {
44 compatible = "regulator-fixed";
45 regulator-name = "1V5";
46 regulator-min-microvolt = <1500000>;
47 regulator-max-microvolt = <1500000>;
48 };
49
50 reg_1v8: regulator-1v8 {
51 compatible = "regulator-fixed";
52 regulator-name = "1V8";
53 regulator-min-microvolt = <1800000>;
54 regulator-max-microvolt = <1800000>;
55 };
56
57 reg_audio: regulator-audio {
58 compatible = "regulator-fixed";
59 regulator-name = "3v3_aud";
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
63 enable-active-high;
64 };
65
66 reg_camera: regulator-camera {
67 compatible = "regulator-fixed";
68 regulator-name = "mipi_pwr";
69 regulator-min-microvolt = <2800000>;
70 regulator-max-microvolt = <2800000>;
71 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
72 enable-active-high;
73 startup-delay-us = <100000>;
74 regulator-always-on;
75 };
76
77 reg_usdhc2_vmmc: regulator-usdhc2 {
78 compatible = "regulator-fixed";
79 regulator-name = "vsd_3v3";
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
83 enable-active-high;
84 };
85
86 reg_usb_otg_vbus: regulator-usb {
87 compatible = "regulator-fixed";
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_reg_usb_otg>;
90 regulator-name = "usb_otg_vbus";
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
94 enable-active-high;
95 };
96
97 sound-dmic {
98 compatible = "simple-audio-card";
99 simple-audio-card,name = "dmic";
100 simple-audio-card,format = "pdm";
101 simple-audio-card,bitclock-master = <&dailink_master>;
102 simple-audio-card,frame-master = <&dailink_master>;
103
104 dailink_master: simple-audio-card,cpu {
105 sound-dai = <&micfil>;
106 };
107
108 simple-audio-card,codec {
109 sound-dai = <&dmic_codec>;
110 };
111 };
112
113 sound-wm8962 {
114 compatible = "simple-audio-card";
115 simple-audio-card,name = "wm8962";
116 simple-audio-card,format = "i2s";
117 simple-audio-card,widgets = "Headphone", "Headphones",
118 "Microphone", "Headset Mic",
119 "Speaker", "Speaker";
120 simple-audio-card,routing = "Headphones", "HPOUTL",
121 "Headphones", "HPOUTR",
122 "Speaker", "SPKOUTL",
123 "Speaker", "SPKOUTR",
124 "Headset Mic", "MICBIAS",
125 "IN3R", "Headset Mic";
126
127 simple-audio-card,cpu {
128 sound-dai = <&sai3>;
129 };
130
131 simple-audio-card,codec {
132 sound-dai = <&wm8962>;
133 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
134 frame-master;
135 bitclock-master;
136 };
137 };
138 };
139
140 &ecspi2 {
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_espi2>;
143 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
144 status = "okay";
145
146 eeprom@0 {
147 compatible = "microchip,at25160bn", "atmel,at25";
148 reg = <0>;
149 spi-max-frequency = <5000000>;
150 spi-cpha;
151 spi-cpol;
152 pagesize = <32>;
153 size = <2048>;
154 address-width = <16>;
155 };
156 };
157
158 &i2c2 {
159 clock-frequency = <384000>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_i2c2>;
162 status = "okay";
163
164 camera@10 {
165 compatible = "ovti,ov5640";
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_ov5640>;
168 reg = <0x10>;
169 clocks = <&clk IMX8MN_CLK_CLKO1>;
170 clock-names = "xclk";
171 assigned-clocks = <&clk IMX8MN_CLK_CLKO1>;
172 assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
173 assigned-clock-rates = <24000000>;
174 AVDD-supply = <®_camera>; /* 2.8v */
175 DVDD-supply = <®_1v5>;
176 DOVDD-supply = <®_1v8>;
177 powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
178 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
179
180 port {
181 /* MIPI CSI-2 bus endpoint */
182 ov5640_to_mipi_csi2: endpoint {
183 remote-endpoint = <&mipi_csi_in>;
184 clock-lanes = <0>;
185 data-lanes = <1 2>;
186 };
187 };
188 };
189 };
190 &i2c4 {
191 clock-frequency = <400000>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c4>;
194 status = "okay";
195
196 pca6416_0: gpio@20 {
197 compatible = "nxp,pcal6416";
198 reg = <0x20>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_pcal6414>;
201 gpio-controller;
202 #gpio-cells = <2>;
203 interrupt-parent = <&gpio4>;
204 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
205 };
206
207 pca6416_1: gpio@21 {
208 compatible = "nxp,pcal6416";
209 reg = <0x21>;
210 gpio-controller;
211 #gpio-cells = <2>;
212 interrupt-parent = <&gpio4>;
213 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
214 };
215
216 wm8962: audio-codec@1a {
217 compatible = "wlf,wm8962";
218 reg = <0x1a>;
219 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
220 DCVDD-supply = <®_audio>;
221 DBVDD-supply = <®_audio>;
222 AVDD-supply = <®_audio>;
223 CPVDD-supply = <®_audio>;
224 MICVDD-supply = <®_audio>;
225 PLLVDD-supply = <®_audio>;
226 SPKVDD1-supply = <®_audio>;
227 SPKVDD2-supply = <®_audio>;
228 gpio-cfg = <
229 0x0000 /* 0:Default */
230 0x0000 /* 1:Default */
231 0x0000 /* 2:FN_DMICCLK */
232 0x0000 /* 3:Default */
233 0x0000 /* 4:FN_DMICCDAT */
234 0x0000 /* 5:Default */
235 >;
236 #sound-dai-cells = <0>;
237 };
238 };
239
240 &isi {
241 status = "okay";
242 };
243
244 &easrc {
245 fsl,asrc-rate = <48000>;
246 status = "okay";
247 };
248
249 &mipi_csi {
250 status = "okay";
251
252 ports {
253 port@0 {
254 mipi_csi_in: endpoint {
255 remote-endpoint = <&ov5640_to_mipi_csi2>;
256 data-lanes = <1 2>;
257 };
258 };
259 };
260 };
261
262 &micfil {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_pdm>;
265 assigned-clocks = <&clk IMX8MN_CLK_PDM>;
266 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
267 assigned-clock-rates = <49152000>;
268 status = "okay";
269 };
270
271 &sai3 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_sai3>;
274 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
275 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
276 assigned-clock-rates = <24576000>;
277 fsl,sai-mclk-direction-output;
278 status = "okay";
279 };
280
281 &snvs_pwrkey {
282 status = "okay";
283 };
284
285 &uart2 { /* console */
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_uart2>;
288 status = "okay";
289 };
290
291 &uart3 {
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_uart3>;
294 assigned-clocks = <&clk IMX8MN_CLK_UART3>;
295 assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
296 uart-has-rtscts;
297 status = "okay";
298 };
299
300 &usbotg1 {
301 vbus-supply = <®_usb_otg_vbus>;
302 disable-over-current;
303 dr_mode = "otg";
304 status = "okay";
305 };
306
307 &usdhc2 {
308 pinctrl-names = "default", "state_100mhz", "state_200mhz";
309 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
310 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
311 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
312 bus-width = <4>;
313 vmmc-supply = <®_usdhc2_vmmc>;
314 status = "okay";
315 };
316
317 &iomuxc {
318 pinctrl_espi2: espi2grp {
319 fsl,pins = <
320 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
321 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
322 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
323 MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41
324 >;
325 };
326
327 pinctrl_i2c2: i2c2grp {
328 fsl,pins = <
329 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
330 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
331 >;
332 };
333
334 pinctrl_i2c4: i2c4grp {
335 fsl,pins = <
336 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
337 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
338 >;
339 };
340
341 pinctrl_led3: led3grp {
342 fsl,pins = <
343 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
344 >;
345 };
346
347 pinctrl_ov5640: ov5640grp {
348 fsl,pins = <
349 MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
350 MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
351 MX8MN_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59
352 >;
353 };
354
355 pinctrl_pcal6414: pcal6414-gpiogrp {
356 fsl,pins = <
357 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
358 >;
359 };
360
361 pinctrl_pdm: pdmgrp {
362 fsl,pins = <
363 MX8MN_IOMUXC_SAI5_RXC_PDM_CLK 0xd6
364 MX8MN_IOMUXC_SAI5_RXD0_PDM_BIT_STREAM0 0xd6
365 >;
366 };
367
368 pinctrl_reg_usb_otg: reg-otggrp {
369 fsl,pins = <
370 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
371 >;
372 };
373
374 pinctrl_sai3: sai3grp {
375 fsl,pins = <
376 MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
377 MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
378 MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
379 MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
380 MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
381 >;
382 };
383
384 pinctrl_uart2: uart2grp {
385 fsl,pins = <
386 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
387 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
388 >;
389 };
390
391 pinctrl_uart3: uart3grp {
392 fsl,pins = <
393 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
394 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
395 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
396 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
397 >;
398 };
399
400 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
401 fsl,pins = <
402 MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
403 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
404 >;
405 };
406
407 pinctrl_usdhc2: usdhc2grp {
408 fsl,pins = <
409 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
410 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
411 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
412 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
413 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
414 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
415 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
416 >;
417 };
418
419 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
420 fsl,pins = <
421 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
422 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
423 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
424 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
425 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
426 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
427 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
428 >;
429 };
430
431 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
432 fsl,pins = <
433 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
434 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
435 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
436 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
437 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
438 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
439 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
440 >;
441 };
442 };
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