1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/usb/pd.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include "imx8mp.dtsi"
11 #include "imx8mp-beacon-som.dtsi"
12
13 / {
14 model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
16
17 aliases {
18 ethernet0 = &eqos;
19 ethernet1 = &fec;
20 };
21
22 chosen {
23 stdout-path = &uart2;
24 };
25
26 clk_xtal25: clock-xtal25 {
27 compatible = "fixed-clock";
28 #clock-cells = <0>;
29 clock-frequency = <25000000>;
30 };
31
32 connector {
33 compatible = "usb-c-connector";
34 label = "USB-C";
35 data-role = "dual";
36
37 ports {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 port@0 {
42 reg = <0>;
43
44 hs_ep: endpoint {
45 remote-endpoint = <&usb3_hs_ep>;
46 };
47 };
48 port@1 {
49 reg = <1>;
50
51 ss_ep: endpoint {
52 remote-endpoint = <&hd3ss3220_in_ep>;
53 };
54 };
55 };
56 };
57
58 dmic_codec: dmic-codec {
59 compatible = "dmic-codec";
60 num-channels = <1>;
61 #sound-dai-cells = <0>;
62 };
63
64 gpio-keys {
65 compatible = "gpio-keys";
66 autorepeat;
67
68 button-0 {
69 label = "btn0";
70 linux,code = <BTN_0>;
71 gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
72 wakeup-source;
73 };
74
75 button-1 {
76 label = "btn1";
77 linux,code = <BTN_1>;
78 gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
79 wakeup-source;
80 };
81
82 button-2 {
83 label = "btn2";
84 linux,code = <BTN_2>;
85 gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
86 wakeup-source;
87 };
88
89 button-3 {
90 label = "btn3";
91 linux,code = <BTN_3>;
92 gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
93 wakeup-source;
94 };
95 };
96
97 bridge-connector {
98 compatible = "hdmi-connector";
99 type = "a";
100
101 port {
102 hdmi_con: endpoint {
103 remote-endpoint = <&adv7535_out>;
104 };
105 };
106 };
107
108 hdmi-connector {
109 compatible = "hdmi-connector";
110 type = "a";
111
112 port {
113 hdmi_connector: endpoint {
114 remote-endpoint = <&hdmi_to_connector>;
115 };
116 };
117 };
118
119 leds {
120 compatible = "gpio-leds";
121 pinctrl-names = "default";
122 pinctrl-0 = <&pinctrl_led3>;
123
124 led-0 {
125 label = "gen_led0";
126 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
127 default-state = "off";
128 };
129
130 led-1 {
131 label = "gen_led1";
132 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
133 default-state = "off";
134 };
135
136 led-2 {
137 label = "gen_led2";
138 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
139 default-state = "off";
140 };
141
142 led-3 {
143 label = "heartbeat";
144 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
145 linux,default-trigger = "heartbeat";
146 };
147 };
148
149 reg_audio: regulator-wm8962 {
150 compatible = "regulator-fixed";
151 regulator-name = "3v3_aud";
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
154 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
155 enable-active-high;
156 };
157
158 reg_usdhc2_vmmc: regulator-usdhc2 {
159 compatible = "regulator-fixed";
160 regulator-name = "VSD_3V3";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
164 enable-active-high;
165 startup-delay-us = <100>;
166 off-on-delay-us = <20000>;
167 };
168
169 reg_usb1_host_vbus: regulator-usb1-vbus {
170 compatible = "regulator-fixed";
171 regulator-name = "usb1_host_vbus";
172 regulator-max-microvolt = <5000000>;
173 regulator-min-microvolt = <5000000>;
174 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
175 enable-active-high;
176 };
177
178 sound-adv7535 {
179 compatible = "simple-audio-card";
180 simple-audio-card,name = "sound-adv7535";
181 simple-audio-card,format = "i2s";
182
183 simple-audio-card,cpu {
184 sound-dai = <&sai5>;
185 system-clock-direction-out;
186 };
187
188 simple-audio-card,codec {
189 sound-dai = <&adv_bridge>;
190 };
191 };
192
193 sound-dmic {
194 compatible = "simple-audio-card";
195 simple-audio-card,name = "sound-pdm";
196 simple-audio-card,format = "i2s";
197 simple-audio-card,bitclock-master = <&dailink_master>;
198 simple-audio-card,frame-master = <&dailink_master>;
199
200 dailink_master: simple-audio-card,cpu {
201 sound-dai = <&micfil>;
202 };
203
204 simple-audio-card,codec {
205 sound-dai = <&dmic_codec>;
206 };
207 };
208
209 sound-wm8962 {
210 compatible = "simple-audio-card";
211 simple-audio-card,name = "wm8962";
212 simple-audio-card,format = "i2s";
213 simple-audio-card,widgets = "Headphone", "Headphones",
214 "Microphone", "Headset Mic",
215 "Speaker", "Speaker";
216 simple-audio-card,routing = "Headphones", "HPOUTL",
217 "Headphones", "HPOUTR",
218 "Speaker", "SPKOUTL",
219 "Speaker", "SPKOUTR",
220 "Headset Mic", "MICBIAS",
221 "IN3R", "Headset Mic";
222
223 simple-audio-card,cpu {
224 sound-dai = <&sai3>;
225 frame-master;
226 bitclock-master;
227 };
228
229 simple-audio-card,codec {
230 sound-dai = <&wm8962>;
231 };
232 };
233 };
234
235 &audio_blk_ctrl {
236 assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
237 assigned-clock-rates = <393216000>, <135475200>;
238 };
239
240 &ecspi2 {
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_ecspi2>;
243 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
244 status = "okay";
245
246 tpm: tpm@0 {
247 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
248 reg = <0>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_tpm>;
251 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
252 spi-max-frequency = <18500000>;
253 };
254 };
255
256 &fec {
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_fec>;
259 phy-mode = "rgmii-id";
260 phy-handle = <ðphy1>;
261 fsl,magic-packet;
262 status = "okay";
263
264 mdio {
265 #address-cells = <1>;
266 #size-cells = <0>;
267
268 ethphy1: ethernet-phy@3 {
269 compatible = "ethernet-phy-id0022.1640",
270 "ethernet-phy-ieee802.3-c22";
271 reg = <3>;
272 reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
273 reset-assert-us = <10000>;
274 reset-deassert-us = <150000>;
275 interrupt-parent = <&gpio4>;
276 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
277 };
278 };
279 };
280
281 &flexcan1 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_flexcan1>;
284 status = "okay";
285 };
286
287 &gpio2 {
288 usb-mux-hog {
289 gpio-hog;
290 gpios = <20 0>;
291 output-low;
292 line-name = "USB-C Mux En";
293 };
294 };
295
296 &hdmi_tx {
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_hdmi>;
299 status = "okay";
300
301 ports {
302 port@1 {
303 reg = <1>;
304
305 hdmi_to_connector:endpoint {
306 remote-endpoint = <&hdmi_connector>;
307 };
308 };
309 };
310 };
311
312 &hdmi_tx_phy {
313 status = "okay";
314 };
315
316 &i2c2 {
317 clock-frequency = <384000>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_i2c2>;
320 status = "okay";
321
322 pca6416_3: gpio@20 {
323 compatible = "nxp,pcal6416";
324 reg = <0x20>;
325 gpio-controller;
326 #gpio-cells = <2>;
327 interrupt-parent = <&gpio4>;
328 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
329 interrupt-controller;
330 #interrupt-cells = <2>;
331 };
332
333 adv_bridge: hdmi@3d {
334 compatible = "adi,adv7535";
335 reg = <0x3d>;
336 reg-names = "main";
337 interrupt-parent = <&gpio4>;
338 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
339 adi,dsi-lanes = <4>;
340 #sound-dai-cells = <0>;
341 avdd-supply = <&buck5>;
342 dvdd-supply = <&buck5>;
343 pvdd-supply = <&buck5>;
344 a2vdd-supply = <&buck5>;
345 v1p2-supply = <&buck5>;
346 v3p3-supply = <&buck4>;
347
348 ports {
349 #address-cells = <1>;
350 #size-cells = <0>;
351
352 port@0 {
353 reg = <0>;
354
355 adv7535_in: endpoint {
356 remote-endpoint = <&dsi_out>;
357 };
358 };
359
360 port@1 {
361 reg = <1>;
362
363 adv7535_out: endpoint {
364 remote-endpoint = <&hdmi_con>;
365 };
366 };
367 };
368 };
369
370 pcieclk: clock-generator@68 {
371 compatible = "renesas,9fgv0241";
372 reg = <0x68>;
373 clocks = <&clk_xtal25>;
374 #clock-cells = <1>;
375 };
376 };
377
378 &hdmi_pvi {
379 status = "okay";
380 };
381
382 &i2c3 {
383 /* Connected to USB Hub */
384 usb-typec@52 {
385 compatible = "nxp,ptn5110", "tcpci";
386 reg = <0x52>;
387 pinctrl-names = "default";
388 pinctrl-0 = <&pinctrl_typec>;
389 interrupt-parent = <&gpio4>;
390 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
391
392 connector {
393 compatible = "usb-c-connector";
394 label = "USB-C";
395 power-role = "source";
396 data-role = "host";
397 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
398 };
399 };
400 };
401
402 &i2c4 {
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_i2c4>;
405 clock-frequency = <384000>;
406 status = "okay";
407
408 wm8962: audio-codec@1a {
409 compatible = "wlf,wm8962";
410 reg = <0x1a>;
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_wm8962>;
413 clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
414 assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
415 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
416 assigned-clock-rates = <22576000>;
417 DCVDD-supply = <®_audio>;
418 DBVDD-supply = <®_audio>;
419 AVDD-supply = <®_audio>;
420 CPVDD-supply = <®_audio>;
421 MICVDD-supply = <®_audio>;
422 PLLVDD-supply = <®_audio>;
423 SPKVDD1-supply = <®_audio>;
424 SPKVDD2-supply = <®_audio>;
425 gpio-cfg = <
426 0x0000 /* 0:Default */
427 0x0000 /* 1:Default */
428 0x0000 /* 2:FN_DMICCLK */
429 0x0000 /* 3:Default */
430 0x0000 /* 4:FN_DMICCDAT */
431 0x0000 /* 5:Default */
432 >;
433 #sound-dai-cells = <0>;
434 };
435
436 pca6416: gpio@20 {
437 compatible = "nxp,pcal6416";
438 reg = <0x20>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_pcal6414>;
441 gpio-controller;
442 #gpio-cells = <2>;
443 interrupt-parent = <&gpio4>;
444 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
445 interrupt-controller;
446 #interrupt-cells = <2>;
447 };
448
449 pca6416_1: gpio@21 {
450 compatible = "nxp,pcal6416";
451 reg = <0x21>;
452 gpio-controller;
453 #gpio-cells = <2>;
454 interrupt-parent = <&gpio4>;
455 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
456 interrupt-controller;
457 #interrupt-cells = <2>;
458
459 usb-hub-hog {
460 gpio-hog;
461 gpios = <7 0>;
462 output-low;
463 line-name = "USB Hub Enable";
464 };
465 };
466
467 usb-typec@47 {
468 compatible = "ti,hd3ss3220";
469 reg = <0x47>;
470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_hd3ss3220>;
472 interrupt-parent = <&gpio4>;
473 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
474
475 ports {
476 #address-cells = <1>;
477 #size-cells = <0>;
478
479 port@0 {
480 reg = <0>;
481
482 hd3ss3220_in_ep: endpoint {
483 remote-endpoint = <&ss_ep>;
484 };
485 };
486
487 port@1 {
488 reg = <1>;
489
490 hd3ss3220_out_ep: endpoint {
491 remote-endpoint = <&usb3_role_switch>;
492 };
493 };
494 };
495 };
496 };
497
498 &lcdif1 {
499 status = "okay";
500 };
501
502 &lcdif3 {
503 status = "okay";
504 };
505
506 &micfil {
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_pdm>;
509 assigned-clocks = <&clk IMX8MP_CLK_PDM>;
510 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
511 assigned-clock-rates = <49152000>;
512 status = "okay";
513 };
514
515 &mipi_dsi {
516 samsung,esc-clock-frequency = <10000000>;
517 status = "okay";
518
519 ports {
520 port@1 {
521 reg = <1>;
522
523 dsi_out: endpoint {
524 remote-endpoint = <&adv7535_in>;
525 };
526 };
527 };
528 };
529
530 &pcie {
531 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_pcie>;
533 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
534 status = "okay";
535 };
536
537 &pcie_phy {
538 fsl,clkreq-unsupported;
539 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
540 clocks = <&pcieclk 1>;
541 clock-names = "ref";
542 status = "okay";
543 };
544
545 &sai3 {
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_sai3>;
548 assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
549 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
550 assigned-clock-rates = <12288000>;
551 fsl,sai-mclk-direction-output;
552 status = "okay";
553 };
554
555 &sai5 {
556 pinctrl-names = "default";
557 pinctrl-0 = <&pinctrl_sai5>;
558 assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
559 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
560 assigned-clock-rates = <12288000>;
561 fsl,sai-mclk-direction-output;
562 status = "okay";
563 };
564
565 &snvs_pwrkey {
566 status = "okay";
567 };
568
569 &uart2 {
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_uart2>;
572 status = "okay";
573 };
574
575 &uart3 {
576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_uart3>;
578 assigned-clocks = <&clk IMX8MP_CLK_UART3>;
579 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
580 uart-has-rtscts;
581 status = "okay";
582 };
583
584 &usb3_0 {
585 status = "okay";
586 };
587
588 &usb_dwc3_0 {
589 dr_mode = "otg";
590 hnp-disable;
591 srp-disable;
592 adp-disable;
593 usb-role-switch;
594 status = "okay";
595
596 ports {
597 #address-cells = <1>;
598 #size-cells = <0>;
599
600 port@0 {
601 reg = <0>;
602 usb3_hs_ep: endpoint {
603 remote-endpoint = <&hs_ep>;
604 };
605 };
606 port@1 {
607 reg = <1>;
608 usb3_role_switch: endpoint {
609 remote-endpoint = <&hd3ss3220_out_ep>;
610 };
611 };
612 };
613 };
614
615 &usb3_phy0 {
616 vbus-supply = <®_usb1_host_vbus>;
617 status = "okay";
618 };
619
620 &usb3_1 {
621 status = "okay";
622 };
623
624 &usb_dwc3_1 {
625 dr_mode = "host";
626 status = "okay";
627 };
628
629 &usb3_phy1 {
630 status = "okay";
631 };
632
633 &usdhc2 {
634 pinctrl-names = "default", "state_100mhz", "state_200mhz";
635 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
636 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
637 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
638 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
639 vmmc-supply = <®_usdhc2_vmmc>;
640 bus-width = <4>;
641 status = "okay";
642 };
643
644 &iomuxc {
645 pinctrl_ecspi2: ecspi2grp {
646 fsl,pins = <
647 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
648 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
649 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
650 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
651 >;
652 };
653
654 pinctrl_fec: fecgrp {
655 fsl,pins = <
656 MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
657 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
658 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
659 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
660 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
661 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
662 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
663 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
664 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
665 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
666 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
667 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
668 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
669 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
670 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
671 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
672 >;
673 };
674
675 pinctrl_flexcan1: flexcan1grp {
676 fsl,pins = <
677 MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
678 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
679 >;
680 };
681
682 pinctrl_hd3ss3220: hd3ss3220grp {
683 fsl,pins = <
684 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
685 >;
686 };
687
688 pinctrl_hdmi: hdmigrp {
689 fsl,pins = <
690 MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2
691 MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2
692 MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010
693 MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000010
694 >;
695 };
696
697 pinctrl_i2c2: i2c2grp {
698 fsl,pins = <
699 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
700 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
701 >;
702 };
703
704 pinctrl_i2c4: i2c4grp {
705 fsl,pins = <
706 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
707 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
708 >;
709 };
710
711 pinctrl_led3: led3grp {
712 fsl,pins = <
713 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
714 >;
715 };
716
717 pinctrl_pcal6414: pcal6414-gpiogrp {
718 fsl,pins = <
719 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
720 >;
721 };
722
723 pinctrl_pcie: pciegrp {
724 fsl,pins = <
725 MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
726 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
727 >;
728 };
729
730 pinctrl_pdm: pdmgrp {
731 fsl,pins = <
732 MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
733 MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
734 >;
735 };
736
737 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
738 fsl,pins = <
739 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
740 >;
741 };
742
743 pinctrl_sai3: sai3grp {
744 fsl,pins = <
745 MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
746 MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
747 MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
748 MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
749 MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
750 >;
751 };
752
753 pinctrl_sai5: sai5grp {
754 fsl,pins = <
755 MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
756 MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
757 MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
758 >;
759 };
760
761 pinctrl_tpm: tpmgrp {
762 fsl,pins = <
763 MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
764 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
765 >;
766 };
767
768 pinctrl_typec: typec1grp {
769 fsl,pins = <
770 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
771 >;
772 };
773
774 pinctrl_uart2: uart2grp {
775 fsl,pins = <
776 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
777 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
778 >;
779 };
780
781 pinctrl_uart3: uart3grp {
782 fsl,pins = <
783 MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
784 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
785 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
786 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
787 >;
788 };
789
790 pinctrl_usdhc2: usdhc2grp {
791 fsl,pins = <
792 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
793 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
794 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
795 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
796 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
797 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
798 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
799 >;
800 };
801
802 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
803 fsl,pins = <
804 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
805 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
806 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
807 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
808 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
809 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
810 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
811 >;
812 };
813
814 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
815 fsl,pins = <
816 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
817 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
818 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
819 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
820 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
821 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
822 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
823 >;
824 };
825
826 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
827 fsl,pins = <
828 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
829 >;
830 };
831
832 pinctrl_wm8962: wm8962grp {
833 fsl,pins = <
834 MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59
835 >;
836 };
837 };
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