1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (C) 2023 Marvell International Ltd.
4 *
5 * Device tree for the CN9131-DB Com Express CPU module board.
6 */
7
8 #include "cn9131-db.dtsi"
9
10 / {
11 model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
12 compatible = "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn9130",
13 "marvell,armada-ap807-quad", "marvell,armada-ap807";
14
15 };
16
17 &ap0_reg_sd_vccq {
18 regulator-max-microvolt = <1800000>;
19 states = <1800000 0x1 1800000 0x0>;
20 /delete-property/ gpios;
21 };
22
23 &cp0_reg_usb3_vbus0 {
24 /delete-property/ gpio;
25 };
26
27 &cp0_reg_usb3_vbus1 {
28 /delete-property/ gpio;
29 };
30
31 &cp1_reg_usb3_vbus0 {
32 /delete-property/ gpio;
33 };
34
35 &cp0_reg_sd_vcc {
36 status = "disabled";
37 };
38
39 &cp0_reg_sd_vccq {
40 status = "disabled";
41 };
42
43 &cp0_sdhci0 {
44 status = "disabled";
45 };
46
47 &cp0_eth0 {
48 status = "disabled";
49 };
50
51 &cp0_eth1 {
52 status = "okay";
53 phy = <&phy0>;
54 phy-mode = "rgmii-id";
55 };
56
57 &cp0_eth2 {
58 status = "disabled";
59 };
60
61 &cp0_mdio {
62 status = "okay";
63 pinctrl-0 = <&cp0_ge_mdio_pins>;
64 phy0: ethernet-phy@0 {
65 status = "okay";
66 };
67 };
68
69 &cp0_syscon0 {
70 cp0_pinctrl: pinctrl {
71 compatible = "marvell,cp115-standalone-pinctrl";
72
73 cp0_ge_mdio_pins: ge-mdio-pins {
74 marvell,pins = "mpp40", "mpp41";
75 marvell,function = "ge";
76 };
77 };
78 };
79
80 &cp0_sdhci0 {
81 status = "disabled";
82 };
83
84 &cp0_spi1 {
85 status = "okay";
86 };
87
88 &cp0_usb3_0 {
89 status = "okay";
90 usb-phy = <&cp0_usb3_0_phy0>;
91 phy-names = "usb";
92 /delete-property/ phys;
93 };
94
95 &cp0_usb3_1 {
96 status = "okay";
97 usb-phy = <&cp0_usb3_0_phy1>;
98 phy-names = "usb";
99 /delete-property/ phys;
100 };
101
102 &cp1_usb3_1 {
103 status = "okay";
104 usb-phy = <&cp1_usb3_0_phy0>;
105 /* Generic PHY, providing serdes lanes */
106 phys = <&cp1_comphy3 1>;
107 phy-names = "usb";
108 };
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