1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * IPQ5332 RDP468 board device tree source
4 *
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
6 */
7
8 /dts-v1/;
9
10 #include "ipq5332-rdp-common.dtsi"
11
12 / {
13 model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6";
14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
15
16 regulator_fixed_5p0: regulator-s0500 {
17 compatible = "regulator-fixed";
18 regulator-min-microvolt = <500000>;
19 regulator-max-microvolt = <500000>;
20 regulator-boot-on;
21 regulator-always-on;
22 regulator-name = "fixed_5p0";
23 };
24 };
25
26 &blsp1_spi0 {
27 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
28 pinctrl-names = "default";
29 status = "okay";
30
31 flash@0 {
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
33 reg = <0>;
34 #address-cells = <1>;
35 #size-cells = <1>;
36 spi-max-frequency = <50000000>;
37 };
38 };
39
40 &sdhc {
41 bus-width = <4>;
42 max-frequency = <192000000>;
43 mmc-ddr-1_8v;
44 mmc-hs200-1_8v;
45 non-removable;
46 pinctrl-0 = <&sdc_default_state>;
47 pinctrl-names = "default";
48 status = "okay";
49 };
50
51 /* PINCTRL */
52
53 &tlmm {
54 sdc_default_state: sdc-default-state {
55 clk-pins {
56 pins = "gpio13";
57 function = "sdc_clk";
58 drive-strength = <8>;
59 bias-disable;
60 };
61
62 cmd-pins {
63 pins = "gpio12";
64 function = "sdc_cmd";
65 drive-strength = <8>;
66 bias-pull-up;
67 };
68
69 data-pins {
70 pins = "gpio8", "gpio9", "gpio10", "gpio11";
71 function = "sdc_data";
72 drive-strength = <8>;
73 bias-pull-up;
74 };
75 };
76
77 spi_0_data_clk_pins: spi-0-data-clk-state {
78 pins = "gpio14", "gpio15", "gpio16";
79 function = "blsp0_spi";
80 drive-strength = <2>;
81 bias-pull-down;
82 };
83
84 spi_0_cs_pins: spi-0-cs-state {
85 pins = "gpio17";
86 function = "blsp0_spi";
87 drive-strength = <2>;
88 bias-pull-up;
89 };
90 };
91
92 &usb {
93 status = "okay";
94 };
95
96 &usb_dwc {
97 dr_mode = "host";
98 };
99
100 &usbphy0 {
101 vdd-supply = <®ulator_fixed_5p0>;
102
103 status = "okay";
104 };
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