1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Herobrine board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8 /dts-v1/;
9
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-rt5682.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
13
14 / {
15 model = "Google Herobrine (rev1+)";
16 compatible = "google,herobrine", "qcom,sc7280";
17 };
18
19 /*
20 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
21 *
22 * Sort order matches the order in the parent files (parents before children).
23 */
24
25 &pp3300_codec {
26 status = "okay";
27 };
28
29 &pp3300_fp_mcu {
30 status = "okay";
31 };
32
33 &pp2850_vcm_wf_cam {
34 status = "okay";
35 };
36
37 &pp2850_wf_cam {
38 status = "okay";
39 };
40
41 &pp1800_wf_cam {
42 status = "okay";
43 };
44
45 &pp1200_wf_cam {
46 status = "okay";
47 };
48
49 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
50
51 /*
52 * Although the trackpad is really part of the herobrine baseboard, we'll
53 * put the actual definition in the board device tree since different boards
54 * might hook up different trackpads (or no i2c trackpad at all in the case
55 * of tablets / detachables).
56 */
57 ap_tp_i2c: &i2c0 {
58 status = "okay";
59 clock-frequency = <400000>;
60
61 trackpad: trackpad@15 {
62 compatible = "elan,ekth3000";
63 reg = <0x15>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&tp_int_odl>;
66
67 interrupt-parent = <&tlmm>;
68 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
69
70 vcc-supply = <&pp3300_z1>;
71
72 wakeup-source;
73 };
74 };
75
76 /*
77 * The touchscreen connector might come off the Qcard, at least in the case of
78 * eDP. Like the trackpad, we'll put it in the board device tree file since
79 * different boards have different touchscreens.
80 */
81 ts_i2c: &i2c13 {
82 status = "okay";
83 clock-frequency = <400000>;
84
85 ap_ts: touchscreen@5c {
86 compatible = "hid-over-i2c";
87 reg = <0x5c>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
90
91 interrupt-parent = <&tlmm>;
92 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
93
94 post-power-on-delay-ms = <500>;
95 hid-descr-addr = <0x0000>;
96
97 vdd-supply = <&ts_avdd>;
98 };
99 };
100
101 &mdss_edp {
102 status = "okay";
103 };
104
105 &mdss_edp_phy {
106 status = "okay";
107 };
108
109 /* For nvme */
110 &pcie1 {
111 status = "okay";
112 };
113
114 /* For nvme */
115 &pcie1_phy {
116 status = "okay";
117 };
118
119 /* For eMMC */
120 &sdhc_1 {
121 status = "okay";
122 };
123
124 /* For SD Card */
125 &sdhc_2 {
126 status = "okay";
127 };
128
129 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
130
131 /*
132 * This pin goes to the display panel but then doesn't actually do anything
133 * on the panel itself (it doesn't connect to the touchscreen controller).
134 * We'll set a pullup here just to park the line.
135 */
136 &ts_rst_conn {
137 bias-pull-up;
138 };
139
140 /* PINCTRL - BOARD-SPECIFIC */
141
142 /*
143 * Methodology for gpio-line-names:
144 * - If a pin goes to herobrine board and is named it gets that name.
145 * - If a pin goes to herobrine board and is not named, it gets no name.
146 * - If a pin is totally internal to Qcard then it gets Qcard name.
147 * - If a pin is not hooked up on Qcard, it gets no name.
148 */
149
150 &pm8350c_gpios {
151 gpio-line-names = "FLASH_STROBE_1", /* 1 */
152 "AP_SUSPEND",
153 "PM8008_1_RST_N",
154 "",
155 "",
156 "",
157 "PMIC_EDP_BL_EN",
158 "PMIC_EDP_BL_PWM",
159 "";
160 };
161
162 &tlmm {
163 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
164 "AP_TP_I2C_SCL",
165 "SSD_RST_L",
166 "PE_WAKE_ODL",
167 "AP_SAR_SDA",
168 "AP_SAR_SCL",
169 "PRB_SC_GPIO_6",
170 "TP_INT_ODL",
171 "HP_I2C_SDA",
172 "HP_I2C_SCL",
173
174 "GNSS_L1_EN", /* 10 */
175 "GNSS_L5_EN",
176 "SPI_AP_MOSI",
177 "SPI_AP_MISO",
178 "SPI_AP_CLK",
179 "SPI_AP_CS0_L",
180 /*
181 * AP_FLASH_WP is crossystem ABI. Schematics
182 * call it BIOS_FLASH_WP_OD.
183 */
184 "AP_FLASH_WP",
185 "",
186 "AP_EC_INT_L",
187 "",
188
189 "UF_CAM_RST_L", /* 20 */
190 "WF_CAM_RST_L",
191 "UART_AP_TX_DBG_RX",
192 "UART_DBG_TX_AP_RX",
193 "",
194 "PM8008_IRQ_1",
195 "HOST2WLAN_SOL",
196 "WLAN2HOST_SOL",
197 "MOS_BT_UART_CTS",
198 "MOS_BT_UART_RFR",
199
200 "MOS_BT_UART_TX", /* 30 */
201 "MOS_BT_UART_RX",
202 "PRB_SC_GPIO_32",
203 "HUB_RST_L",
204 "",
205 "",
206 "AP_SPI_FP_MISO",
207 "AP_SPI_FP_MOSI",
208 "AP_SPI_FP_CLK",
209 "AP_SPI_FP_CS_L",
210
211 "AP_EC_SPI_MISO", /* 40 */
212 "AP_EC_SPI_MOSI",
213 "AP_EC_SPI_CLK",
214 "AP_EC_SPI_CS_L",
215 "LCM_RST_L",
216 "EARLY_EUD_N",
217 "",
218 "DP_HOT_PLUG_DET",
219 "IO_BRD_MLB_ID0",
220 "IO_BRD_MLB_ID1",
221
222 "IO_BRD_MLB_ID2", /* 50 */
223 "SSD_EN",
224 "TS_I2C_SDA_CONN",
225 "TS_I2C_CLK_CONN",
226 "TS_RST_CONN",
227 "TS_INT_CONN",
228 "AP_I2C_TPM_SDA",
229 "AP_I2C_TPM_SCL",
230 "PRB_SC_GPIO_58",
231 "PRB_SC_GPIO_59",
232
233 "EDP_HOT_PLUG_DET_N", /* 60 */
234 "FP_TO_AP_IRQ_L",
235 "",
236 "AMP_EN",
237 "CAM0_MCLK_GPIO_64",
238 "CAM1_MCLK_GPIO_65",
239 "WF_CAM_MCLK",
240 "PRB_SC_GPIO_67",
241 "FPMCU_BOOT0",
242 "UF_CAM_SDA",
243
244 "UF_CAM_SCL", /* 70 */
245 "",
246 "",
247 "WF_CAM_SDA",
248 "WF_CAM_SCL",
249 "",
250 "",
251 "EN_FP_RAILS",
252 "FP_RST_L",
253 "PCIE1_CLKREQ_ODL",
254
255 "EN_PP3300_DX_EDP", /* 80 */
256 "SC_GPIO_81",
257 "FORCED_USB_BOOT",
258 "WCD_RESET_N",
259 "MOS_WLAN_EN",
260 "MOS_BT_EN",
261 "MOS_SW_CTRL",
262 "MOS_PCIE0_RST",
263 "MOS_PCIE0_CLKREQ_N",
264 "MOS_PCIE0_WAKE_N",
265
266 "MOS_LAA_AS_EN", /* 90 */
267 "SD_CD_ODL",
268 "",
269 "",
270 "MOS_BT_WLAN_SLIMBUS_CLK",
271 "MOS_BT_WLAN_SLIMBUS_DAT0",
272 "HP_MCLK",
273 "HP_BCLK",
274 "HP_DOUT",
275 "HP_DIN",
276
277 "HP_LRCLK", /* 100 */
278 "HP_IRQ",
279 "",
280 "",
281 "GSC_AP_INT_ODL",
282 "EN_PP3300_CODEC",
283 "AMP_BCLK",
284 "AMP_DIN",
285 "AMP_LRCLK",
286 "UIM1_DATA_GPIO_109",
287
288 "UIM1_CLK_GPIO_110", /* 110 */
289 "UIM1_RESET_GPIO_111",
290 "PRB_SC_GPIO_112",
291 "UIM0_DATA",
292 "UIM0_CLK",
293 "UIM0_RST",
294 "UIM0_PRESENT_ODL",
295 "SDM_RFFE0_CLK",
296 "SDM_RFFE0_DATA",
297 "WF_CAM_EN",
298
299 "FASTBOOT_SEL_0", /* 120 */
300 "SC_GPIO_121",
301 "FASTBOOT_SEL_1",
302 "SC_GPIO_123",
303 "FASTBOOT_SEL_2",
304 "SM_RFFE4_CLK_GRFC_8",
305 "SM_RFFE4_DATA_GRFC_9",
306 "WLAN_COEX_UART1_RX",
307 "WLAN_COEX_UART1_TX",
308 "PRB_SC_GPIO_129",
309
310 "LCM_ID0", /* 130 */
311 "LCM_ID1",
312 "",
313 "SDR_QLINK_REQ",
314 "SDR_QLINK_EN",
315 "QLINK0_WMSS_RESET_N",
316 "SMR526_QLINK1_REQ",
317 "SMR526_QLINK1_EN",
318 "SMR526_QLINK1_WMSS_RESET_N",
319 "PRB_SC_GPIO_139",
320
321 "SAR1_IRQ_ODL", /* 140 */
322 "SAR0_IRQ_ODL",
323 "PRB_SC_GPIO_142",
324 "",
325 "WCD_SWR_TX_CLK",
326 "WCD_SWR_TX_DATA0",
327 "WCD_SWR_TX_DATA1",
328 "WCD_SWR_RX_CLK",
329 "WCD_SWR_RX_DATA0",
330 "WCD_SWR_RX_DATA1",
331
332 "DMIC01_CLK", /* 150 */
333 "DMIC01_DATA",
334 "DMIC23_CLK",
335 "DMIC23_DATA",
336 "",
337 "",
338 "EC_IN_RW_ODL",
339 "HUB_EN",
340 "WCD_SWR_TX_DATA2",
341 "",
342
343 "", /* 160 */
344 "",
345 "",
346 "",
347 "",
348 "",
349 "",
350 "",
351 "",
352 "",
353
354 "", /* 170 */
355 "MOS_BLE_UART_TX",
356 "MOS_BLE_UART_RX",
357 "",
358 "";
359 };
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