1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Villager board device tree source
4 *
5 * Copyright 2022 Google LLC.
6 */
7
8 #include "sc7280-herobrine.dtsi"
9
10 /*
11 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
12 *
13 * Sort order matches the order in the parent files (parents before children).
14 */
15
16 &pp3300_codec {
17 status = "okay";
18 };
19
20 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
21
22 ap_tp_i2c: &i2c0 {
23 status = "okay";
24 clock-frequency = <400000>;
25
26 trackpad: trackpad@2c {
27 compatible = "hid-over-i2c";
28 reg = <0x2c>;
29 pinctrl-names = "default";
30 pinctrl-0 = <&tp_int_odl>;
31
32 interrupt-parent = <&tlmm>;
33 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
34
35 hid-descr-addr = <0x20>;
36 vdd-supply = <&pp3300_z1>;
37
38 wakeup-source;
39 };
40 };
41
42 ts_i2c: &i2c13 {
43 status = "okay";
44 clock-frequency = <400000>;
45
46 ap_ts: touchscreen@10 {
47 compatible = "elan,ekth6915";
48 reg = <0x10>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
51
52 interrupt-parent = <&tlmm>;
53 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
54
55 reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
56
57 vcc33-supply = <&ts_avdd>;
58 vccio-supply = <&ts_avccio>;
59 };
60 };
61
62 &ap_sar_sensor_i2c {
63 status = "okay";
64 };
65
66 &ap_sar_sensor0 {
67 status = "okay";
68 };
69
70 &ap_sar_sensor1 {
71 status = "okay";
72 };
73
74 &mdss_edp {
75 status = "okay";
76 };
77
78 &mdss_edp_phy {
79 status = "okay";
80 };
81
82 &pwmleds {
83 status = "okay";
84 };
85
86 /* For eMMC */
87 &sdhc_1 {
88 status = "okay";
89 };
90
91 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
92
93 &ts_rst_conn {
94 bias-disable;
95 };
96
97 /* PINCTRL - BOARD-SPECIFIC */
98
99 /*
100 * Methodology for gpio-line-names:
101 * - If a pin goes to herobrine board and is named it gets that name.
102 * - If a pin goes to herobrine board and is not named, it gets no name.
103 * - If a pin is totally internal to Qcard then it gets Qcard name.
104 * - If a pin is not hooked up on Qcard, it gets no name.
105 */
106
107 &pm8350c_gpios {
108 gpio-line-names = "FLASH_STROBE_1", /* 1 */
109 "AP_SUSPEND",
110 "PM8008_1_RST_N",
111 "",
112 "",
113 "",
114 "PMIC_EDP_BL_EN",
115 "PMIC_EDP_BL_PWM",
116 "";
117 };
118
119 &tlmm {
120 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
121 "AP_TP_I2C_SCL",
122 "SSD_RST_L",
123 "PE_WAKE_ODL",
124 "AP_SAR_SDA",
125 "AP_SAR_SCL",
126 "PRB_SC_GPIO_6",
127 "TP_INT_ODL",
128 "HP_I2C_SDA",
129 "HP_I2C_SCL",
130
131 "GNSS_L1_EN", /* 10 */
132 "GNSS_L5_EN",
133 "SPI_AP_MOSI",
134 "SPI_AP_MISO",
135 "SPI_AP_CLK",
136 "SPI_AP_CS0_L",
137 /*
138 * AP_FLASH_WP is crossystem ABI. Schematics
139 * call it BIOS_FLASH_WP_OD.
140 */
141 "AP_FLASH_WP",
142 "",
143 "AP_EC_INT_L",
144 "",
145
146 "UF_CAM_RST_L", /* 20 */
147 "WF_CAM_RST_L",
148 "UART_AP_TX_DBG_RX",
149 "UART_DBG_TX_AP_RX",
150 "",
151 "PM8008_IRQ_1",
152 "HOST2WLAN_SOL",
153 "WLAN2HOST_SOL",
154 "MOS_BT_UART_CTS",
155 "MOS_BT_UART_RFR",
156
157 "MOS_BT_UART_TX", /* 30 */
158 "MOS_BT_UART_RX",
159 "PRB_SC_GPIO_32",
160 "HUB_RST_L",
161 "",
162 "",
163 "AP_SPI_FP_MISO",
164 "AP_SPI_FP_MOSI",
165 "AP_SPI_FP_CLK",
166 "AP_SPI_FP_CS_L",
167
168 "AP_EC_SPI_MISO", /* 40 */
169 "AP_EC_SPI_MOSI",
170 "AP_EC_SPI_CLK",
171 "AP_EC_SPI_CS_L",
172 "LCM_RST_L",
173 "EARLY_EUD_N",
174 "",
175 "DP_HOT_PLUG_DET",
176 "IO_BRD_MLB_ID0",
177 "IO_BRD_MLB_ID1",
178
179 "IO_BRD_MLB_ID2", /* 50 */
180 "SSD_EN",
181 "TS_I2C_SDA_CONN",
182 "TS_I2C_CLK_CONN",
183 "TS_RST_CONN",
184 "TS_INT_CONN",
185 "AP_I2C_TPM_SDA",
186 "AP_I2C_TPM_SCL",
187 "PRB_SC_GPIO_58",
188 "PRB_SC_GPIO_59",
189
190 "EDP_HOT_PLUG_DET_N", /* 60 */
191 "FP_TO_AP_IRQ_L",
192 "",
193 "AMP_EN",
194 "CAM0_MCLK_GPIO_64",
195 "CAM1_MCLK_GPIO_65",
196 "WF_CAM_MCLK",
197 "PRB_SC_GPIO_67",
198 "FPMCU_BOOT0",
199 "UF_CAM_SDA",
200
201 "UF_CAM_SCL", /* 70 */
202 "",
203 "",
204 "WF_CAM_SDA",
205 "WF_CAM_SCL",
206 "",
207 "",
208 "EN_FP_RAILS",
209 "FP_RST_L",
210 "PCIE1_CLKREQ_ODL",
211
212 "EN_PP3300_DX_EDP", /* 80 */
213 "SC_GPIO_81",
214 "FORCED_USB_BOOT",
215 "WCD_RESET_N",
216 "MOS_WLAN_EN",
217 "MOS_BT_EN",
218 "MOS_SW_CTRL",
219 "MOS_PCIE0_RST",
220 "MOS_PCIE0_CLKREQ_N",
221 "MOS_PCIE0_WAKE_N",
222
223 "MOS_LAA_AS_EN", /* 90 */
224 "SD_CD_ODL",
225 "",
226 "",
227 "MOS_BT_WLAN_SLIMBUS_CLK",
228 "MOS_BT_WLAN_SLIMBUS_DAT0",
229 "HP_MCLK",
230 "HP_BCLK",
231 "HP_DOUT",
232 "HP_DIN",
233
234 "HP_LRCLK", /* 100 */
235 "HP_IRQ",
236 "",
237 "",
238 "GSC_AP_INT_ODL",
239 "EN_PP3300_CODEC",
240 "AMP_BCLK",
241 "AMP_DIN",
242 "AMP_LRCLK",
243 "UIM1_DATA_GPIO_109",
244
245 "UIM1_CLK_GPIO_110", /* 110 */
246 "UIM1_RESET_GPIO_111",
247 "PRB_SC_GPIO_112",
248 "UIM0_DATA",
249 "UIM0_CLK",
250 "UIM0_RST",
251 "UIM0_PRESENT_ODL",
252 "SDM_RFFE0_CLK",
253 "SDM_RFFE0_DATA",
254 "WF_CAM_EN",
255
256 "FASTBOOT_SEL_0", /* 120 */
257 "SC_GPIO_121",
258 "FASTBOOT_SEL_1",
259 "SC_GPIO_123",
260 "FASTBOOT_SEL_2",
261 "SM_RFFE4_CLK_GRFC_8",
262 "SM_RFFE4_DATA_GRFC_9",
263 "WLAN_COEX_UART1_RX",
264 "WLAN_COEX_UART1_TX",
265 "PRB_SC_GPIO_129",
266
267 "LCM_ID0", /* 130 */
268 "LCM_ID1",
269 "",
270 "SDR_QLINK_REQ",
271 "SDR_QLINK_EN",
272 "QLINK0_WMSS_RESET_N",
273 "SMR526_QLINK1_REQ",
274 "SMR526_QLINK1_EN",
275 "SMR526_QLINK1_WMSS_RESET_N",
276 "PRB_SC_GPIO_139",
277
278 "SAR1_IRQ_ODL", /* 140 */
279 "SAR0_IRQ_ODL",
280 "PRB_SC_GPIO_142",
281 "",
282 "WCD_SWR_TX_CLK",
283 "WCD_SWR_TX_DATA0",
284 "WCD_SWR_TX_DATA1",
285 "WCD_SWR_RX_CLK",
286 "WCD_SWR_RX_DATA0",
287 "WCD_SWR_RX_DATA1",
288
289 "DMIC01_CLK", /* 150 */
290 "DMIC01_DATA",
291 "DMIC23_CLK",
292 "DMIC23_DATA",
293 "",
294 "",
295 "EC_IN_RW_ODL",
296 "HUB_EN",
297 "WCD_SWR_TX_DATA2",
298 "",
299
300 "", /* 160 */
301 "",
302 "",
303 "",
304 "",
305 "",
306 "",
307 "",
308 "",
309 "",
310
311 "", /* 170 */
312 "MOS_BLE_UART_TX",
313 "MOS_BLE_UART_RX",
314 "",
315 "";
316 };
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