1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12
13 #include "x1e80100.dtsi"
14 #include "x1e80100-pmics.dtsi"
15
16 / {
17 model = "Qualcomm Technologies, Inc. X1E80100 CRD";
18 compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
19
20 aliases {
21 serial0 = &uart21;
22 };
23
24 wcd938x: audio-codec {
25 compatible = "qcom,wcd9385-codec";
26
27 pinctrl-names = "default";
28 pinctrl-0 = <&wcd_default>;
29
30 qcom,micbias1-microvolt = <1800000>;
31 qcom,micbias2-microvolt = <1800000>;
32 qcom,micbias3-microvolt = <1800000>;
33 qcom,micbias4-microvolt = <1800000>;
34 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
35 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
36 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
37 qcom,rx-device = <&wcd_rx>;
38 qcom,tx-device = <&wcd_tx>;
39
40 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
41
42 vdd-buck-supply = <&vreg_l15b_1p8>;
43 vdd-rxtx-supply = <&vreg_l15b_1p8>;
44 vdd-io-supply = <&vreg_l15b_1p8>;
45 vdd-mic-bias-supply = <&vreg_bob1>;
46
47 #sound-dai-cells = <1>;
48 };
49
50 chosen {
51 stdout-path = "serial0:115200n8";
52 };
53
54 gpio-keys {
55 compatible = "gpio-keys";
56
57 pinctrl-0 = <&hall_int_n_default>;
58 pinctrl-names = "default";
59
60 switch-lid {
61 gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
62 linux,input-type = <EV_SW>;
63 linux,code = <SW_LID>;
64 wakeup-source;
65 wakeup-event-action = <EV_ACT_DEASSERTED>;
66 };
67 };
68
69 pmic-glink {
70 compatible = "qcom,x1e80100-pmic-glink",
71 "qcom,sm8550-pmic-glink",
72 "qcom,pmic-glink";
73 #address-cells = <1>;
74 #size-cells = <0>;
75 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
76 <&tlmm 123 GPIO_ACTIVE_HIGH>,
77 <&tlmm 125 GPIO_ACTIVE_HIGH>;
78
79 /* Left-side rear port */
80 connector@0 {
81 compatible = "usb-c-connector";
82 reg = <0>;
83 power-role = "dual";
84 data-role = "dual";
85
86 ports {
87 #address-cells = <1>;
88 #size-cells = <0>;
89
90 port@0 {
91 reg = <0>;
92
93 pmic_glink_ss0_hs_in: endpoint {
94 remote-endpoint = <&usb_1_ss0_dwc3_hs>;
95 };
96 };
97
98 port@1 {
99 reg = <1>;
100
101 pmic_glink_ss0_ss_in: endpoint {
102 remote-endpoint = <&usb_1_ss0_qmpphy_out>;
103 };
104 };
105 };
106 };
107
108 /* Left-side front port */
109 connector@1 {
110 compatible = "usb-c-connector";
111 reg = <1>;
112 power-role = "dual";
113 data-role = "dual";
114
115 ports {
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 port@0 {
120 reg = <0>;
121
122 pmic_glink_ss1_hs_in: endpoint {
123 remote-endpoint = <&usb_1_ss1_dwc3_hs>;
124 };
125 };
126
127 port@1 {
128 reg = <1>;
129
130 pmic_glink_ss1_ss_in: endpoint {
131 remote-endpoint = <&usb_1_ss1_qmpphy_out>;
132 };
133 };
134 };
135 };
136
137 /* Right-side port */
138 connector@2 {
139 compatible = "usb-c-connector";
140 reg = <2>;
141 power-role = "dual";
142 data-role = "dual";
143
144 ports {
145 #address-cells = <1>;
146 #size-cells = <0>;
147
148 port@0 {
149 reg = <0>;
150
151 pmic_glink_ss2_hs_in: endpoint {
152 remote-endpoint = <&usb_1_ss2_dwc3_hs>;
153 };
154 };
155
156 port@1 {
157 reg = <1>;
158
159 pmic_glink_ss2_ss_in: endpoint {
160 remote-endpoint = <&usb_1_ss2_qmpphy_out>;
161 };
162 };
163 };
164 };
165 };
166
167 reserved-memory {
168 linux,cma {
169 compatible = "shared-dma-pool";
170 size = <0x0 0x8000000>;
171 reusable;
172 linux,cma-default;
173 };
174 };
175
176 sound {
177 compatible = "qcom,x1e80100-sndcard";
178 model = "X1E80100-CRD";
179 audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
180 "TweeterLeft IN", "WSA WSA_SPK2 OUT",
181 "WooferRight IN", "WSA2 WSA_SPK2 OUT",
182 "TweeterRight IN", "WSA2 WSA_SPK2 OUT",
183 "IN1_HPHL", "HPHL_OUT",
184 "IN2_HPHR", "HPHR_OUT",
185 "AMIC2", "MIC BIAS2",
186 "VA DMIC0", "MIC BIAS3",
187 "VA DMIC1", "MIC BIAS3",
188 "VA DMIC2", "MIC BIAS1",
189 "VA DMIC3", "MIC BIAS1",
190 "VA DMIC0", "VA MIC BIAS3",
191 "VA DMIC1", "VA MIC BIAS3",
192 "VA DMIC2", "VA MIC BIAS1",
193 "VA DMIC3", "VA MIC BIAS1",
194 "TX SWR_INPUT1", "ADC2_OUTPUT";
195
196 wcd-playback-dai-link {
197 link-name = "WCD Playback";
198
199 cpu {
200 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
201 };
202
203 codec {
204 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
205 };
206
207 platform {
208 sound-dai = <&q6apm>;
209 };
210 };
211
212 wcd-capture-dai-link {
213 link-name = "WCD Capture";
214
215 cpu {
216 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
217 };
218
219 codec {
220 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
221 };
222
223 platform {
224 sound-dai = <&q6apm>;
225 };
226 };
227
228 wsa-dai-link {
229 link-name = "WSA Playback";
230
231 cpu {
232 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
233 };
234
235 codec {
236 sound-dai = <&left_woofer>, <&left_tweeter>,
237 <&swr0 0>, <&lpass_wsamacro 0>,
238 <&right_woofer>, <&right_tweeter>,
239 <&swr3 0>, <&lpass_wsa2macro 0>;
240 };
241
242 platform {
243 sound-dai = <&q6apm>;
244 };
245 };
246
247 va-dai-link {
248 link-name = "VA Capture";
249
250 cpu {
251 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
252 };
253
254 codec {
255 sound-dai = <&lpass_vamacro 0>;
256 };
257
258 platform {
259 sound-dai = <&q6apm>;
260 };
261 };
262 };
263
264 vph_pwr: vph-pwr-regulator {
265 compatible = "regulator-fixed";
266
267 regulator-name = "vph_pwr";
268 regulator-min-microvolt = <3700000>;
269 regulator-max-microvolt = <3700000>;
270
271 regulator-always-on;
272 regulator-boot-on;
273 };
274
275 vreg_edp_3p3: regulator-edp-3p3 {
276 compatible = "regulator-fixed";
277
278 regulator-name = "VREG_EDP_3P3";
279 regulator-min-microvolt = <3300000>;
280 regulator-max-microvolt = <3300000>;
281
282 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
283 enable-active-high;
284
285 pinctrl-0 = <&edp_reg_en>;
286 pinctrl-names = "default";
287
288 regulator-boot-on;
289 };
290
291 vreg_nvme: regulator-nvme {
292 compatible = "regulator-fixed";
293
294 regulator-name = "VREG_NVME_3P3";
295 regulator-min-microvolt = <3300000>;
296 regulator-max-microvolt = <3300000>;
297
298 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
299 enable-active-high;
300
301 pinctrl-names = "default";
302 pinctrl-0 = <&nvme_reg_en>;
303
304 regulator-boot-on;
305 };
306
307 vreg_wwan: regulator-wwan {
308 compatible = "regulator-fixed";
309
310 regulator-name = "SDX_VPH_PWR";
311 regulator-min-microvolt = <3300000>;
312 regulator-max-microvolt = <3300000>;
313
314 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>;
315 enable-active-high;
316
317 pinctrl-0 = <&wwan_sw_en>;
318 pinctrl-names = "default";
319
320 regulator-boot-on;
321 };
322 };
323
324 &apps_rsc {
325 regulators-0 {
326 compatible = "qcom,pm8550-rpmh-regulators";
327 qcom,pmic-id = "b";
328
329 vdd-bob1-supply = <&vph_pwr>;
330 vdd-bob2-supply = <&vph_pwr>;
331 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
332 vdd-l2-l13-l14-supply = <&vreg_bob1>;
333 vdd-l5-l16-supply = <&vreg_bob1>;
334 vdd-l6-l7-supply = <&vreg_bob2>;
335 vdd-l8-l9-supply = <&vreg_bob1>;
336 vdd-l12-supply = <&vreg_s5j_1p2>;
337 vdd-l15-supply = <&vreg_s4c_1p8>;
338 vdd-l17-supply = <&vreg_bob2>;
339
340 vreg_bob1: bob1 {
341 regulator-name = "vreg_bob1";
342 regulator-min-microvolt = <3008000>;
343 regulator-max-microvolt = <3960000>;
344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
345 };
346
347 vreg_bob2: bob2 {
348 regulator-name = "vreg_bob2";
349 regulator-min-microvolt = <2504000>;
350 regulator-max-microvolt = <3008000>;
351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
352 };
353
354 vreg_l1b_1p8: ldo1 {
355 regulator-name = "vreg_l1b_1p8";
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <1800000>;
358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
359 };
360
361 vreg_l2b_3p0: ldo2 {
362 regulator-name = "vreg_l2b_3p0";
363 regulator-min-microvolt = <3072000>;
364 regulator-max-microvolt = <3100000>;
365 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
366 };
367
368 vreg_l4b_1p8: ldo4 {
369 regulator-name = "vreg_l4b_1p8";
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 };
374
375 vreg_l5b_3p0: ldo5 {
376 regulator-name = "vreg_l5b_3p0";
377 regulator-min-microvolt = <3000000>;
378 regulator-max-microvolt = <3000000>;
379 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380 };
381
382 vreg_l6b_1p8: ldo6 {
383 regulator-name = "vreg_l6b_1p8";
384 regulator-min-microvolt = <1800000>;
385 regulator-max-microvolt = <2960000>;
386 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387 };
388
389 vreg_l7b_2p8: ldo7 {
390 regulator-name = "vreg_l7b_2p8";
391 regulator-min-microvolt = <2800000>;
392 regulator-max-microvolt = <2800000>;
393 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
394 };
395
396 vreg_l8b_3p0: ldo8 {
397 regulator-name = "vreg_l8b_3p0";
398 regulator-min-microvolt = <3072000>;
399 regulator-max-microvolt = <3072000>;
400 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
401 };
402
403 vreg_l9b_2p9: ldo9 {
404 regulator-name = "vreg_l9b_2p9";
405 regulator-min-microvolt = <2960000>;
406 regulator-max-microvolt = <2960000>;
407 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
408 };
409
410 vreg_l10b_1p8: ldo10 {
411 regulator-name = "vreg_l10b_1p8";
412 regulator-min-microvolt = <1800000>;
413 regulator-max-microvolt = <1800000>;
414 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
415 };
416
417 vreg_l12b_1p2: ldo12 {
418 regulator-name = "vreg_l12b_1p2";
419 regulator-min-microvolt = <1200000>;
420 regulator-max-microvolt = <1200000>;
421 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
422 };
423
424 vreg_l13b_3p0: ldo13 {
425 regulator-name = "vreg_l13b_3p0";
426 regulator-min-microvolt = <3072000>;
427 regulator-max-microvolt = <3100000>;
428 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
429 };
430
431 vreg_l14b_3p0: ldo14 {
432 regulator-name = "vreg_l14b_3p0";
433 regulator-min-microvolt = <3072000>;
434 regulator-max-microvolt = <3072000>;
435 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
436 };
437
438 vreg_l15b_1p8: ldo15 {
439 regulator-name = "vreg_l15b_1p8";
440 regulator-min-microvolt = <1800000>;
441 regulator-max-microvolt = <1800000>;
442 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
443 };
444
445 vreg_l16b_2p9: ldo16 {
446 regulator-name = "vreg_l16b_2p9";
447 regulator-min-microvolt = <2912000>;
448 regulator-max-microvolt = <2912000>;
449 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
450 };
451
452 vreg_l17b_2p5: ldo17 {
453 regulator-name = "vreg_l17b_2p5";
454 regulator-min-microvolt = <2504000>;
455 regulator-max-microvolt = <2504000>;
456 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
457 };
458 };
459
460 regulators-1 {
461 compatible = "qcom,pm8550ve-rpmh-regulators";
462 qcom,pmic-id = "c";
463
464 vdd-l1-supply = <&vreg_s5j_1p2>;
465 vdd-l2-supply = <&vreg_s1f_0p7>;
466 vdd-l3-supply = <&vreg_s1f_0p7>;
467 vdd-s4-supply = <&vph_pwr>;
468
469 vreg_s4c_1p8: smps4 {
470 regulator-name = "vreg_s4c_1p8";
471 regulator-min-microvolt = <1856000>;
472 regulator-max-microvolt = <2000000>;
473 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
474 };
475
476 vreg_l1c_1p2: ldo1 {
477 regulator-name = "vreg_l1c_1p2";
478 regulator-min-microvolt = <1200000>;
479 regulator-max-microvolt = <1200000>;
480 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
481 };
482
483 vreg_l2c_0p8: ldo2 {
484 regulator-name = "vreg_l2c_0p8";
485 regulator-min-microvolt = <880000>;
486 regulator-max-microvolt = <920000>;
487 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
488 };
489
490 vreg_l3c_0p8: ldo3 {
491 regulator-name = "vreg_l3c_0p8";
492 regulator-min-microvolt = <880000>;
493 regulator-max-microvolt = <920000>;
494 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
495 };
496 };
497
498 regulators-2 {
499 compatible = "qcom,pmc8380-rpmh-regulators";
500 qcom,pmic-id = "d";
501
502 vdd-l1-supply = <&vreg_s1f_0p7>;
503 vdd-l2-supply = <&vreg_s1f_0p7>;
504 vdd-l3-supply = <&vreg_s4c_1p8>;
505 vdd-s1-supply = <&vph_pwr>;
506
507 vreg_l1d_0p8: ldo1 {
508 regulator-name = "vreg_l1d_0p8";
509 regulator-min-microvolt = <880000>;
510 regulator-max-microvolt = <920000>;
511 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
512 };
513
514 vreg_l2d_0p9: ldo2 {
515 regulator-name = "vreg_l2d_0p9";
516 regulator-min-microvolt = <912000>;
517 regulator-max-microvolt = <920000>;
518 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
519 };
520
521 vreg_l3d_1p8: ldo3 {
522 regulator-name = "vreg_l3d_1p8";
523 regulator-min-microvolt = <1800000>;
524 regulator-max-microvolt = <1800000>;
525 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
526 };
527 };
528
529 regulators-3 {
530 compatible = "qcom,pmc8380-rpmh-regulators";
531 qcom,pmic-id = "e";
532
533 vdd-l2-supply = <&vreg_s1f_0p7>;
534 vdd-l3-supply = <&vreg_s5j_1p2>;
535
536 vreg_l2e_0p8: ldo2 {
537 regulator-name = "vreg_l2e_0p8";
538 regulator-min-microvolt = <880000>;
539 regulator-max-microvolt = <920000>;
540 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
541 };
542
543 vreg_l3e_1p2: ldo3 {
544 regulator-name = "vreg_l3e_1p2";
545 regulator-min-microvolt = <1200000>;
546 regulator-max-microvolt = <1200000>;
547 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
548 };
549 };
550
551 regulators-4 {
552 compatible = "qcom,pmc8380-rpmh-regulators";
553 qcom,pmic-id = "f";
554
555 vdd-l1-supply = <&vreg_s5j_1p2>;
556 vdd-l2-supply = <&vreg_s5j_1p2>;
557 vdd-l3-supply = <&vreg_s5j_1p2>;
558 vdd-s1-supply = <&vph_pwr>;
559
560 vreg_s1f_0p7: smps1 {
561 regulator-name = "vreg_s1f_0p7";
562 regulator-min-microvolt = <700000>;
563 regulator-max-microvolt = <1100000>;
564 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
565 };
566
567 vreg_l1f_1p0: ldo1 {
568 regulator-name = "vreg_l1f_1p0";
569 regulator-min-microvolt = <1024000>;
570 regulator-max-microvolt = <1024000>;
571 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
572 };
573
574 vreg_l2f_1p0: ldo2 {
575 regulator-name = "vreg_l2f_1p0";
576 regulator-min-microvolt = <1024000>;
577 regulator-max-microvolt = <1024000>;
578 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
579 };
580
581 vreg_l3f_1p0: ldo3 {
582 regulator-name = "vreg_l3f_1p0";
583 regulator-min-microvolt = <1024000>;
584 regulator-max-microvolt = <1024000>;
585 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
586 };
587 };
588
589 regulators-6 {
590 compatible = "qcom,pm8550ve-rpmh-regulators";
591 qcom,pmic-id = "i";
592
593 vdd-l1-supply = <&vreg_s4c_1p8>;
594 vdd-l2-supply = <&vreg_s5j_1p2>;
595 vdd-l3-supply = <&vreg_s1f_0p7>;
596 vdd-s1-supply = <&vph_pwr>;
597 vdd-s2-supply = <&vph_pwr>;
598
599 vreg_s1i_0p9: smps1 {
600 regulator-name = "vreg_s1i_0p9";
601 regulator-min-microvolt = <900000>;
602 regulator-max-microvolt = <920000>;
603 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
604 };
605
606 vreg_s2i_1p0: smps2 {
607 regulator-name = "vreg_s2i_1p0";
608 regulator-min-microvolt = <1000000>;
609 regulator-max-microvolt = <1100000>;
610 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
611 };
612
613 vreg_l1i_1p8: ldo1 {
614 regulator-name = "vreg_l1i_1p8";
615 regulator-min-microvolt = <1800000>;
616 regulator-max-microvolt = <1800000>;
617 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
618 };
619
620 vreg_l2i_1p2: ldo2 {
621 regulator-name = "vreg_l2i_1p2";
622 regulator-min-microvolt = <1200000>;
623 regulator-max-microvolt = <1200000>;
624 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
625 };
626
627 vreg_l3i_0p8: ldo3 {
628 regulator-name = "vreg_l3i_0p8";
629 regulator-min-microvolt = <880000>;
630 regulator-max-microvolt = <920000>;
631 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
632 };
633 };
634
635 regulators-7 {
636 compatible = "qcom,pm8550ve-rpmh-regulators";
637 qcom,pmic-id = "j";
638
639 vdd-l1-supply = <&vreg_s1f_0p7>;
640 vdd-l2-supply = <&vreg_s5j_1p2>;
641 vdd-l3-supply = <&vreg_s1f_0p7>;
642 vdd-s5-supply = <&vph_pwr>;
643
644 vreg_s5j_1p2: smps5 {
645 regulator-name = "vreg_s5j_1p2";
646 regulator-min-microvolt = <1256000>;
647 regulator-max-microvolt = <1304000>;
648 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
649 };
650
651 vreg_l1j_0p8: ldo1 {
652 regulator-name = "vreg_l1j_0p8";
653 regulator-min-microvolt = <880000>;
654 regulator-max-microvolt = <920000>;
655 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
656 };
657
658 vreg_l2j_1p2: ldo2 {
659 regulator-name = "vreg_l2j_1p2";
660 regulator-min-microvolt = <1200000>;
661 regulator-max-microvolt = <1200000>;
662 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
663 };
664
665 vreg_l3j_0p8: ldo3 {
666 regulator-name = "vreg_l3j_0p8";
667 regulator-min-microvolt = <880000>;
668 regulator-max-microvolt = <920000>;
669 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
670 };
671 };
672 };
673
674 &gpu {
675 status = "okay";
676
677 zap-shader {
678 firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
679 };
680 };
681
682 &i2c0 {
683 clock-frequency = <400000>;
684
685 status = "okay";
686
687 touchpad@15 {
688 compatible = "hid-over-i2c";
689 reg = <0x15>;
690
691 hid-descr-addr = <0x1>;
692 interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
693
694 pinctrl-0 = <&tpad_default>;
695 pinctrl-names = "default";
696
697 wakeup-source;
698 };
699
700 keyboard@3a {
701 compatible = "hid-over-i2c";
702 reg = <0x3a>;
703
704 hid-descr-addr = <0x1>;
705 interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
706
707 pinctrl-0 = <&kybd_default>;
708 pinctrl-names = "default";
709
710 wakeup-source;
711 };
712 };
713
714 &i2c8 {
715 clock-frequency = <400000>;
716
717 status = "okay";
718
719 touchscreen@10 {
720 compatible = "hid-over-i2c";
721 reg = <0x10>;
722
723 hid-descr-addr = <0x1>;
724 interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>;
725
726 pinctrl-0 = <&ts0_default>;
727 pinctrl-names = "default";
728 };
729 };
730
731 &lpass_tlmm {
732 spkr_01_sd_n_active: spkr-01-sd-n-active-state {
733 pins = "gpio12";
734 function = "gpio";
735 drive-strength = <16>;
736 bias-disable;
737 output-low;
738 };
739
740 spkr_23_sd_n_active: spkr-23-sd-n-active-state {
741 pins = "gpio13";
742 function = "gpio";
743 drive-strength = <16>;
744 bias-disable;
745 output-low;
746 };
747 };
748
749 &lpass_vamacro {
750 pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
751 pinctrl-names = "default";
752
753 vdd-micb-supply = <&vreg_l1b_1p8>;
754 qcom,dmic-sample-rate = <4800000>;
755 };
756
757 &mdss {
758 status = "okay";
759 };
760
761 &mdss_dp3 {
762 compatible = "qcom,x1e80100-dp";
763 /delete-property/ #sound-dai-cells;
764
765 status = "okay";
766
767 aux-bus {
768 panel {
769 compatible = "samsung,atna45af01", "samsung,atna33xc20";
770 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
771 power-supply = <&vreg_edp_3p3>;
772
773 pinctrl-0 = <&edp_bl_en>;
774 pinctrl-names = "default";
775
776 port {
777 edp_panel_in: endpoint {
778 remote-endpoint = <&mdss_dp3_out>;
779 };
780 };
781 };
782 };
783
784 ports {
785 port@1 {
786 reg = <1>;
787 mdss_dp3_out: endpoint {
788 data-lanes = <0 1 2 3>;
789 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
790
791 remote-endpoint = <&edp_panel_in>;
792 };
793 };
794 };
795 };
796
797 &mdss_dp3_phy {
798 vdda-phy-supply = <&vreg_l3j_0p8>;
799 vdda-pll-supply = <&vreg_l2j_1p2>;
800
801 status = "okay";
802 };
803
804 &pcie4 {
805 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
806 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
807
808 pinctrl-0 = <&pcie4_default>;
809 pinctrl-names = "default";
810
811 status = "okay";
812 };
813
814 &pcie4_phy {
815 vdda-phy-supply = <&vreg_l3i_0p8>;
816 vdda-pll-supply = <&vreg_l3e_1p2>;
817
818 status = "okay";
819 };
820
821 &pcie5 {
822 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
823 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
824
825 vddpe-3v3-supply = <&vreg_wwan>;
826
827 pinctrl-0 = <&pcie5_default>;
828 pinctrl-names = "default";
829
830 status = "okay";
831 };
832
833 &pcie5_phy {
834 vdda-phy-supply = <&vreg_l3i_0p8>;
835 vdda-pll-supply = <&vreg_l3e_1p2>;
836
837 status = "okay";
838 };
839
840 &pcie6a {
841 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
842 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
843
844 vddpe-3v3-supply = <&vreg_nvme>;
845
846 pinctrl-names = "default";
847 pinctrl-0 = <&pcie6a_default>;
848
849 status = "okay";
850 };
851
852 &pcie6a_phy {
853 vdda-phy-supply = <&vreg_l1d_0p8>;
854 vdda-pll-supply = <&vreg_l2j_1p2>;
855
856 status = "okay";
857 };
858
859 &pmc8380_3_gpios {
860 edp_bl_en: edp-bl-en-state {
861 pins = "gpio4";
862 function = "normal";
863 power-source = <1>; /* 1.8V */
864 input-disable;
865 output-enable;
866 };
867 };
868
869 &qupv3_0 {
870 status = "okay";
871 };
872
873 &qupv3_1 {
874 status = "okay";
875 };
876
877 &qupv3_2 {
878 status = "okay";
879 };
880
881 &remoteproc_adsp {
882 firmware-name = "qcom/x1e80100/adsp.mbn",
883 "qcom/x1e80100/adsp_dtb.mbn";
884
885 status = "okay";
886 };
887
888 &remoteproc_cdsp {
889 firmware-name = "qcom/x1e80100/cdsp.mbn",
890 "qcom/x1e80100/cdsp_dtb.mbn";
891
892 status = "okay";
893 };
894
895 &smb2360_0_eusb2_repeater {
896 vdd18-supply = <&vreg_l3d_1p8>;
897 vdd3-supply = <&vreg_l2b_3p0>;
898 };
899
900 &smb2360_1_eusb2_repeater {
901 vdd18-supply = <&vreg_l3d_1p8>;
902 vdd3-supply = <&vreg_l14b_3p0>;
903 };
904
905 &smb2360_2 {
906 status = "okay";
907 };
908
909 &smb2360_2_eusb2_repeater {
910 vdd18-supply = <&vreg_l3d_1p8>;
911 vdd3-supply = <&vreg_l8b_3p0>;
912 };
913
914 &swr0 {
915 status = "okay";
916
917 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
918 pinctrl-names = "default";
919
920 /* WSA8845, Left Woofer */
921 left_woofer: speaker@0,0 {
922 compatible = "sdw20217020400";
923 reg = <0 0>;
924 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
925 #sound-dai-cells = <0>;
926 sound-name-prefix = "WooferLeft";
927 vdd-1p8-supply = <&vreg_l15b_1p8>;
928 vdd-io-supply = <&vreg_l12b_1p2>;
929 qcom,port-mapping = <1 2 3 7 10 13>;
930 };
931
932 /* WSA8845, Left Tweeter */
933 left_tweeter: speaker@0,1 {
934 compatible = "sdw20217020400";
935 reg = <0 1>;
936 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
937 #sound-dai-cells = <0>;
938 sound-name-prefix = "TweeterLeft";
939 vdd-1p8-supply = <&vreg_l15b_1p8>;
940 vdd-io-supply = <&vreg_l12b_1p2>;
941 qcom,port-mapping = <4 5 6 7 11 13>;
942 };
943 };
944
945 &swr1 {
946 status = "okay";
947
948 /* WCD9385 RX */
949 wcd_rx: codec@0,4 {
950 compatible = "sdw20217010d00";
951 reg = <0 4>;
952 qcom,rx-port-mapping = <1 2 3 4 5>;
953 };
954 };
955
956 &swr2 {
957 status = "okay";
958
959 /* WCD9385 TX */
960 wcd_tx: codec@0,3 {
961 compatible = "sdw20217010d00";
962 reg = <0 3>;
963 qcom,tx-port-mapping = <2 2 3 4>;
964 };
965 };
966
967 &swr3 {
968 status = "okay";
969
970 pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
971 pinctrl-names = "default";
972
973 /* WSA8845, Right Woofer */
974 right_woofer: speaker@0,0 {
975 compatible = "sdw20217020400";
976 reg = <0 0>;
977 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
978 #sound-dai-cells = <0>;
979 sound-name-prefix = "WooferRight";
980 vdd-1p8-supply = <&vreg_l15b_1p8>;
981 vdd-io-supply = <&vreg_l12b_1p2>;
982 qcom,port-mapping = <1 2 3 7 10 13>;
983 };
984
985 /* WSA8845, Right Tweeter */
986 right_tweeter: speaker@0,1 {
987 compatible = "sdw20217020400";
988 reg = <0 1>;
989 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
990 #sound-dai-cells = <0>;
991 sound-name-prefix = "TweeterRight";
992 vdd-1p8-supply = <&vreg_l15b_1p8>;
993 vdd-io-supply = <&vreg_l12b_1p2>;
994 qcom,port-mapping = <4 5 6 7 11 13>;
995 };
996 };
997
998 &tlmm {
999 gpio-reserved-ranges = <34 2>, /* Unused */
1000 <44 4>, /* SPI (TPM) */
1001 <238 1>; /* UFS Reset */
1002
1003 edp_reg_en: edp-reg-en-state {
1004 pins = "gpio70";
1005 function = "gpio";
1006 drive-strength = <16>;
1007 bias-disable;
1008 };
1009
1010 hall_int_n_default: hall-int-n-state {
1011 pins = "gpio92";
1012 function = "gpio";
1013 bias-disable;
1014 };
1015
1016 kybd_default: kybd-default-state {
1017 pins = "gpio67";
1018 function = "gpio";
1019 bias-disable;
1020 };
1021
1022 nvme_reg_en: nvme-reg-en-state {
1023 pins = "gpio18";
1024 function = "gpio";
1025 drive-strength = <2>;
1026 bias-disable;
1027 };
1028
1029 pcie4_default: pcie4-default-state {
1030 clkreq-n-pins {
1031 pins = "gpio147";
1032 function = "pcie4_clk";
1033 drive-strength = <2>;
1034 bias-pull-up;
1035 };
1036
1037 perst-n-pins {
1038 pins = "gpio146";
1039 function = "gpio";
1040 drive-strength = <2>;
1041 bias-disable;
1042 };
1043
1044 wake-n-pins {
1045 pins = "gpio148";
1046 function = "gpio";
1047 drive-strength = <2>;
1048 bias-pull-up;
1049 };
1050 };
1051
1052 pcie5_default: pcie5-default-state {
1053 clkreq-n-pins {
1054 pins = "gpio150";
1055 function = "pcie5_clk";
1056 drive-strength = <2>;
1057 bias-pull-up;
1058 };
1059
1060 perst-n-pins {
1061 pins = "gpio149";
1062 function = "gpio";
1063 drive-strength = <2>;
1064 bias-disable;
1065 };
1066
1067 wake-n-pins {
1068 pins = "gpio151";
1069 function = "gpio";
1070 drive-strength = <2>;
1071 bias-pull-up;
1072 };
1073 };
1074
1075 pcie6a_default: pcie6a-default-state {
1076 clkreq-n-pins {
1077 pins = "gpio153";
1078 function = "pcie6a_clk";
1079 drive-strength = <2>;
1080 bias-pull-up;
1081 };
1082
1083 perst-n-pins {
1084 pins = "gpio152";
1085 function = "gpio";
1086 drive-strength = <2>;
1087 bias-disable;
1088 };
1089
1090 wake-n-pins {
1091 pins = "gpio154";
1092 function = "gpio";
1093 drive-strength = <2>;
1094 bias-pull-up;
1095 };
1096 };
1097
1098 tpad_default: tpad-default-state {
1099 pins = "gpio3";
1100 function = "gpio";
1101 bias-disable;
1102 };
1103
1104 ts0_default: ts0-default-state {
1105 int-n-pins {
1106 pins = "gpio51";
1107 function = "gpio";
1108 bias-disable;
1109 };
1110
1111 reset-n-pins {
1112 pins = "gpio48";
1113 function = "gpio";
1114 output-high;
1115 drive-strength = <16>;
1116 };
1117 };
1118
1119 wcd_default: wcd-reset-n-active-state {
1120 pins = "gpio191";
1121 function = "gpio";
1122 drive-strength = <16>;
1123 bias-disable;
1124 output-low;
1125 };
1126
1127 wwan_sw_en: wwan-sw-en-state {
1128 pins = "gpio221";
1129 function = "gpio";
1130 drive-strength = <4>;
1131 bias-disable;
1132 };
1133 };
1134
1135 &uart21 {
1136 compatible = "qcom,geni-debug-uart";
1137 status = "okay";
1138 };
1139
1140 &usb_1_ss0_hsphy {
1141 vdd-supply = <&vreg_l3j_0p8>;
1142 vdda12-supply = <&vreg_l2j_1p2>;
1143
1144 phys = <&smb2360_0_eusb2_repeater>;
1145
1146 status = "okay";
1147 };
1148
1149 &usb_1_ss0_qmpphy {
1150 vdda-phy-supply = <&vreg_l3e_1p2>;
1151 vdda-pll-supply = <&vreg_l1j_0p8>;
1152
1153 status = "okay";
1154 };
1155
1156 &usb_1_ss0 {
1157 status = "okay";
1158 };
1159
1160 &usb_1_ss0_dwc3 {
1161 dr_mode = "host";
1162 };
1163
1164 &usb_1_ss0_dwc3_hs {
1165 remote-endpoint = <&pmic_glink_ss0_hs_in>;
1166 };
1167
1168 &usb_1_ss0_qmpphy_out {
1169 remote-endpoint = <&pmic_glink_ss0_ss_in>;
1170 };
1171
1172 &usb_1_ss1_hsphy {
1173 vdd-supply = <&vreg_l3j_0p8>;
1174 vdda12-supply = <&vreg_l2j_1p2>;
1175
1176 phys = <&smb2360_1_eusb2_repeater>;
1177
1178 status = "okay";
1179 };
1180
1181 &usb_1_ss1_qmpphy {
1182 vdda-phy-supply = <&vreg_l3e_1p2>;
1183 vdda-pll-supply = <&vreg_l2d_0p9>;
1184
1185 status = "okay";
1186 };
1187
1188 &usb_1_ss1 {
1189 status = "okay";
1190 };
1191
1192 &usb_1_ss1_dwc3 {
1193 dr_mode = "host";
1194 };
1195
1196 &usb_1_ss1_dwc3_hs {
1197 remote-endpoint = <&pmic_glink_ss1_hs_in>;
1198 };
1199
1200 &usb_1_ss1_qmpphy_out {
1201 remote-endpoint = <&pmic_glink_ss1_ss_in>;
1202 };
1203
1204 &usb_1_ss2_hsphy {
1205 vdd-supply = <&vreg_l3j_0p8>;
1206 vdda12-supply = <&vreg_l2j_1p2>;
1207
1208 phys = <&smb2360_2_eusb2_repeater>;
1209
1210 status = "okay";
1211 };
1212
1213 &usb_1_ss2_qmpphy {
1214 vdda-phy-supply = <&vreg_l3e_1p2>;
1215 vdda-pll-supply = <&vreg_l2d_0p9>;
1216
1217 status = "okay";
1218 };
1219
1220 &usb_1_ss2 {
1221 status = "okay";
1222 };
1223
1224 &usb_1_ss2_dwc3 {
1225 dr_mode = "host";
1226 };
1227
1228 &usb_1_ss2_dwc3_hs {
1229 remote-endpoint = <&pmic_glink_ss2_hs_in>;
1230 };
1231
1232 &usb_1_ss2_qmpphy_out {
1233 remote-endpoint = <&pmic_glink_ss2_ss_in>;
1234 };
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