1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11 #include "x1e80100.dtsi"
12 #include "x1e80100-pmics.dtsi"
13
14 / {
15 model = "Qualcomm Technologies, Inc. X1E80100 QCP";
16 compatible = "qcom,x1e80100-qcp", "qcom,x1e80100";
17
18 aliases {
19 serial0 = &uart21;
20 };
21
22 wcd938x: audio-codec {
23 compatible = "qcom,wcd9385-codec";
24
25 pinctrl-names = "default";
26 pinctrl-0 = <&wcd_default>;
27
28 qcom,micbias1-microvolt = <1800000>;
29 qcom,micbias2-microvolt = <1800000>;
30 qcom,micbias3-microvolt = <1800000>;
31 qcom,micbias4-microvolt = <1800000>;
32 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
33 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
34 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
35 qcom,rx-device = <&wcd_rx>;
36 qcom,tx-device = <&wcd_tx>;
37
38 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
39
40 vdd-buck-supply = <&vreg_l15b_1p8>;
41 vdd-rxtx-supply = <&vreg_l15b_1p8>;
42 vdd-io-supply = <&vreg_l15b_1p8>;
43 vdd-mic-bias-supply = <&vreg_bob1>;
44
45 #sound-dai-cells = <1>;
46 };
47
48 chosen {
49 stdout-path = "serial0:115200n8";
50 };
51
52 pmic-glink {
53 compatible = "qcom,x1e80100-pmic-glink",
54 "qcom,sm8550-pmic-glink",
55 "qcom,pmic-glink";
56 #address-cells = <1>;
57 #size-cells = <0>;
58 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
59 <&tlmm 123 GPIO_ACTIVE_HIGH>,
60 <&tlmm 125 GPIO_ACTIVE_HIGH>;
61
62 connector@0 {
63 compatible = "usb-c-connector";
64 reg = <0>;
65 power-role = "dual";
66 data-role = "dual";
67
68 ports {
69 #address-cells = <1>;
70 #size-cells = <0>;
71
72 port@0 {
73 reg = <0>;
74
75 pmic_glink_ss0_hs_in: endpoint {
76 remote-endpoint = <&usb_1_ss0_dwc3_hs>;
77 };
78 };
79
80 port@1 {
81 reg = <1>;
82
83 pmic_glink_ss0_ss_in: endpoint {
84 remote-endpoint = <&usb_1_ss0_qmpphy_out>;
85 };
86 };
87 };
88 };
89
90 connector@1 {
91 compatible = "usb-c-connector";
92 reg = <1>;
93 power-role = "dual";
94 data-role = "dual";
95
96 ports {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 port@0 {
101 reg = <0>;
102
103 pmic_glink_ss1_hs_in: endpoint {
104 remote-endpoint = <&usb_1_ss1_dwc3_hs>;
105 };
106 };
107
108 port@1 {
109 reg = <1>;
110
111 pmic_glink_ss1_ss_in: endpoint {
112 remote-endpoint = <&usb_1_ss1_qmpphy_out>;
113 };
114 };
115 };
116 };
117
118 connector@2 {
119 compatible = "usb-c-connector";
120 reg = <2>;
121 power-role = "dual";
122 data-role = "dual";
123
124 ports {
125 #address-cells = <1>;
126 #size-cells = <0>;
127
128 port@0 {
129 reg = <0>;
130
131 pmic_glink_ss2_hs_in: endpoint {
132 remote-endpoint = <&usb_1_ss2_dwc3_hs>;
133 };
134 };
135
136 port@1 {
137 reg = <1>;
138
139 pmic_glink_ss2_ss_in: endpoint {
140 remote-endpoint = <&usb_1_ss2_qmpphy_out>;
141 };
142 };
143 };
144 };
145 };
146
147 reserved-memory {
148 linux,cma {
149 compatible = "shared-dma-pool";
150 size = <0x0 0x8000000>;
151 reusable;
152 linux,cma-default;
153 };
154 };
155
156 sound {
157 compatible = "qcom,x1e80100-sndcard";
158 model = "X1E80100-QCP";
159 audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT",
160 "SpkrRight IN", "WSA WSA_SPK2 OUT",
161 "IN1_HPHL", "HPHL_OUT",
162 "IN2_HPHR", "HPHR_OUT",
163 "AMIC2", "MIC BIAS2",
164 "TX SWR_INPUT1", "ADC2_OUTPUT";
165
166 wcd-playback-dai-link {
167 link-name = "WCD Playback";
168
169 cpu {
170 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
171 };
172
173 codec {
174 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
175 };
176
177 platform {
178 sound-dai = <&q6apm>;
179 };
180 };
181
182 wcd-capture-dai-link {
183 link-name = "WCD Capture";
184
185 cpu {
186 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
187 };
188
189 codec {
190 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
191 };
192
193 platform {
194 sound-dai = <&q6apm>;
195 };
196 };
197
198 wsa-dai-link {
199 link-name = "WSA Playback";
200
201 cpu {
202 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
203 };
204
205 codec {
206 sound-dai = <&left_spkr>, <&right_spkr>,
207 <&swr0 0>, <&lpass_wsamacro 0>;
208 };
209
210 platform {
211 sound-dai = <&q6apm>;
212 };
213 };
214 };
215
216 vph_pwr: vph-pwr-regulator {
217 compatible = "regulator-fixed";
218
219 regulator-name = "vph_pwr";
220 regulator-min-microvolt = <3700000>;
221 regulator-max-microvolt = <3700000>;
222
223 regulator-always-on;
224 regulator-boot-on;
225 };
226
227 vreg_edp_3p3: regulator-edp-3p3 {
228 compatible = "regulator-fixed";
229
230 regulator-name = "VREG_EDP_3P3";
231 regulator-min-microvolt = <3300000>;
232 regulator-max-microvolt = <3300000>;
233
234 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
235 enable-active-high;
236
237 pinctrl-0 = <&edp_reg_en>;
238 pinctrl-names = "default";
239
240 regulator-always-on;
241 regulator-boot-on;
242 };
243
244 vreg_nvme: regulator-nvme {
245 compatible = "regulator-fixed";
246
247 regulator-name = "VREG_NVME_3P3";
248 regulator-min-microvolt = <3300000>;
249 regulator-max-microvolt = <3300000>;
250
251 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
252 enable-active-high;
253
254 pinctrl-names = "default";
255 pinctrl-0 = <&nvme_reg_en>;
256
257 regulator-boot-on;
258 };
259 };
260
261 &apps_rsc {
262 regulators-0 {
263 compatible = "qcom,pm8550-rpmh-regulators";
264 qcom,pmic-id = "b";
265
266 vdd-bob1-supply = <&vph_pwr>;
267 vdd-bob2-supply = <&vph_pwr>;
268 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
269 vdd-l2-l13-l14-supply = <&vreg_bob1>;
270 vdd-l5-l16-supply = <&vreg_bob1>;
271 vdd-l6-l7-supply = <&vreg_bob2>;
272 vdd-l8-l9-supply = <&vreg_bob1>;
273 vdd-l12-supply = <&vreg_s5j_1p2>;
274 vdd-l15-supply = <&vreg_s4c_1p8>;
275 vdd-l17-supply = <&vreg_bob2>;
276
277 vreg_bob1: bob1 {
278 regulator-name = "vreg_bob1";
279 regulator-min-microvolt = <3008000>;
280 regulator-max-microvolt = <3960000>;
281 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282 };
283
284 vreg_bob2: bob2 {
285 regulator-name = "vreg_bob2";
286 regulator-min-microvolt = <2504000>;
287 regulator-max-microvolt = <3008000>;
288 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
289 };
290
291 vreg_l1b_1p8: ldo1 {
292 regulator-name = "vreg_l1b_1p8";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
296 };
297
298 vreg_l2b_3p0: ldo2 {
299 regulator-name = "vreg_l2b_3p0";
300 regulator-min-microvolt = <3072000>;
301 regulator-max-microvolt = <3100000>;
302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303 };
304
305 vreg_l4b_1p8: ldo4 {
306 regulator-name = "vreg_l4b_1p8";
307 regulator-min-microvolt = <1800000>;
308 regulator-max-microvolt = <1800000>;
309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310 };
311
312 vreg_l5b_3p0: ldo5 {
313 regulator-name = "vreg_l5b_3p0";
314 regulator-min-microvolt = <3000000>;
315 regulator-max-microvolt = <3000000>;
316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317 };
318
319 vreg_l6b_1p8: ldo6 {
320 regulator-name = "vreg_l6b_1p8";
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <2960000>;
323 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
324 };
325
326 vreg_l7b_2p8: ldo7 {
327 regulator-name = "vreg_l7b_2p8";
328 regulator-min-microvolt = <2800000>;
329 regulator-max-microvolt = <2800000>;
330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
331 };
332
333 vreg_l8b_3p0: ldo8 {
334 regulator-name = "vreg_l8b_3p0";
335 regulator-min-microvolt = <3072000>;
336 regulator-max-microvolt = <3072000>;
337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
338 };
339
340 vreg_l9b_2p9: ldo9 {
341 regulator-name = "vreg_l9b_2p9";
342 regulator-min-microvolt = <2960000>;
343 regulator-max-microvolt = <2960000>;
344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
345 };
346
347 vreg_l10b_1p8: ldo10 {
348 regulator-name = "vreg_l10b_1p8";
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <1800000>;
351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
352 };
353
354 vreg_l12b_1p2: ldo12 {
355 regulator-name = "vreg_l12b_1p2";
356 regulator-min-microvolt = <1200000>;
357 regulator-max-microvolt = <1200000>;
358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
359 };
360
361 vreg_l13b_3p0: ldo13 {
362 regulator-name = "vreg_l13b_3p0";
363 regulator-min-microvolt = <3072000>;
364 regulator-max-microvolt = <3100000>;
365 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
366 };
367
368 vreg_l14b_3p0: ldo14 {
369 regulator-name = "vreg_l14b_3p0";
370 regulator-min-microvolt = <3072000>;
371 regulator-max-microvolt = <3072000>;
372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373 };
374
375 vreg_l15b_1p8: ldo15 {
376 regulator-name = "vreg_l15b_1p8";
377 regulator-min-microvolt = <1800000>;
378 regulator-max-microvolt = <1800000>;
379 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380 };
381
382 vreg_l16b_2p9: ldo16 {
383 regulator-name = "vreg_l16b_2p9";
384 regulator-min-microvolt = <2912000>;
385 regulator-max-microvolt = <2912000>;
386 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387 };
388
389 vreg_l17b_2p5: ldo17 {
390 regulator-name = "vreg_l17b_2p5";
391 regulator-min-microvolt = <2504000>;
392 regulator-max-microvolt = <2504000>;
393 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
394 };
395 };
396
397 regulators-1 {
398 compatible = "qcom,pm8550ve-rpmh-regulators";
399 qcom,pmic-id = "c";
400
401 vdd-l1-supply = <&vreg_s5j_1p2>;
402 vdd-l2-supply = <&vreg_s1f_0p7>;
403 vdd-l3-supply = <&vreg_s1f_0p7>;
404 vdd-s4-supply = <&vph_pwr>;
405
406 vreg_s4c_1p8: smps4 {
407 regulator-name = "vreg_s4c_1p8";
408 regulator-min-microvolt = <1856000>;
409 regulator-max-microvolt = <2000000>;
410 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
411 };
412
413 vreg_l1c_1p2: ldo1 {
414 regulator-name = "vreg_l1c_1p2";
415 regulator-min-microvolt = <1200000>;
416 regulator-max-microvolt = <1200000>;
417 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
418 };
419
420 vreg_l2c_0p8: ldo2 {
421 regulator-name = "vreg_l2c_0p8";
422 regulator-min-microvolt = <880000>;
423 regulator-max-microvolt = <920000>;
424 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
425 };
426
427 vreg_l3c_0p8: ldo3 {
428 regulator-name = "vreg_l3c_0p8";
429 regulator-min-microvolt = <880000>;
430 regulator-max-microvolt = <920000>;
431 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
432 };
433 };
434
435 regulators-2 {
436 compatible = "qcom,pmc8380-rpmh-regulators";
437 qcom,pmic-id = "d";
438
439 vdd-l1-supply = <&vreg_s1f_0p7>;
440 vdd-l2-supply = <&vreg_s1f_0p7>;
441 vdd-l3-supply = <&vreg_s4c_1p8>;
442 vdd-s1-supply = <&vph_pwr>;
443
444 vreg_l1d_0p8: ldo1 {
445 regulator-name = "vreg_l1d_0p8";
446 regulator-min-microvolt = <880000>;
447 regulator-max-microvolt = <920000>;
448 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
449 };
450
451 vreg_l2d_0p9: ldo2 {
452 regulator-name = "vreg_l2d_0p9";
453 regulator-min-microvolt = <912000>;
454 regulator-max-microvolt = <920000>;
455 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
456 };
457
458 vreg_l3d_1p8: ldo3 {
459 regulator-name = "vreg_l3d_1p8";
460 regulator-min-microvolt = <1800000>;
461 regulator-max-microvolt = <1800000>;
462 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
463 };
464 };
465
466 regulators-3 {
467 compatible = "qcom,pmc8380-rpmh-regulators";
468 qcom,pmic-id = "e";
469
470 vdd-l2-supply = <&vreg_s1f_0p7>;
471 vdd-l3-supply = <&vreg_s5j_1p2>;
472
473 vreg_l2e_0p8: ldo2 {
474 regulator-name = "vreg_l2e_0p8";
475 regulator-min-microvolt = <880000>;
476 regulator-max-microvolt = <920000>;
477 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
478 };
479
480 vreg_l3e_1p2: ldo3 {
481 regulator-name = "vreg_l3e_1p2";
482 regulator-min-microvolt = <1200000>;
483 regulator-max-microvolt = <1200000>;
484 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
485 };
486 };
487
488 regulators-4 {
489 compatible = "qcom,pmc8380-rpmh-regulators";
490 qcom,pmic-id = "f";
491
492 vdd-l1-supply = <&vreg_s5j_1p2>;
493 vdd-l2-supply = <&vreg_s5j_1p2>;
494 vdd-l3-supply = <&vreg_s5j_1p2>;
495 vdd-s1-supply = <&vph_pwr>;
496
497 vreg_s1f_0p7: smps1 {
498 regulator-name = "vreg_s1f_0p7";
499 regulator-min-microvolt = <700000>;
500 regulator-max-microvolt = <1100000>;
501 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
502 };
503
504 vreg_l1f_1p0: ldo1 {
505 regulator-name = "vreg_l1f_1p0";
506 regulator-min-microvolt = <1024000>;
507 regulator-max-microvolt = <1024000>;
508 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
509 };
510
511 vreg_l2f_1p0: ldo2 {
512 regulator-name = "vreg_l2f_1p0";
513 regulator-min-microvolt = <1024000>;
514 regulator-max-microvolt = <1024000>;
515 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
516 };
517
518 vreg_l3f_1p0: ldo3 {
519 regulator-name = "vreg_l3f_1p0";
520 regulator-min-microvolt = <1024000>;
521 regulator-max-microvolt = <1024000>;
522 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
523 };
524 };
525
526 regulators-6 {
527 compatible = "qcom,pm8550ve-rpmh-regulators";
528 qcom,pmic-id = "i";
529
530 vdd-l1-supply = <&vreg_s4c_1p8>;
531 vdd-l2-supply = <&vreg_s5j_1p2>;
532 vdd-l3-supply = <&vreg_s1f_0p7>;
533 vdd-s1-supply = <&vph_pwr>;
534 vdd-s2-supply = <&vph_pwr>;
535
536 vreg_s1i_0p9: smps1 {
537 regulator-name = "vreg_s1i_0p9";
538 regulator-min-microvolt = <900000>;
539 regulator-max-microvolt = <920000>;
540 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
541 };
542
543 vreg_s2i_1p0: smps2 {
544 regulator-name = "vreg_s2i_1p0";
545 regulator-min-microvolt = <1000000>;
546 regulator-max-microvolt = <1100000>;
547 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
548 };
549
550 vreg_l1i_1p8: ldo1 {
551 regulator-name = "vreg_l1i_1p8";
552 regulator-min-microvolt = <1800000>;
553 regulator-max-microvolt = <1800000>;
554 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
555 };
556
557 vreg_l2i_1p2: ldo2 {
558 regulator-name = "vreg_l2i_1p2";
559 regulator-min-microvolt = <1200000>;
560 regulator-max-microvolt = <1200000>;
561 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
562 };
563
564 vreg_l3i_0p8: ldo3 {
565 regulator-name = "vreg_l3i_0p8";
566 regulator-min-microvolt = <880000>;
567 regulator-max-microvolt = <920000>;
568 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
569 };
570 };
571
572 regulators-7 {
573 compatible = "qcom,pm8550ve-rpmh-regulators";
574 qcom,pmic-id = "j";
575
576 vdd-l1-supply = <&vreg_s1f_0p7>;
577 vdd-l2-supply = <&vreg_s5j_1p2>;
578 vdd-l3-supply = <&vreg_s1f_0p7>;
579 vdd-s5-supply = <&vph_pwr>;
580
581 vreg_s5j_1p2: smps5 {
582 regulator-name = "vreg_s5j_1p2";
583 regulator-min-microvolt = <1256000>;
584 regulator-max-microvolt = <1304000>;
585 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
586 };
587
588 vreg_l1j_0p8: ldo1 {
589 regulator-name = "vreg_l1j_0p8";
590 regulator-min-microvolt = <880000>;
591 regulator-max-microvolt = <920000>;
592 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
593 };
594
595 vreg_l2j_1p2: ldo2 {
596 regulator-name = "vreg_l2j_1p2";
597 regulator-min-microvolt = <1200000>;
598 regulator-max-microvolt = <1200000>;
599 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
600 };
601
602 vreg_l3j_0p8: ldo3 {
603 regulator-name = "vreg_l3j_0p8";
604 regulator-min-microvolt = <880000>;
605 regulator-max-microvolt = <920000>;
606 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
607 };
608 };
609 };
610
611 &gpu {
612 status = "okay";
613
614 zap-shader {
615 firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
616 };
617 };
618
619 &lpass_tlmm {
620 spkr_01_sd_n_active: spkr-01-sd-n-active-state {
621 pins = "gpio12";
622 function = "gpio";
623 drive-strength = <16>;
624 bias-disable;
625 output-low;
626 };
627 };
628
629 &mdss {
630 status = "okay";
631 };
632
633 &mdss_dp3 {
634 compatible = "qcom,x1e80100-dp";
635 /delete-property/ #sound-dai-cells;
636
637 status = "okay";
638
639 aux-bus {
640 panel {
641 compatible = "edp-panel";
642 power-supply = <&vreg_edp_3p3>;
643
644 port {
645 edp_panel_in: endpoint {
646 remote-endpoint = <&mdss_dp3_out>;
647 };
648 };
649 };
650 };
651
652 ports {
653 port@1 {
654 reg = <1>;
655 mdss_dp3_out: endpoint {
656 data-lanes = <0 1 2 3>;
657 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
658
659 remote-endpoint = <&edp_panel_in>;
660 };
661 };
662 };
663 };
664
665 &mdss_dp3_phy {
666 vdda-phy-supply = <&vreg_l3j_0p8>;
667 vdda-pll-supply = <&vreg_l2j_1p2>;
668
669 status = "okay";
670 };
671
672 &pcie4 {
673 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
674 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
675
676 pinctrl-0 = <&pcie4_default>;
677 pinctrl-names = "default";
678
679 status = "okay";
680 };
681
682 &pcie4_phy {
683 vdda-phy-supply = <&vreg_l3i_0p8>;
684 vdda-pll-supply = <&vreg_l3e_1p2>;
685
686 status = "okay";
687 };
688
689 &pcie6a {
690 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
691 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
692
693 vddpe-3v3-supply = <&vreg_nvme>;
694
695 pinctrl-names = "default";
696 pinctrl-0 = <&pcie6a_default>;
697
698 status = "okay";
699 };
700
701 &pcie6a_phy {
702 vdda-phy-supply = <&vreg_l1d_0p8>;
703 vdda-pll-supply = <&vreg_l2j_1p2>;
704
705 status = "okay";
706 };
707
708 &qupv3_0 {
709 status = "okay";
710 };
711
712 &qupv3_1 {
713 status = "okay";
714 };
715
716 &qupv3_2 {
717 status = "okay";
718 };
719
720 &remoteproc_adsp {
721 firmware-name = "qcom/x1e80100/adsp.mbn",
722 "qcom/x1e80100/adsp_dtb.mbn";
723
724 status = "okay";
725 };
726
727 &remoteproc_cdsp {
728 firmware-name = "qcom/x1e80100/cdsp.mbn",
729 "qcom/x1e80100/cdsp_dtb.mbn";
730
731 status = "okay";
732 };
733
734 &smb2360_0_eusb2_repeater {
735 vdd18-supply = <&vreg_l3d_1p8>;
736 vdd3-supply = <&vreg_l2b_3p0>;
737 };
738
739 &smb2360_1_eusb2_repeater {
740 vdd18-supply = <&vreg_l3d_1p8>;
741 vdd3-supply = <&vreg_l14b_3p0>;
742 };
743
744 &smb2360_2 {
745 status = "okay";
746 };
747
748 &smb2360_2_eusb2_repeater {
749 vdd18-supply = <&vreg_l3d_1p8>;
750 vdd3-supply = <&vreg_l8b_3p0>;
751 };
752
753 &smb2360_3 {
754 status = "okay";
755 };
756
757 &swr0 {
758 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
759 pinctrl-names = "default";
760
761 status = "okay";
762
763 /* WSA8845, Left Speaker */
764 left_spkr: speaker@0,0 {
765 compatible = "sdw20217020400";
766 reg = <0 0>;
767 #sound-dai-cells = <0>;
768 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
769 sound-name-prefix = "SpkrLeft";
770 vdd-1p8-supply = <&vreg_l15b_1p8>;
771 vdd-io-supply = <&vreg_l12b_1p2>;
772 qcom,port-mapping = <1 2 3 7 10 13>;
773 };
774
775 /* WSA8845, Right Speaker */
776 right_spkr: speaker@0,1 {
777 compatible = "sdw20217020400";
778 reg = <0 1>;
779 #sound-dai-cells = <0>;
780 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
781 sound-name-prefix = "SpkrRight";
782 vdd-1p8-supply = <&vreg_l15b_1p8>;
783 vdd-io-supply = <&vreg_l12b_1p2>;
784 qcom,port-mapping = <4 5 6 7 11 13>;
785 };
786 };
787
788 &swr1 {
789 status = "okay";
790
791 /* WCD9385 RX */
792 wcd_rx: codec@0,4 {
793 compatible = "sdw20217010d00";
794 reg = <0 4>;
795 qcom,rx-port-mapping = <1 2 3 4 5>;
796 };
797 };
798
799 &swr2 {
800 status = "okay";
801
802 /* WCD9385 TX */
803 wcd_tx: codec@0,3 {
804 compatible = "sdw20217010d00";
805 reg = <0 3>;
806 qcom,tx-port-mapping = <2 2 3 4>;
807 };
808 };
809
810 &tlmm {
811 gpio-reserved-ranges = <33 3>, /* Unused */
812 <44 4>, /* SPI (TPM) */
813 <238 1>; /* UFS Reset */
814
815 edp_reg_en: edp-reg-en-state {
816 pins = "gpio70";
817 function = "gpio";
818 drive-strength = <16>;
819 bias-disable;
820 };
821
822 nvme_reg_en: nvme-reg-en-state {
823 pins = "gpio18";
824 function = "gpio";
825 drive-strength = <2>;
826 bias-disable;
827 };
828
829 pcie4_default: pcie4-default-state {
830 clkreq-n-pins {
831 pins = "gpio147";
832 function = "pcie4_clk";
833 drive-strength = <2>;
834 bias-pull-up;
835 };
836
837 perst-n-pins {
838 pins = "gpio146";
839 function = "gpio";
840 drive-strength = <2>;
841 bias-disable;
842 };
843
844 wake-n-pins {
845 pins = "gpio148";
846 function = "gpio";
847 drive-strength = <2>;
848 bias-pull-up;
849 };
850 };
851
852 pcie6a_default: pcie6a-default-state {
853 clkreq-n-pins {
854 pins = "gpio153";
855 function = "pcie6a_clk";
856 drive-strength = <2>;
857 bias-pull-up;
858 };
859
860 perst-n-pins {
861 pins = "gpio152";
862 function = "gpio";
863 drive-strength = <2>;
864 bias-disable;
865 };
866
867 wake-n-pins {
868 pins = "gpio154";
869 function = "gpio";
870 drive-strength = <2>;
871 bias-pull-up;
872 };
873 };
874
875 wcd_default: wcd-reset-n-active-state {
876 pins = "gpio191";
877 function = "gpio";
878 drive-strength = <16>;
879 bias-disable;
880 output-low;
881 };
882 };
883
884 &uart21 {
885 compatible = "qcom,geni-debug-uart";
886 status = "okay";
887 };
888
889 &usb_1_ss0_hsphy {
890 vdd-supply = <&vreg_l3j_0p8>;
891 vdda12-supply = <&vreg_l2j_1p2>;
892
893 phys = <&smb2360_0_eusb2_repeater>;
894
895 status = "okay";
896 };
897
898 &usb_1_ss0_qmpphy {
899 vdda-phy-supply = <&vreg_l3e_1p2>;
900 vdda-pll-supply = <&vreg_l1j_0p8>;
901
902 status = "okay";
903 };
904
905 &usb_1_ss0 {
906 status = "okay";
907 };
908
909 &usb_1_ss0_dwc3 {
910 dr_mode = "host";
911 };
912
913 &usb_1_ss0_dwc3_hs {
914 remote-endpoint = <&pmic_glink_ss0_hs_in>;
915 };
916
917 &usb_1_ss0_qmpphy_out {
918 remote-endpoint = <&pmic_glink_ss0_ss_in>;
919 };
920
921 &usb_1_ss1_hsphy {
922 vdd-supply = <&vreg_l3j_0p8>;
923 vdda12-supply = <&vreg_l2j_1p2>;
924
925 phys = <&smb2360_1_eusb2_repeater>;
926
927 status = "okay";
928 };
929
930 &usb_1_ss1_qmpphy {
931 vdda-phy-supply = <&vreg_l3e_1p2>;
932 vdda-pll-supply = <&vreg_l2d_0p9>;
933
934 status = "okay";
935 };
936
937 &usb_1_ss1 {
938 status = "okay";
939 };
940
941 &usb_1_ss1_dwc3 {
942 dr_mode = "host";
943 };
944
945 &usb_1_ss1_dwc3_hs {
946 remote-endpoint = <&pmic_glink_ss1_hs_in>;
947 };
948
949 &usb_1_ss1_qmpphy_out {
950 remote-endpoint = <&pmic_glink_ss1_ss_in>;
951 };
952
953 &usb_1_ss2_hsphy {
954 vdd-supply = <&vreg_l3j_0p8>;
955 vdda12-supply = <&vreg_l2j_1p2>;
956
957 phys = <&smb2360_2_eusb2_repeater>;
958
959 status = "okay";
960 };
961
962 &usb_1_ss2_qmpphy {
963 vdda-phy-supply = <&vreg_l3e_1p2>;
964 vdda-pll-supply = <&vreg_l2d_0p9>;
965
966 status = "okay";
967 };
968
969 &usb_1_ss2 {
970 status = "okay";
971 };
972
973 &usb_1_ss2_dwc3 {
974 dr_mode = "host";
975 };
976
977 &usb_1_ss2_dwc3_hs {
978 remote-endpoint = <&pmic_glink_ss2_hs_in>;
979 };
980
981 &usb_1_ss2_qmpphy_out {
982 remote-endpoint = <&pmic_glink_ss2_ss_in>;
983 };
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