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Linux/scripts/dtc/include-prefixes/arm64/renesas/r8a779g2-white-hawk-single.dts

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  1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 /*
  3  * Device Tree Source for the R-Car V4H ES2.0 White Hawk Single board
  4  *
  5  * Copyright (C) 2023 Glider bv
  6  */
  7 
  8 /dts-v1/;
  9 #include "r8a779g2.dtsi"
 10 #include "white-hawk-cpu-common.dtsi"
 11 #include "white-hawk-common.dtsi"
 12 
 13 / {
 14         model = "Renesas White Hawk Single board based on r8a779g2";
 15         compatible = "renesas,white-hawk-single", "renesas,r8a779g2",
 16                      "renesas,r8a779g0";
 17 };
 18 
 19 &hscif0 {
 20         uart-has-rtscts;
 21 };
 22 
 23 &hscif0_pins {
 24         groups = "hscif0_data", "hscif0_ctrl";
 25         function = "hscif0";
 26 };
 27 
 28 &pfc {
 29         tsn0_pins: tsn0 {
 30                 mux {
 31                         groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii",
 32                                  "tsn0_txcrefclk";
 33                         function = "tsn0";
 34                 };
 35 
 36                 link {
 37                         groups = "tsn0_link";
 38                         bias-disable;
 39                 };
 40 
 41                 mdio {
 42                         groups = "tsn0_mdio";
 43                         drive-strength = <24>;
 44                         bias-disable;
 45                 };
 46 
 47                 rgmii {
 48                         groups = "tsn0_rgmii";
 49                         drive-strength = <24>;
 50                         bias-disable;
 51                 };
 52         };
 53 };
 54 
 55 &tsn0 {
 56         pinctrl-0 = <&tsn0_pins>;
 57         pinctrl-names = "default";
 58         phy-mode = "rgmii";
 59         phy-handle = <&phy3>;
 60         status = "okay";
 61 
 62         mdio {
 63                 #address-cells = <1>;
 64                 #size-cells = <0>;
 65 
 66                 reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
 67                 reset-post-delay-us = <4000>;
 68 
 69                 phy3: ethernet-phy@0 {
 70                         compatible = "ethernet-phy-id002b.0980",
 71                                      "ethernet-phy-ieee802.3-c22";
 72                         reg = <0>;
 73                         interrupt-parent = <&gpio4>;
 74                         interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 75                 };
 76         };
 77 };

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