1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /*
3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/renesas,r8a779h0-sysc.h>
11
12 / {
13 compatible = "renesas,r8a779h0";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 /* External Audio clock - to be overridden by boards that provide it */
18 audio_clkin: audio_clkin {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
22 };
23
24 /* External CAN clock - to be overridden by boards that provide it */
25 can_clk: can-clk {
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
29 };
30
31 cluster0_opp: opp-table-0 {
32 compatible = "operating-points-v2";
33
34 opp-500000000 {
35 opp-hz = /bits/ 64 <500000000>;
36 opp-microvolt = <825000>;
37 clock-latency-ns = <500000>;
38 };
39 opp-1000000000 {
40 opp-hz = /bits/ 64 <1000000000>;
41 opp-microvolt = <825000>;
42 clock-latency-ns = <500000>;
43 };
44 };
45
46 cpus {
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 cpu-map {
51 cluster0 {
52 core0 {
53 cpu = <&a76_0>;
54 };
55 core1 {
56 cpu = <&a76_1>;
57 };
58 core2 {
59 cpu = <&a76_2>;
60 };
61 core3 {
62 cpu = <&a76_3>;
63 };
64 };
65 };
66
67 a76_0: cpu@0 {
68 compatible = "arm,cortex-a76";
69 reg = <0>;
70 device_type = "cpu";
71 power-domains = <&sysc R8A779H0_PD_A1E0D0C0>;
72 next-level-cache = <&L3_CA76>;
73 enable-method = "psci";
74 cpu-idle-states = <&CPU_SLEEP_0>;
75 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>;
76 operating-points-v2 = <&cluster0_opp>;
77 };
78
79 a76_1: cpu@100 {
80 compatible = "arm,cortex-a76";
81 reg = <0x100>;
82 device_type = "cpu";
83 power-domains = <&sysc R8A779H0_PD_A1E0D0C1>;
84 next-level-cache = <&L3_CA76>;
85 enable-method = "psci";
86 cpu-idle-states = <&CPU_SLEEP_0>;
87 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>;
88 operating-points-v2 = <&cluster0_opp>;
89 };
90
91 a76_2: cpu@200 {
92 compatible = "arm,cortex-a76";
93 reg = <0x200>;
94 device_type = "cpu";
95 power-domains = <&sysc R8A779H0_PD_A1E0D0C2>;
96 next-level-cache = <&L3_CA76>;
97 enable-method = "psci";
98 cpu-idle-states = <&CPU_SLEEP_0>;
99 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>;
100 operating-points-v2 = <&cluster0_opp>;
101 };
102
103 a76_3: cpu@300 {
104 compatible = "arm,cortex-a76";
105 reg = <0x300>;
106 device_type = "cpu";
107 power-domains = <&sysc R8A779H0_PD_A1E0D0C3>;
108 next-level-cache = <&L3_CA76>;
109 enable-method = "psci";
110 cpu-idle-states = <&CPU_SLEEP_0>;
111 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>;
112 operating-points-v2 = <&cluster0_opp>;
113 };
114
115 idle-states {
116 entry-method = "psci";
117
118 CPU_SLEEP_0: cpu-sleep-0 {
119 compatible = "arm,idle-state";
120 arm,psci-suspend-param = <0x0010000>;
121 local-timer-stop;
122 entry-latency-us = <400>;
123 exit-latency-us = <500>;
124 min-residency-us = <4000>;
125 };
126 };
127
128 L3_CA76: cache-controller {
129 compatible = "cache";
130 power-domains = <&sysc R8A779H0_PD_A2E0D0>;
131 cache-unified;
132 cache-level = <3>;
133 };
134 };
135
136 extal_clk: extal-clk {
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 /* This value must be overridden by the board */
140 clock-frequency = <0>;
141 };
142
143 extalr_clk: extalr-clk {
144 compatible = "fixed-clock";
145 #clock-cells = <0>;
146 /* This value must be overridden by the board */
147 clock-frequency = <0>;
148 };
149
150 pmu-a76 {
151 compatible = "arm,cortex-a76-pmu";
152 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
153 };
154
155 psci {
156 compatible = "arm,psci-1.0", "arm,psci-0.2";
157 method = "smc";
158 };
159
160 /* External SCIF clocks - to be overridden by boards that provide them */
161 scif_clk: scif-clk {
162 compatible = "fixed-clock";
163 #clock-cells = <0>;
164 clock-frequency = <0>;
165 };
166
167 scif_clk2: scif-clk2 {
168 compatible = "fixed-clock";
169 #clock-cells = <0>;
170 clock-frequency = <0>;
171 };
172
173 soc: soc {
174 compatible = "simple-bus";
175 interrupt-parent = <&gic>;
176 #address-cells = <2>;
177 #size-cells = <2>;
178 ranges;
179
180 rwdt: watchdog@e6020000 {
181 compatible = "renesas,r8a779h0-wdt",
182 "renesas,rcar-gen4-wdt";
183 reg = <0 0xe6020000 0 0x0c>;
184 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
185 clocks = <&cpg CPG_MOD 907>;
186 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
187 resets = <&cpg 907>;
188 status = "disabled";
189 };
190
191 pfc: pinctrl@e6050000 {
192 compatible = "renesas,pfc-r8a779h0";
193 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
194 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
195 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
196 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>;
197 };
198
199 gpio0: gpio@e6050180 {
200 compatible = "renesas,gpio-r8a779h0",
201 "renesas,rcar-gen4-gpio";
202 reg = <0 0xe6050180 0 0x54>;
203 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 0 19>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
209 clocks = <&cpg CPG_MOD 915>;
210 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
211 resets = <&cpg 915>;
212 };
213
214 gpio1: gpio@e6050980 {
215 compatible = "renesas,gpio-r8a779h0",
216 "renesas,rcar-gen4-gpio";
217 reg = <0 0xe6050980 0 0x54>;
218 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
219 #gpio-cells = <2>;
220 gpio-controller;
221 gpio-ranges = <&pfc 0 32 30>;
222 #interrupt-cells = <2>;
223 interrupt-controller;
224 clocks = <&cpg CPG_MOD 915>;
225 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
226 resets = <&cpg 915>;
227 };
228
229 gpio2: gpio@e6058180 {
230 compatible = "renesas,gpio-r8a779h0",
231 "renesas,rcar-gen4-gpio";
232 reg = <0 0xe6058180 0 0x54>;
233 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 gpio-ranges = <&pfc 0 64 20>;
237 #interrupt-cells = <2>;
238 interrupt-controller;
239 clocks = <&cpg CPG_MOD 916>;
240 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
241 resets = <&cpg 916>;
242 };
243
244 gpio3: gpio@e6058980 {
245 compatible = "renesas,gpio-r8a779h0",
246 "renesas,rcar-gen4-gpio";
247 reg = <0 0xe6058980 0 0x54>;
248 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
249 #gpio-cells = <2>;
250 gpio-controller;
251 gpio-ranges = <&pfc 0 96 32>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&cpg CPG_MOD 916>;
255 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
256 resets = <&cpg 916>;
257 };
258
259 gpio4: gpio@e6060180 {
260 compatible = "renesas,gpio-r8a779h0",
261 "renesas,rcar-gen4-gpio";
262 reg = <0 0xe6060180 0 0x54>;
263 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
264 #gpio-cells = <2>;
265 gpio-controller;
266 gpio-ranges = <&pfc 0 128 25>;
267 #interrupt-cells = <2>;
268 interrupt-controller;
269 clocks = <&cpg CPG_MOD 917>;
270 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
271 resets = <&cpg 917>;
272 };
273
274 gpio5: gpio@e6060980 {
275 compatible = "renesas,gpio-r8a779h0",
276 "renesas,rcar-gen4-gpio";
277 reg = <0 0xe6060980 0 0x54>;
278 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
279 #gpio-cells = <2>;
280 gpio-controller;
281 gpio-ranges = <&pfc 0 160 21>;
282 #interrupt-cells = <2>;
283 interrupt-controller;
284 clocks = <&cpg CPG_MOD 917>;
285 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
286 resets = <&cpg 917>;
287 };
288
289 gpio6: gpio@e6061180 {
290 compatible = "renesas,gpio-r8a779h0",
291 "renesas,rcar-gen4-gpio";
292 reg = <0 0xe6061180 0 0x54>;
293 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
294 #gpio-cells = <2>;
295 gpio-controller;
296 gpio-ranges = <&pfc 0 192 21>;
297 #interrupt-cells = <2>;
298 interrupt-controller;
299 clocks = <&cpg CPG_MOD 917>;
300 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
301 resets = <&cpg 917>;
302 };
303
304 gpio7: gpio@e6061980 {
305 compatible = "renesas,gpio-r8a779h0",
306 "renesas,rcar-gen4-gpio";
307 reg = <0 0xe6061980 0 0x54>;
308 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
309 #gpio-cells = <2>;
310 gpio-controller;
311 gpio-ranges = <&pfc 0 224 21>;
312 #interrupt-cells = <2>;
313 interrupt-controller;
314 clocks = <&cpg CPG_MOD 917>;
315 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
316 resets = <&cpg 917>;
317 };
318
319 cmt0: timer@e60f0000 {
320 compatible = "renesas,r8a779h0-cmt0",
321 "renesas,rcar-gen4-cmt0";
322 reg = <0 0xe60f0000 0 0x1004>;
323 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
325 clocks = <&cpg CPG_MOD 910>;
326 clock-names = "fck";
327 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
328 resets = <&cpg 910>;
329 status = "disabled";
330 };
331
332 cmt1: timer@e6130000 {
333 compatible = "renesas,r8a779h0-cmt1",
334 "renesas,rcar-gen4-cmt1";
335 reg = <0 0xe6130000 0 0x1004>;
336 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
337 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
340 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
341 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&cpg CPG_MOD 911>;
345 clock-names = "fck";
346 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
347 resets = <&cpg 911>;
348 status = "disabled";
349 };
350
351 cmt2: timer@e6140000 {
352 compatible = "renesas,r8a779h0-cmt1",
353 "renesas,rcar-gen4-cmt1";
354 reg = <0 0xe6140000 0 0x1004>;
355 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&cpg CPG_MOD 912>;
364 clock-names = "fck";
365 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
366 resets = <&cpg 912>;
367 status = "disabled";
368 };
369
370 cmt3: timer@e6148000 {
371 compatible = "renesas,r8a779h0-cmt1",
372 "renesas,rcar-gen4-cmt1";
373 reg = <0 0xe6148000 0 0x1004>;
374 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
375 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
377 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
378 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
382 clocks = <&cpg CPG_MOD 913>;
383 clock-names = "fck";
384 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
385 resets = <&cpg 913>;
386 status = "disabled";
387 };
388
389 cpg: clock-controller@e6150000 {
390 compatible = "renesas,r8a779h0-cpg-mssr";
391 reg = <0 0xe6150000 0 0x4000>;
392 clocks = <&extal_clk>, <&extalr_clk>;
393 clock-names = "extal", "extalr";
394 #clock-cells = <2>;
395 #power-domain-cells = <0>;
396 #reset-cells = <1>;
397 };
398
399 rst: reset-controller@e6160000 {
400 compatible = "renesas,r8a779h0-rst";
401 reg = <0 0xe6160000 0 0x4000>;
402 };
403
404 sysc: system-controller@e6180000 {
405 compatible = "renesas,r8a779h0-sysc";
406 reg = <0 0xe6180000 0 0x4000>;
407 #power-domain-cells = <1>;
408 };
409
410 tsc: thermal@e6198000 {
411 compatible = "renesas,r8a779h0-thermal";
412 reg = <0 0xe6198000 0 0x200>,
413 <0 0xe61a0000 0 0x200>;
414 clocks = <&cpg CPG_MOD 919>;
415 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
416 resets = <&cpg 919>;
417 #thermal-sensor-cells = <1>;
418 };
419
420 intc_ex: interrupt-controller@e61c0000 {
421 compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc";
422 #interrupt-cells = <2>;
423 interrupt-controller;
424 reg = <0 0xe61c0000 0 0x200>;
425 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
426 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
427 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
428 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
429 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
430 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
431 clocks = <&cpg CPG_MOD 611>;
432 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
433 resets = <&cpg 611>;
434 };
435
436 tmu0: timer@e61e0000 {
437 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
438 reg = <0 0xe61e0000 0 0x30>;
439 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
441 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
442 interrupt-names = "tuni0", "tuni1", "tuni2";
443 clocks = <&cpg CPG_MOD 713>;
444 clock-names = "fck";
445 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
446 resets = <&cpg 713>;
447 status = "disabled";
448 };
449
450 tmu1: timer@e6fc0000 {
451 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
452 reg = <0 0xe6fc0000 0 0x30>;
453 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>;
457 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
458 clocks = <&cpg CPG_MOD 714>;
459 clock-names = "fck";
460 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
461 resets = <&cpg 714>;
462 status = "disabled";
463 };
464
465 tmu2: timer@e6fd0000 {
466 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
467 reg = <0 0xe6fd0000 0 0x30>;
468 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
469 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
470 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
471 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
472 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
473 clocks = <&cpg CPG_MOD 715>;
474 clock-names = "fck";
475 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
476 resets = <&cpg 715>;
477 status = "disabled";
478 };
479
480 tmu3: timer@e6fe0000 {
481 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
482 reg = <0 0xe6fe0000 0 0x30>;
483 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
484 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
487 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
488 clocks = <&cpg CPG_MOD 716>;
489 clock-names = "fck";
490 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
491 resets = <&cpg 716>;
492 status = "disabled";
493 };
494
495 tmu4: timer@ffc00000 {
496 compatible = "renesas,tmu-r8a779h0", "renesas,tmu";
497 reg = <0 0xffc00000 0 0x30>;
498 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
499 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
501 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
502 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
503 clocks = <&cpg CPG_MOD 717>;
504 clock-names = "fck";
505 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
506 resets = <&cpg 717>;
507 status = "disabled";
508 };
509
510 i2c0: i2c@e6500000 {
511 compatible = "renesas,i2c-r8a779h0",
512 "renesas,rcar-gen4-i2c";
513 reg = <0 0xe6500000 0 0x40>;
514 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&cpg CPG_MOD 518>;
516 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
517 resets = <&cpg 518>;
518 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
519 <&dmac2 0x91>, <&dmac2 0x90>;
520 dma-names = "tx", "rx", "tx", "rx";
521 i2c-scl-internal-delay-ns = <110>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524 status = "disabled";
525 };
526
527 i2c1: i2c@e6508000 {
528 compatible = "renesas,i2c-r8a779h0",
529 "renesas,rcar-gen4-i2c";
530 reg = <0 0xe6508000 0 0x40>;
531 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>;
532 clocks = <&cpg CPG_MOD 519>;
533 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
534 resets = <&cpg 519>;
535 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
536 <&dmac2 0x93>, <&dmac2 0x92>;
537 dma-names = "tx", "rx", "tx", "rx";
538 i2c-scl-internal-delay-ns = <110>;
539 #address-cells = <1>;
540 #size-cells = <0>;
541 status = "disabled";
542 };
543
544 i2c2: i2c@e6510000 {
545 compatible = "renesas,i2c-r8a779h0",
546 "renesas,rcar-gen4-i2c";
547 reg = <0 0xe6510000 0 0x40>;
548 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>;
549 clocks = <&cpg CPG_MOD 520>;
550 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
551 resets = <&cpg 520>;
552 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
553 <&dmac2 0x95>, <&dmac2 0x94>;
554 dma-names = "tx", "rx", "tx", "rx";
555 i2c-scl-internal-delay-ns = <110>;
556 #address-cells = <1>;
557 #size-cells = <0>;
558 status = "disabled";
559 };
560
561 i2c3: i2c@e66d0000 {
562 compatible = "renesas,i2c-r8a779h0",
563 "renesas,rcar-gen4-i2c";
564 reg = <0 0xe66d0000 0 0x40>;
565 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&cpg CPG_MOD 521>;
567 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
568 resets = <&cpg 521>;
569 dmas = <&dmac1 0x97>, <&dmac1 0x96>,
570 <&dmac2 0x97>, <&dmac2 0x96>;
571 dma-names = "tx", "rx", "tx", "rx";
572 i2c-scl-internal-delay-ns = <110>;
573 #address-cells = <1>;
574 #size-cells = <0>;
575 status = "disabled";
576 };
577
578 hscif0: serial@e6540000 {
579 compatible = "renesas,hscif-r8a779h0",
580 "renesas,rcar-gen4-hscif", "renesas,hscif";
581 reg = <0 0xe6540000 0 0x60>;
582 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&cpg CPG_MOD 514>,
584 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
585 <&scif_clk>;
586 clock-names = "fck", "brg_int", "scif_clk";
587 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
588 resets = <&cpg 514>;
589 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
590 <&dmac2 0x31>, <&dmac2 0x30>;
591 dma-names = "tx", "rx", "tx", "rx";
592 status = "disabled";
593 };
594
595 hscif1: serial@e6550000 {
596 compatible = "renesas,hscif-r8a779h0",
597 "renesas,rcar-gen4-hscif", "renesas,hscif";
598 reg = <0 0xe6550000 0 0x60>;
599 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
600 clocks = <&cpg CPG_MOD 515>,
601 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
602 <&scif_clk>;
603 clock-names = "fck", "brg_int", "scif_clk";
604 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
605 resets = <&cpg 515>;
606 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
607 <&dmac2 0x33>, <&dmac2 0x32>;
608 dma-names = "tx", "rx", "tx", "rx";
609 status = "disabled";
610 };
611
612 hscif2: serial@e6560000 {
613 compatible = "renesas,hscif-r8a779h0",
614 "renesas,rcar-gen4-hscif", "renesas,hscif";
615 reg = <0 0xe6560000 0 0x60>;
616 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
617 clocks = <&cpg CPG_MOD 516>,
618 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
619 <&scif_clk2>;
620 clock-names = "fck", "brg_int", "scif_clk";
621 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
622 resets = <&cpg 516>;
623 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
624 <&dmac2 0x35>, <&dmac2 0x34>;
625 dma-names = "tx", "rx", "tx", "rx";
626 status = "disabled";
627 };
628
629 hscif3: serial@e66a0000 {
630 compatible = "renesas,hscif-r8a779h0",
631 "renesas,rcar-gen4-hscif", "renesas,hscif";
632 reg = <0 0xe66a0000 0 0x60>;
633 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&cpg CPG_MOD 517>,
635 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
636 <&scif_clk>;
637 clock-names = "fck", "brg_int", "scif_clk";
638 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
639 resets = <&cpg 517>;
640 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
641 <&dmac2 0x37>, <&dmac2 0x36>;
642 dma-names = "tx", "rx", "tx", "rx";
643 status = "disabled";
644 };
645
646 canfd: can@e6660000 {
647 compatible = "renesas,r8a779h0-canfd",
648 "renesas,rcar-gen4-canfd";
649 reg = <0 0xe6660000 0 0x8500>;
650 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
651 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
652 interrupt-names = "ch_int", "g_int";
653 clocks = <&cpg CPG_MOD 328>,
654 <&cpg CPG_CORE R8A779H0_CLK_CANFD>,
655 <&can_clk>;
656 clock-names = "fck", "canfd", "can_clk";
657 assigned-clocks = <&cpg CPG_CORE R8A779H0_CLK_CANFD>;
658 assigned-clock-rates = <80000000>;
659 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
660 resets = <&cpg 328>;
661 status = "disabled";
662
663 channel0 {
664 status = "disabled";
665 };
666
667 channel1 {
668 status = "disabled";
669 };
670
671 channel2 {
672 status = "disabled";
673 };
674
675 channel3 {
676 status = "disabled";
677 };
678 };
679
680 avb0: ethernet@e6800000 {
681 compatible = "renesas,etheravb-r8a779h0",
682 "renesas,etheravb-rcar-gen4";
683 reg = <0 0xe6800000 0 0x1000>;
684 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
687 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
688 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
689 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
690 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
691 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
692 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
693 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
694 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
695 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
696 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
697 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
698 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
709 interrupt-names = "ch0", "ch1", "ch2", "ch3",
710 "ch4", "ch5", "ch6", "ch7",
711 "ch8", "ch9", "ch10", "ch11",
712 "ch12", "ch13", "ch14", "ch15",
713 "ch16", "ch17", "ch18", "ch19",
714 "ch20", "ch21", "ch22", "ch23",
715 "ch24";
716 clocks = <&cpg CPG_MOD 211>;
717 clock-names = "fck";
718 power-domains = <&sysc R8A779H0_PD_C4>;
719 resets = <&cpg 211>;
720 phy-mode = "rgmii";
721 rx-internal-delay-ps = <0>;
722 tx-internal-delay-ps = <0>;
723 iommus = <&ipmmu_hc 0>;
724 #address-cells = <1>;
725 #size-cells = <0>;
726 status = "disabled";
727 };
728
729 avb1: ethernet@e6810000 {
730 compatible = "renesas,etheravb-r8a779h0",
731 "renesas,etheravb-rcar-gen4";
732 reg = <0 0xe6810000 0 0x1000>;
733 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
734 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
735 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
736 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
737 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
738 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
739 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
740 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
741 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
742 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
743 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
744 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
745 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
746 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
747 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
748 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
749 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
750 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
751 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
752 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
753 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
754 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
755 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
756 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
757 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
758 interrupt-names = "ch0", "ch1", "ch2", "ch3",
759 "ch4", "ch5", "ch6", "ch7",
760 "ch8", "ch9", "ch10", "ch11",
761 "ch12", "ch13", "ch14", "ch15",
762 "ch16", "ch17", "ch18", "ch19",
763 "ch20", "ch21", "ch22", "ch23",
764 "ch24";
765 clocks = <&cpg CPG_MOD 212>;
766 clock-names = "fck";
767 power-domains = <&sysc R8A779H0_PD_C4>;
768 resets = <&cpg 212>;
769 phy-mode = "rgmii";
770 rx-internal-delay-ps = <0>;
771 tx-internal-delay-ps = <0>;
772 iommus = <&ipmmu_hc 1>;
773 #address-cells = <1>;
774 #size-cells = <0>;
775 status = "disabled";
776 };
777
778 avb2: ethernet@e6820000 {
779 compatible = "renesas,etheravb-r8a779h0",
780 "renesas,etheravb-rcar-gen4";
781 reg = <0 0xe6820000 0 0x1000>;
782 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
783 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
784 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
785 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
786 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
787 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
788 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
789 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
790 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
791 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
792 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
793 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
794 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
796 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
797 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
798 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
799 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
800 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
801 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
802 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
803 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
804 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
805 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
806 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
807 interrupt-names = "ch0", "ch1", "ch2", "ch3",
808 "ch4", "ch5", "ch6", "ch7",
809 "ch8", "ch9", "ch10", "ch11",
810 "ch12", "ch13", "ch14", "ch15",
811 "ch16", "ch17", "ch18", "ch19",
812 "ch20", "ch21", "ch22", "ch23",
813 "ch24";
814 clocks = <&cpg CPG_MOD 213>;
815 clock-names = "fck";
816 power-domains = <&sysc R8A779H0_PD_C4>;
817 resets = <&cpg 213>;
818 phy-mode = "rgmii";
819 rx-internal-delay-ps = <0>;
820 tx-internal-delay-ps = <0>;
821 iommus = <&ipmmu_hc 2>;
822 #address-cells = <1>;
823 #size-cells = <0>;
824 status = "disabled";
825 };
826
827 pwm0: pwm@e6e30000 {
828 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
829 reg = <0 0xe6e30000 0 0x10>;
830 #pwm-cells = <2>;
831 clocks = <&cpg CPG_MOD 628>;
832 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
833 resets = <&cpg 628>;
834 status = "disabled";
835 };
836
837 pwm1: pwm@e6e31000 {
838 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
839 reg = <0 0xe6e31000 0 0x10>;
840 #pwm-cells = <2>;
841 clocks = <&cpg CPG_MOD 628>;
842 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
843 resets = <&cpg 628>;
844 status = "disabled";
845 };
846
847 pwm2: pwm@e6e32000 {
848 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
849 reg = <0 0xe6e32000 0 0x10>;
850 #pwm-cells = <2>;
851 clocks = <&cpg CPG_MOD 628>;
852 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
853 resets = <&cpg 628>;
854 status = "disabled";
855 };
856
857 pwm3: pwm@e6e33000 {
858 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
859 reg = <0 0xe6e33000 0 0x10>;
860 #pwm-cells = <2>;
861 clocks = <&cpg CPG_MOD 628>;
862 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
863 resets = <&cpg 628>;
864 status = "disabled";
865 };
866
867 pwm4: pwm@e6e34000 {
868 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar";
869 reg = <0 0xe6e34000 0 0x10>;
870 #pwm-cells = <2>;
871 clocks = <&cpg CPG_MOD 628>;
872 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
873 resets = <&cpg 628>;
874 status = "disabled";
875 };
876
877 scif0: serial@e6e60000 {
878 compatible = "renesas,scif-r8a779h0",
879 "renesas,rcar-gen4-scif", "renesas,scif";
880 reg = <0 0xe6e60000 0 64>;
881 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
882 clocks = <&cpg CPG_MOD 702>,
883 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
884 <&scif_clk>;
885 clock-names = "fck", "brg_int", "scif_clk";
886 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
887 resets = <&cpg 702>;
888 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
889 <&dmac2 0x51>, <&dmac2 0x50>;
890 dma-names = "tx", "rx", "tx", "rx";
891 status = "disabled";
892 };
893
894 scif1: serial@e6e68000 {
895 compatible = "renesas,scif-r8a779h0",
896 "renesas,rcar-gen4-scif", "renesas,scif";
897 reg = <0 0xe6e68000 0 64>;
898 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
899 clocks = <&cpg CPG_MOD 703>,
900 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
901 <&scif_clk>;
902 clock-names = "fck", "brg_int", "scif_clk";
903 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
904 resets = <&cpg 703>;
905 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
906 <&dmac2 0x53>, <&dmac2 0x52>;
907 dma-names = "tx", "rx", "tx", "rx";
908 status = "disabled";
909 };
910
911 scif3: serial@e6c50000 {
912 compatible = "renesas,scif-r8a779h0",
913 "renesas,rcar-gen4-scif", "renesas,scif";
914 reg = <0 0xe6c50000 0 64>;
915 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&cpg CPG_MOD 704>,
917 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
918 <&scif_clk>;
919 clock-names = "fck", "brg_int", "scif_clk";
920 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
921 resets = <&cpg 704>;
922 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
923 <&dmac2 0x57>, <&dmac2 0x56>;
924 dma-names = "tx", "rx", "tx", "rx";
925 status = "disabled";
926 };
927
928 scif4: serial@e6c40000 {
929 compatible = "renesas,scif-r8a779h0",
930 "renesas,rcar-gen4-scif", "renesas,scif";
931 reg = <0 0xe6c40000 0 64>;
932 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&cpg CPG_MOD 705>,
934 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>,
935 <&scif_clk2>;
936 clock-names = "fck", "brg_int", "scif_clk";
937 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
938 resets = <&cpg 705>;
939 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
940 <&dmac2 0x59>, <&dmac2 0x58>;
941 dma-names = "tx", "rx", "tx", "rx";
942 status = "disabled";
943 };
944
945 msiof0: spi@e6e90000 {
946 compatible = "renesas,msiof-r8a779h0",
947 "renesas,rcar-gen4-msiof";
948 reg = <0 0xe6e90000 0 0x0064>;
949 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
950 clocks = <&cpg CPG_MOD 618>;
951 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
952 <&dmac2 0x41>, <&dmac2 0x40>;
953 dma-names = "tx", "rx", "tx", "rx";
954 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
955 resets = <&cpg 618>;
956 #address-cells = <1>;
957 #size-cells = <0>;
958 status = "disabled";
959 };
960
961 msiof1: spi@e6ea0000 {
962 compatible = "renesas,msiof-r8a779h0",
963 "renesas,rcar-gen4-msiof";
964 reg = <0 0xe6ea0000 0 0x0064>;
965 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
966 clocks = <&cpg CPG_MOD 619>;
967 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
968 <&dmac2 0x43>, <&dmac2 0x42>;
969 dma-names = "tx", "rx", "tx", "rx";
970 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
971 resets = <&cpg 619>;
972 #address-cells = <1>;
973 #size-cells = <0>;
974 status = "disabled";
975 };
976
977 msiof2: spi@e6c00000 {
978 compatible = "renesas,msiof-r8a779h0",
979 "renesas,rcar-gen4-msiof";
980 reg = <0 0xe6c00000 0 0x0064>;
981 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
982 clocks = <&cpg CPG_MOD 620>;
983 dmas = <&dmac1 0x45>, <&dmac1 0x44>,
984 <&dmac2 0x45>, <&dmac2 0x44>;
985 dma-names = "tx", "rx", "tx", "rx";
986 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
987 resets = <&cpg 620>;
988 #address-cells = <1>;
989 #size-cells = <0>;
990 status = "disabled";
991 };
992
993 msiof3: spi@e6c10000 {
994 compatible = "renesas,msiof-r8a779h0",
995 "renesas,rcar-gen4-msiof";
996 reg = <0 0xe6c10000 0 0x0064>;
997 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
998 clocks = <&cpg CPG_MOD 621>;
999 dmas = <&dmac1 0x47>, <&dmac1 0x46>,
1000 <&dmac2 0x47>, <&dmac2 0x46>;
1001 dma-names = "tx", "rx", "tx", "rx";
1002 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1003 resets = <&cpg 621>;
1004 #address-cells = <1>;
1005 #size-cells = <0>;
1006 status = "disabled";
1007 };
1008
1009 msiof4: spi@e6c20000 {
1010 compatible = "renesas,msiof-r8a779h0",
1011 "renesas,rcar-gen4-msiof";
1012 reg = <0 0xe6c20000 0 0x0064>;
1013 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 622>;
1015 dmas = <&dmac1 0x49>, <&dmac1 0x48>,
1016 <&dmac2 0x49>, <&dmac2 0x48>;
1017 dma-names = "tx", "rx", "tx", "rx";
1018 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1019 resets = <&cpg 622>;
1020 #address-cells = <1>;
1021 #size-cells = <0>;
1022 status = "disabled";
1023 };
1024
1025 msiof5: spi@e6c28000 {
1026 compatible = "renesas,msiof-r8a779h0",
1027 "renesas,rcar-gen4-msiof";
1028 reg = <0 0xe6c28000 0 0x0064>;
1029 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
1030 clocks = <&cpg CPG_MOD 623>;
1031 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>,
1032 <&dmac2 0x4b>, <&dmac2 0x4a>;
1033 dma-names = "tx", "rx", "tx", "rx";
1034 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1035 resets = <&cpg 623>;
1036 #address-cells = <1>;
1037 #size-cells = <0>;
1038 status = "disabled";
1039 };
1040
1041 vin00: video@e6ef0000 {
1042 compatible = "renesas,vin-r8a779h0",
1043 "renesas,rcar-gen4-vin";
1044 reg = <0 0xe6ef0000 0 0x1000>;
1045 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
1046 clocks = <&cpg CPG_MOD 730>;
1047 power-domains = <&sysc R8A779H0_PD_C4>;
1048 resets = <&cpg 730>;
1049 renesas,id = <0>;
1050 status = "disabled";
1051
1052 ports {
1053 #address-cells = <1>;
1054 #size-cells = <0>;
1055
1056 port@2 {
1057 #address-cells = <1>;
1058 #size-cells = <0>;
1059
1060 reg = <2>;
1061
1062 vin00isp0: endpoint@0 {
1063 reg = <0>;
1064 remote-endpoint = <&isp0vin00>;
1065 };
1066 };
1067 };
1068 };
1069
1070 vin01: video@e6ef1000 {
1071 compatible = "renesas,vin-r8a779h0",
1072 "renesas,rcar-gen4-vin";
1073 reg = <0 0xe6ef1000 0 0x1000>;
1074 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
1075 clocks = <&cpg CPG_MOD 731>;
1076 power-domains = <&sysc R8A779H0_PD_C4>;
1077 resets = <&cpg 731>;
1078 renesas,id = <1>;
1079 status = "disabled";
1080
1081 ports {
1082 #address-cells = <1>;
1083 #size-cells = <0>;
1084
1085 port@2 {
1086 #address-cells = <1>;
1087 #size-cells = <0>;
1088
1089 reg = <2>;
1090
1091 vin01isp0: endpoint@0 {
1092 reg = <0>;
1093 remote-endpoint = <&isp0vin01>;
1094 };
1095 };
1096 };
1097 };
1098
1099 vin02: video@e6ef2000 {
1100 compatible = "renesas,vin-r8a779h0",
1101 "renesas,rcar-gen4-vin";
1102 reg = <0 0xe6ef2000 0 0x1000>;
1103 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
1104 clocks = <&cpg CPG_MOD 800>;
1105 power-domains = <&sysc R8A779H0_PD_C4>;
1106 resets = <&cpg 800>;
1107 renesas,id = <2>;
1108 status = "disabled";
1109
1110 ports {
1111 #address-cells = <1>;
1112 #size-cells = <0>;
1113
1114 port@2 {
1115 #address-cells = <1>;
1116 #size-cells = <0>;
1117
1118 reg = <2>;
1119
1120 vin02isp0: endpoint@0 {
1121 reg = <0>;
1122 remote-endpoint = <&isp0vin02>;
1123 };
1124 };
1125 };
1126 };
1127
1128 vin03: video@e6ef3000 {
1129 compatible = "renesas,vin-r8a779h0",
1130 "renesas,rcar-gen4-vin";
1131 reg = <0 0xe6ef3000 0 0x1000>;
1132 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
1133 clocks = <&cpg CPG_MOD 801>;
1134 power-domains = <&sysc R8A779H0_PD_C4>;
1135 resets = <&cpg 801>;
1136 renesas,id = <3>;
1137 status = "disabled";
1138
1139 ports {
1140 #address-cells = <1>;
1141 #size-cells = <0>;
1142
1143 port@2 {
1144 #address-cells = <1>;
1145 #size-cells = <0>;
1146
1147 reg = <2>;
1148
1149 vin03isp0: endpoint@0 {
1150 reg = <0>;
1151 remote-endpoint = <&isp0vin03>;
1152 };
1153 };
1154 };
1155 };
1156
1157 vin04: video@e6ef4000 {
1158 compatible = "renesas,vin-r8a779h0",
1159 "renesas,rcar-gen4-vin";
1160 reg = <0 0xe6ef4000 0 0x1000>;
1161 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
1162 clocks = <&cpg CPG_MOD 802>;
1163 power-domains = <&sysc R8A779H0_PD_C4>;
1164 resets = <&cpg 802>;
1165 renesas,id = <4>;
1166 status = "disabled";
1167
1168 ports {
1169 #address-cells = <1>;
1170 #size-cells = <0>;
1171
1172 port@2 {
1173 #address-cells = <1>;
1174 #size-cells = <0>;
1175
1176 reg = <2>;
1177
1178 vin04isp0: endpoint@0 {
1179 reg = <0>;
1180 remote-endpoint = <&isp0vin04>;
1181 };
1182 };
1183 };
1184 };
1185
1186 vin05: video@e6ef5000 {
1187 compatible = "renesas,vin-r8a779h0",
1188 "renesas,rcar-gen4-vin";
1189 reg = <0 0xe6ef5000 0 0x1000>;
1190 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
1191 clocks = <&cpg CPG_MOD 803>;
1192 power-domains = <&sysc R8A779H0_PD_C4>;
1193 resets = <&cpg 803>;
1194 renesas,id = <5>;
1195 status = "disabled";
1196
1197 ports {
1198 #address-cells = <1>;
1199 #size-cells = <0>;
1200
1201 port@2 {
1202 #address-cells = <1>;
1203 #size-cells = <0>;
1204
1205 reg = <2>;
1206
1207 vin05isp0: endpoint@0 {
1208 reg = <0>;
1209 remote-endpoint = <&isp0vin05>;
1210 };
1211 };
1212 };
1213 };
1214
1215 vin06: video@e6ef6000 {
1216 compatible = "renesas,vin-r8a779h0",
1217 "renesas,rcar-gen4-vin";
1218 reg = <0 0xe6ef6000 0 0x1000>;
1219 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
1220 clocks = <&cpg CPG_MOD 804>;
1221 power-domains = <&sysc R8A779H0_PD_C4>;
1222 resets = <&cpg 804>;
1223 renesas,id = <6>;
1224 status = "disabled";
1225
1226 ports {
1227 #address-cells = <1>;
1228 #size-cells = <0>;
1229
1230 port@2 {
1231 #address-cells = <1>;
1232 #size-cells = <0>;
1233
1234 reg = <2>;
1235
1236 vin06isp0: endpoint@0 {
1237 reg = <0>;
1238 remote-endpoint = <&isp0vin06>;
1239 };
1240 };
1241 };
1242 };
1243
1244 vin07: video@e6ef7000 {
1245 compatible = "renesas,vin-r8a779h0",
1246 "renesas,rcar-gen4-vin";
1247 reg = <0 0xe6ef7000 0 0x1000>;
1248 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
1249 clocks = <&cpg CPG_MOD 805>;
1250 power-domains = <&sysc R8A779H0_PD_C4>;
1251 resets = <&cpg 805>;
1252 renesas,id = <7>;
1253 status = "disabled";
1254
1255 ports {
1256 #address-cells = <1>;
1257 #size-cells = <0>;
1258
1259 port@2 {
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1262
1263 reg = <2>;
1264
1265 vin07isp0: endpoint@0 {
1266 reg = <0>;
1267 remote-endpoint = <&isp0vin07>;
1268 };
1269 };
1270 };
1271 };
1272
1273 vin08: video@e6ef8000 {
1274 compatible = "renesas,vin-r8a779h0",
1275 "renesas,rcar-gen4-vin";
1276 reg = <0 0xe6ef8000 0 0x1000>;
1277 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
1278 clocks = <&cpg CPG_MOD 806>;
1279 power-domains = <&sysc R8A779H0_PD_C4>;
1280 resets = <&cpg 806>;
1281 renesas,id = <8>;
1282 status = "disabled";
1283
1284 ports {
1285 #address-cells = <1>;
1286 #size-cells = <0>;
1287
1288 port@2 {
1289 #address-cells = <1>;
1290 #size-cells = <0>;
1291
1292 reg = <2>;
1293
1294 vin08isp1: endpoint@1 {
1295 reg = <1>;
1296 remote-endpoint = <&isp1vin08>;
1297 };
1298 };
1299 };
1300 };
1301
1302 vin09: video@e6ef9000 {
1303 compatible = "renesas,vin-r8a779h0",
1304 "renesas,rcar-gen4-vin";
1305 reg = <0 0xe6ef9000 0 0x1000>;
1306 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
1307 clocks = <&cpg CPG_MOD 807>;
1308 power-domains = <&sysc R8A779H0_PD_C4>;
1309 resets = <&cpg 807>;
1310 renesas,id = <9>;
1311 status = "disabled";
1312
1313 ports {
1314 #address-cells = <1>;
1315 #size-cells = <0>;
1316
1317 port@2 {
1318 #address-cells = <1>;
1319 #size-cells = <0>;
1320
1321 reg = <2>;
1322
1323 vin09isp1: endpoint@1 {
1324 reg = <1>;
1325 remote-endpoint = <&isp1vin09>;
1326 };
1327 };
1328 };
1329 };
1330
1331 vin10: video@e6efa000 {
1332 compatible = "renesas,vin-r8a779h0",
1333 "renesas,rcar-gen4-vin";
1334 reg = <0 0xe6efa000 0 0x1000>;
1335 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MOD 808>;
1337 power-domains = <&sysc R8A779H0_PD_C4>;
1338 resets = <&cpg 808>;
1339 renesas,id = <10>;
1340 status = "disabled";
1341
1342 ports {
1343 #address-cells = <1>;
1344 #size-cells = <0>;
1345
1346 port@2 {
1347 #address-cells = <1>;
1348 #size-cells = <0>;
1349
1350 reg = <2>;
1351
1352 vin10isp1: endpoint@1 {
1353 reg = <1>;
1354 remote-endpoint = <&isp1vin10>;
1355 };
1356 };
1357 };
1358 };
1359
1360 vin11: video@e6efb000 {
1361 compatible = "renesas,vin-r8a779h0",
1362 "renesas,rcar-gen4-vin";
1363 reg = <0 0xe6efb000 0 0x1000>;
1364 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
1365 clocks = <&cpg CPG_MOD 809>;
1366 power-domains = <&sysc R8A779H0_PD_C4>;
1367 resets = <&cpg 809>;
1368 renesas,id = <11>;
1369 status = "disabled";
1370
1371 ports {
1372 #address-cells = <1>;
1373 #size-cells = <0>;
1374
1375 port@2 {
1376 #address-cells = <1>;
1377 #size-cells = <0>;
1378
1379 reg = <2>;
1380
1381 vin11isp1: endpoint@1 {
1382 reg = <1>;
1383 remote-endpoint = <&isp1vin11>;
1384 };
1385 };
1386 };
1387 };
1388
1389 vin12: video@e6efc000 {
1390 compatible = "renesas,vin-r8a779h0",
1391 "renesas,rcar-gen4-vin";
1392 reg = <0 0xe6efc000 0 0x1000>;
1393 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
1394 clocks = <&cpg CPG_MOD 810>;
1395 power-domains = <&sysc R8A779H0_PD_C4>;
1396 resets = <&cpg 810>;
1397 renesas,id = <12>;
1398 status = "disabled";
1399
1400 ports {
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1403
1404 port@2 {
1405 #address-cells = <1>;
1406 #size-cells = <0>;
1407
1408 reg = <2>;
1409
1410 vin12isp1: endpoint@1 {
1411 reg = <1>;
1412 remote-endpoint = <&isp1vin12>;
1413 };
1414 };
1415 };
1416 };
1417
1418 vin13: video@e6efd000 {
1419 compatible = "renesas,vin-r8a779h0",
1420 "renesas,rcar-gen4-vin";
1421 reg = <0 0xe6efd000 0 0x1000>;
1422 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
1423 clocks = <&cpg CPG_MOD 811>;
1424 power-domains = <&sysc R8A779H0_PD_C4>;
1425 resets = <&cpg 811>;
1426 renesas,id = <13>;
1427 status = "disabled";
1428
1429 ports {
1430 #address-cells = <1>;
1431 #size-cells = <0>;
1432
1433 port@2 {
1434 #address-cells = <1>;
1435 #size-cells = <0>;
1436
1437 reg = <2>;
1438
1439 vin13isp1: endpoint@1 {
1440 reg = <1>;
1441 remote-endpoint = <&isp1vin13>;
1442 };
1443 };
1444 };
1445 };
1446
1447 vin14: video@e6efe000 {
1448 compatible = "renesas,vin-r8a779h0",
1449 "renesas,rcar-gen4-vin";
1450 reg = <0 0xe6efe000 0 0x1000>;
1451 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
1452 clocks = <&cpg CPG_MOD 812>;
1453 power-domains = <&sysc R8A779H0_PD_C4>;
1454 resets = <&cpg 812>;
1455 renesas,id = <14>;
1456 status = "disabled";
1457
1458 ports {
1459 #address-cells = <1>;
1460 #size-cells = <0>;
1461
1462 port@2 {
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1465
1466 reg = <2>;
1467
1468 vin14isp1: endpoint@1 {
1469 reg = <1>;
1470 remote-endpoint = <&isp1vin14>;
1471 };
1472 };
1473 };
1474 };
1475
1476 vin15: video@e6eff000 {
1477 compatible = "renesas,vin-r8a779h0",
1478 "renesas,rcar-gen4-vin";
1479 reg = <0 0xe6eff000 0 0x1000>;
1480 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
1481 clocks = <&cpg CPG_MOD 813>;
1482 power-domains = <&sysc R8A779H0_PD_C4>;
1483 resets = <&cpg 813>;
1484 renesas,id = <15>;
1485 status = "disabled";
1486
1487 ports {
1488 #address-cells = <1>;
1489 #size-cells = <0>;
1490
1491 port@2 {
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1494
1495 reg = <2>;
1496
1497 vin15isp1: endpoint@1 {
1498 reg = <1>;
1499 remote-endpoint = <&isp1vin15>;
1500 };
1501 };
1502 };
1503 };
1504
1505 dmac1: dma-controller@e7350000 {
1506 compatible = "renesas,dmac-r8a779h0",
1507 "renesas,rcar-gen4-dmac";
1508 reg = <0 0xe7350000 0 0x1000>,
1509 <0 0xe7300000 0 0x10000>;
1510 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
1511 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1512 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
1513 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
1514 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
1515 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
1516 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
1517 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
1518 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
1519 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
1520 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
1521 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
1522 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
1523 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1524 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
1525 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
1526 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1527 interrupt-names = "error",
1528 "ch0", "ch1", "ch2", "ch3", "ch4",
1529 "ch5", "ch6", "ch7", "ch8", "ch9",
1530 "ch10", "ch11", "ch12", "ch13",
1531 "ch14", "ch15";
1532 clocks = <&cpg CPG_MOD 709>;
1533 clock-names = "fck";
1534 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1535 resets = <&cpg 709>;
1536 #dma-cells = <1>;
1537 dma-channels = <16>;
1538 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1539 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1540 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1541 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1542 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1543 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1544 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1545 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1546 };
1547
1548 dmac2: dma-controller@e7351000 {
1549 compatible = "renesas,dmac-r8a779h0",
1550 "renesas,rcar-gen4-dmac";
1551 reg = <0 0xe7351000 0 0x1000>,
1552 <0 0xe7310000 0 0x10000>;
1553 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
1554 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
1555 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
1556 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
1557 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
1558 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1559 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1560 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1561 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1562 interrupt-names = "error",
1563 "ch0", "ch1", "ch2", "ch3", "ch4",
1564 "ch5", "ch6", "ch7";
1565 clocks = <&cpg CPG_MOD 710>;
1566 clock-names = "fck";
1567 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1568 resets = <&cpg 710>;
1569 #dma-cells = <1>;
1570 dma-channels = <8>;
1571 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
1572 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
1573 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
1574 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>;
1575 };
1576
1577 rcar_sound: sound@ec400000 {
1578 compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4";
1579 reg = <0 0xec400000 0 0x40000>,
1580 <0 0xec540000 0 0x1000>,
1581 <0 0xec541000 0 0x050>,
1582 <0 0xec5a0000 0 0x020>;
1583 reg-names = "sdmc", "ssiu", "ssi", "adg";
1584 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>;
1585 clock-names = "ssiu.0", "ssi.0", "clkin";
1586 /* #clock-cells is fixed */
1587 #clock-cells = <0>;
1588 /* #sound-dai-cells is fixed */
1589 #sound-dai-cells = <0>;
1590
1591 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1592 resets = <&cpg 2926>, <&cpg 2927>;
1593 reset-names = "ssiu.0", "ssi.0";
1594 status = "disabled";
1595
1596 rcar_sound,ssiu {
1597 ssiu00: ssiu-0 {
1598 dmas = <&dmac1 0x6e>, <&dmac1 0x6f>;
1599 dma-names = "tx", "rx";
1600 };
1601 ssiu01: ssiu-1 {
1602 dmas = <&dmac1 0x6c>, <&dmac1 0x6d>;
1603 dma-names = "tx", "rx";
1604 };
1605 ssiu02: ssiu-2 {
1606 dmas = <&dmac1 0x6a>, <&dmac1 0x6b>;
1607 dma-names = "tx", "rx";
1608 };
1609 ssiu03: ssiu-3 {
1610 dmas = <&dmac1 0x68>, <&dmac1 0x69>;
1611 dma-names = "tx", "rx";
1612 };
1613 ssiu04: ssiu-4 {
1614 dmas = <&dmac1 0x66>, <&dmac1 0x67>;
1615 dma-names = "tx", "rx";
1616 };
1617 ssiu05: ssiu-5 {
1618 dmas = <&dmac1 0x64>, <&dmac1 0x65>;
1619 dma-names = "tx", "rx";
1620 };
1621 ssiu06: ssiu-6 {
1622 dmas = <&dmac1 0x62>, <&dmac1 0x63>;
1623 dma-names = "tx", "rx";
1624 };
1625 ssiu07: ssiu-7 {
1626 dmas = <&dmac1 0x60>, <&dmac1 0x61>;
1627 dma-names = "tx", "rx";
1628 };
1629 };
1630
1631 rcar_sound,ssi {
1632 ssi0: ssi-0 {
1633 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
1634 };
1635 };
1636 };
1637
1638 mmc0: mmc@ee140000 {
1639 compatible = "renesas,sdhi-r8a779h0",
1640 "renesas,rcar-gen4-sdhi";
1641 reg = <0 0xee140000 0 0x2000>;
1642 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
1643 clocks = <&cpg CPG_MOD 706>,
1644 <&cpg CPG_CORE R8A779H0_CLK_SD0H>;
1645 clock-names = "core", "clkh";
1646 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1647 resets = <&cpg 706>;
1648 max-frequency = <200000000>;
1649 iommus = <&ipmmu_ds0 32>;
1650 status = "disabled";
1651 };
1652
1653 rpc: spi@ee200000 {
1654 compatible = "renesas,r8a779h0-rpc-if",
1655 "renesas,rcar-gen4-rpc-if";
1656 reg = <0 0xee200000 0 0x200>,
1657 <0 0x08000000 0 0x04000000>,
1658 <0 0xee208000 0 0x100>;
1659 reg-names = "regs", "dirmap", "wbuf";
1660 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1661 clocks = <&cpg CPG_MOD 629>;
1662 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1663 resets = <&cpg 629>;
1664 #address-cells = <1>;
1665 #size-cells = <0>;
1666 status = "disabled";
1667 };
1668
1669 ipmmu_rt0: iommu@ee480000 {
1670 compatible = "renesas,ipmmu-r8a779h0",
1671 "renesas,rcar-gen4-ipmmu-vmsa";
1672 reg = <0 0xee480000 0 0x20000>;
1673 renesas,ipmmu-main = <&ipmmu_mm>;
1674 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1675 #iommu-cells = <1>;
1676 };
1677
1678 ipmmu_rt1: iommu@ee4c0000 {
1679 compatible = "renesas,ipmmu-r8a779h0",
1680 "renesas,rcar-gen4-ipmmu-vmsa";
1681 reg = <0 0xee4c0000 0 0x20000>;
1682 renesas,ipmmu-main = <&ipmmu_mm>;
1683 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1684 #iommu-cells = <1>;
1685 };
1686
1687 ipmmu_ds0: iommu@eed00000 {
1688 compatible = "renesas,ipmmu-r8a779h0",
1689 "renesas,rcar-gen4-ipmmu-vmsa";
1690 reg = <0 0xeed00000 0 0x20000>;
1691 renesas,ipmmu-main = <&ipmmu_mm>;
1692 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1693 #iommu-cells = <1>;
1694 };
1695
1696 ipmmu_hc: iommu@eed40000 {
1697 compatible = "renesas,ipmmu-r8a779h0",
1698 "renesas,rcar-gen4-ipmmu-vmsa";
1699 reg = <0 0xeed40000 0 0x20000>;
1700 renesas,ipmmu-main = <&ipmmu_mm>;
1701 power-domains = <&sysc R8A779H0_PD_C4>;
1702 #iommu-cells = <1>;
1703 };
1704
1705 ipmmu_ir: iommu@eed80000 {
1706 compatible = "renesas,ipmmu-r8a779h0",
1707 "renesas,rcar-gen4-ipmmu-vmsa";
1708 reg = <0 0xeed80000 0 0x20000>;
1709 renesas,ipmmu-main = <&ipmmu_mm>;
1710 power-domains = <&sysc R8A779H0_PD_C4>;
1711 #iommu-cells = <1>;
1712 };
1713
1714 ipmmu_vc: iommu@eedc0000 {
1715 compatible = "renesas,ipmmu-r8a779h0",
1716 "renesas,rcar-gen4-ipmmu-vmsa";
1717 reg = <0 0xeedc0000 0 0x20000>;
1718 renesas,ipmmu-main = <&ipmmu_mm>;
1719 power-domains = <&sysc R8A779H0_PD_C4>;
1720 #iommu-cells = <1>;
1721 };
1722
1723 ipmmu_3dg: iommu@eee00000 {
1724 compatible = "renesas,ipmmu-r8a779h0",
1725 "renesas,rcar-gen4-ipmmu-vmsa";
1726 reg = <0 0xeee00000 0 0x20000>;
1727 renesas,ipmmu-main = <&ipmmu_mm>;
1728 power-domains = <&sysc R8A779H0_PD_C4>;
1729 #iommu-cells = <1>;
1730 };
1731
1732 ipmmu_vi0: iommu@eee80000 {
1733 compatible = "renesas,ipmmu-r8a779h0",
1734 "renesas,rcar-gen4-ipmmu-vmsa";
1735 reg = <0 0xeee80000 0 0x20000>;
1736 renesas,ipmmu-main = <&ipmmu_mm>;
1737 power-domains = <&sysc R8A779H0_PD_C4>;
1738 #iommu-cells = <1>;
1739 };
1740
1741 ipmmu_vi1: iommu@eeec0000 {
1742 compatible = "renesas,ipmmu-r8a779h0",
1743 "renesas,rcar-gen4-ipmmu-vmsa";
1744 reg = <0 0xeeec0000 0 0x20000>;
1745 renesas,ipmmu-main = <&ipmmu_mm>;
1746 power-domains = <&sysc R8A779H0_PD_C4>;
1747 #iommu-cells = <1>;
1748 };
1749
1750 ipmmu_vip0: iommu@eef00000 {
1751 compatible = "renesas,ipmmu-r8a779h0",
1752 "renesas,rcar-gen4-ipmmu-vmsa";
1753 reg = <0 0xeef00000 0 0x20000>;
1754 renesas,ipmmu-main = <&ipmmu_mm>;
1755 power-domains = <&sysc R8A779H0_PD_C4>;
1756 #iommu-cells = <1>;
1757 };
1758
1759 ipmmu_mm: iommu@eefc0000 {
1760 compatible = "renesas,ipmmu-r8a779h0",
1761 "renesas,rcar-gen4-ipmmu-vmsa";
1762 reg = <0 0xeefc0000 0 0x20000>;
1763 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1764 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
1765 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
1766 #iommu-cells = <1>;
1767 };
1768
1769 gic: interrupt-controller@f1000000 {
1770 compatible = "arm,gic-v3";
1771 #interrupt-cells = <3>;
1772 #address-cells = <0>;
1773 interrupt-controller;
1774 reg = <0x0 0xf1000000 0 0x20000>,
1775 <0x0 0xf1060000 0 0x110000>;
1776 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
1777 };
1778
1779 csi40: csi2@fe500000 {
1780 compatible = "renesas,r8a779h0-csi2";
1781 reg = <0 0xfe500000 0 0x40000>;
1782 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
1783 clocks = <&cpg CPG_MOD 331>;
1784 power-domains = <&sysc R8A779H0_PD_C4>;
1785 resets = <&cpg 331>;
1786 status = "disabled";
1787
1788 ports {
1789 #address-cells = <1>;
1790 #size-cells = <0>;
1791
1792 port@0 {
1793 reg = <0>;
1794 };
1795
1796 port@1 {
1797 reg = <1>;
1798 csi40isp0: endpoint {
1799 remote-endpoint = <&isp0csi40>;
1800 };
1801 };
1802 };
1803 };
1804
1805 csi41: csi2@fe540000 {
1806 compatible = "renesas,r8a779h0-csi2";
1807 reg = <0 0xfe540000 0 0x40000>;
1808 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>;
1809 clocks = <&cpg CPG_MOD 400>;
1810 power-domains = <&sysc R8A779H0_PD_C4>;
1811 resets = <&cpg 400>;
1812 status = "disabled";
1813
1814 ports {
1815 #address-cells = <1>;
1816 #size-cells = <0>;
1817
1818 port@0 {
1819 reg = <0>;
1820 };
1821
1822 port@1 {
1823 reg = <1>;
1824 csi41isp1: endpoint {
1825 remote-endpoint = <&isp1csi41>;
1826 };
1827 };
1828 };
1829 };
1830
1831 isp0: isp@fed00000 {
1832 compatible = "renesas,r8a779h0-isp",
1833 "renesas,rcar-gen4-isp";
1834 reg = <0 0xfed00000 0 0x10000>;
1835 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
1836 clocks = <&cpg CPG_MOD 612>;
1837 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1838 resets = <&cpg 612>;
1839 status = "disabled";
1840
1841 ports {
1842 #address-cells = <1>;
1843 #size-cells = <0>;
1844
1845 port@0 {
1846 #address-cells = <1>;
1847 #size-cells = <0>;
1848
1849 reg = <0>;
1850
1851 isp0csi40: endpoint@0 {
1852 reg = <0>;
1853 remote-endpoint = <&csi40isp0>;
1854 };
1855 };
1856
1857 port@1 {
1858 reg = <1>;
1859 isp0vin00: endpoint {
1860 remote-endpoint = <&vin00isp0>;
1861 };
1862 };
1863
1864 port@2 {
1865 reg = <2>;
1866 isp0vin01: endpoint {
1867 remote-endpoint = <&vin01isp0>;
1868 };
1869 };
1870
1871 port@3 {
1872 reg = <3>;
1873 isp0vin02: endpoint {
1874 remote-endpoint = <&vin02isp0>;
1875 };
1876 };
1877
1878 port@4 {
1879 reg = <4>;
1880 isp0vin03: endpoint {
1881 remote-endpoint = <&vin03isp0>;
1882 };
1883 };
1884
1885 port@5 {
1886 reg = <5>;
1887 isp0vin04: endpoint {
1888 remote-endpoint = <&vin04isp0>;
1889 };
1890 };
1891
1892 port@6 {
1893 reg = <6>;
1894 isp0vin05: endpoint {
1895 remote-endpoint = <&vin05isp0>;
1896 };
1897 };
1898
1899 port@7 {
1900 reg = <7>;
1901 isp0vin06: endpoint {
1902 remote-endpoint = <&vin06isp0>;
1903 };
1904 };
1905
1906 port@8 {
1907 reg = <8>;
1908 isp0vin07: endpoint {
1909 remote-endpoint = <&vin07isp0>;
1910 };
1911 };
1912 };
1913 };
1914
1915 isp1: isp@fed20000 {
1916 compatible = "renesas,r8a779h0-isp",
1917 "renesas,rcar-gen4-isp";
1918 reg = <0 0xfed20000 0 0x10000>;
1919 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
1920 clocks = <&cpg CPG_MOD 613>;
1921 power-domains = <&sysc R8A779H0_PD_A3ISP0>;
1922 resets = <&cpg 613>;
1923 status = "disabled";
1924
1925 ports {
1926 #address-cells = <1>;
1927 #size-cells = <0>;
1928
1929 port@0 {
1930 #address-cells = <1>;
1931 #size-cells = <0>;
1932
1933 reg = <0>;
1934
1935 isp1csi41: endpoint@1 {
1936 reg = <1>;
1937 remote-endpoint = <&csi41isp1>;
1938 };
1939 };
1940
1941 port@1 {
1942 reg = <1>;
1943 isp1vin08: endpoint {
1944 remote-endpoint = <&vin08isp1>;
1945 };
1946 };
1947
1948 port@2 {
1949 reg = <2>;
1950 isp1vin09: endpoint {
1951 remote-endpoint = <&vin09isp1>;
1952 };
1953 };
1954
1955 port@3 {
1956 reg = <3>;
1957 isp1vin10: endpoint {
1958 remote-endpoint = <&vin10isp1>;
1959 };
1960 };
1961
1962 port@4 {
1963 reg = <4>;
1964 isp1vin11: endpoint {
1965 remote-endpoint = <&vin11isp1>;
1966 };
1967 };
1968
1969 port@5 {
1970 reg = <5>;
1971 isp1vin12: endpoint {
1972 remote-endpoint = <&vin12isp1>;
1973 };
1974 };
1975
1976 port@6 {
1977 reg = <6>;
1978 isp1vin13: endpoint {
1979 remote-endpoint = <&vin13isp1>;
1980 };
1981 };
1982
1983 port@7 {
1984 reg = <7>;
1985 isp1vin14: endpoint {
1986 remote-endpoint = <&vin14isp1>;
1987 };
1988 };
1989
1990 port@8 {
1991 reg = <8>;
1992 isp1vin15: endpoint {
1993 remote-endpoint = <&vin15isp1>;
1994 };
1995 };
1996 };
1997 };
1998
1999 prr: chipid@fff00044 {
2000 compatible = "renesas,prr";
2001 reg = <0 0xfff00044 0 4>;
2002 };
2003 };
2004
2005 thermal-zones {
2006 sensor_thermal_cr52: sensor1-thermal {
2007 polling-delay-passive = <250>;
2008 polling-delay = <1000>;
2009 thermal-sensors = <&tsc 0>;
2010
2011 trips {
2012 sensor1_crit: sensor1-crit {
2013 temperature = <120000>;
2014 hysteresis = <1000>;
2015 type = "critical";
2016 };
2017 };
2018 };
2019
2020 sensor_thermal_ca76: sensor2-thermal {
2021 polling-delay-passive = <250>;
2022 polling-delay = <1000>;
2023 thermal-sensors = <&tsc 1>;
2024
2025 trips {
2026 sensor2_crit: sensor2-crit {
2027 temperature = <120000>;
2028 hysteresis = <1000>;
2029 type = "critical";
2030 };
2031 };
2032 };
2033 };
2034
2035 timer {
2036 compatible = "arm,armv8-timer";
2037 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2038 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
2039 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
2040 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
2041 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
2042 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2043 "hyp-virt";
2044 };
2045 };
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