1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2022 Radxa Limited
4 * Copyright (c) 2022 Amarula Solutions(India)
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/soc/rockchip,vop2.h>
9 #include "rk3566.dtsi"
10 #include "rk3566-radxa-cm3.dtsi"
11
12 / {
13 model = "Radxa Compute Module 3(CM3) IO Board";
14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
15
16 aliases {
17 ethernet0 = &gmac1;
18 mmc1 = &sdmmc0;
19 };
20
21 chosen: chosen {
22 stdout-path = "serial2:1500000n8";
23 };
24
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
29 #clock-cells = <0>;
30 };
31
32 hdmi-con {
33 compatible = "hdmi-connector";
34 type = "a";
35
36 port {
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
39 };
40 };
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led-1 {
47 gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
48 color = <LED_COLOR_ID_GREEN>;
49 function = LED_FUNCTION_ACTIVITY;
50 linux,default-trigger = "heartbeat";
51 pinctrl-names = "default";
52 pinctrl-0 = <&pi_nled_activity>;
53 };
54 };
55
56 vcc5v0_usb30: vcc5v0-usb30-regulator {
57 compatible = "regulator-fixed";
58 regulator-name = "vcc5v0_usb30";
59 enable-active-high;
60 gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&vcc5v0_usb30_en_h>;
63 regulator-always-on;
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 vin-supply = <&vcc_sys>;
67 };
68
69 vcca1v8_image: vcca1v8-image-regulator {
70 compatible = "regulator-fixed";
71 regulator-name = "vcca1v8_image";
72 regulator-always-on;
73 regulator-boot-on;
74 regulator-min-microvolt = <1800000>;
75 regulator-max-microvolt = <1800000>;
76 vin-supply = <&vcc_1v8_p>;
77 };
78
79 vdda0v9_image: vdda0v9-image-regulator {
80 compatible = "regulator-fixed";
81 regulator-name = "vcca0v9_image";
82 regulator-always-on;
83 regulator-boot-on;
84 regulator-min-microvolt = <900000>;
85 regulator-max-microvolt = <900000>;
86 vin-supply = <&vdda_0v9>;
87 };
88 };
89
90 &combphy1 {
91 status = "okay";
92 };
93
94 &gmac1 {
95 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
96 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
97 assigned-clock-rates = <0>, <125000000>;
98 clock_in_out = "input";
99 phy-handle = <&rgmii_phy1>;
100 phy-mode = "rgmii";
101 pinctrl-names = "default";
102 pinctrl-0 = <&gmac1m0_miim
103 &gmac1m0_tx_bus2
104 &gmac1m0_rx_bus2
105 &gmac1m0_rgmii_clk
106 &gmac1m0_rgmii_bus
107 &gmac1m0_clkinout>;
108 snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
109 snps,reset-active-low;
110 /* Reset time is 20ms, 100ms for rtl8211f */
111 snps,reset-delays-us = <0 20000 100000>;
112 tx_delay = <0x46>;
113 rx_delay = <0x2e>;
114 status = "okay";
115 };
116
117 &hdmi {
118 avdd-0v9-supply = <&vdda0v9_image>;
119 avdd-1v8-supply = <&vcca1v8_image>;
120 status = "okay";
121 };
122
123 &hdmi_in {
124 hdmi_in_vp0: endpoint {
125 remote-endpoint = <&vp0_out_hdmi>;
126 };
127 };
128
129 &hdmi_out {
130 hdmi_out_con: endpoint {
131 remote-endpoint = <&hdmi_con_in>;
132 };
133 };
134
135 &hdmi_sound {
136 status = "okay";
137 };
138
139 &mdio1 {
140 rgmii_phy1: ethernet-phy@0 {
141 compatible = "ethernet-phy-ieee802.3-c22";
142 reg = <0x0>;
143 };
144 };
145
146 &pinctrl {
147 gmac1 {
148 gmac1m0_miim: gmac1m0-miim {
149 rockchip,pins =
150 /* gmac1_mdcm0 */
151 <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
152 /* gmac1_mdiom0 */
153 <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
154 };
155
156 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
157 rockchip,pins =
158 /* gmac1_rxd0m0 */
159 <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
160 /* gmac1_rxd1m0 */
161 <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
162 /* gmac1_rxdvcrsm0 */
163 <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
164 };
165
166 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
167 rockchip,pins =
168 /* gmac1_txd0m0 */
169 <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
170 /* gmac1_txd1m0 */
171 <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
172 /* gmac1_txenm0 */
173 <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
174 };
175
176 gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
177 rockchip,pins =
178 /* gmac1_rxclkm0 */
179 <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
180 /* gmac1_txclkm0 */
181 <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
182 };
183
184 gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
185 rockchip,pins =
186 /* gmac1_rxd2m0 */
187 <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
188 /* gmac1_rxd3m0 */
189 <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
190 /* gmac1_txd2m0 */
191 <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
192 /* gmac1_txd3m0 */
193 <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
194 };
195
196 gmac1m0_clkinout: gmac1m0-clkinout {
197 rockchip,pins =
198 /* gmac1_mclkinoutm0 */
199 <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
200 };
201 };
202
203 leds {
204 pi_nled_activity: pi-nled-activity {
205 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
206 };
207 };
208
209 sdcard {
210 sdmmc_pwren: sdmmc-pwren {
211 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
212 };
213 };
214
215 usb {
216 vcc5v0_usb30_en_h: vcc5v0-host-en-h {
217 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
218 };
219 };
220 };
221
222 &sdmmc0 {
223 bus-width = <4>;
224 cap-mmc-highspeed;
225 cap-sd-highspeed;
226 disable-wp;
227 vqmmc-supply = <&vccio_sd>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>;
230 status = "okay";
231 };
232
233 &uart2 {
234 status = "okay";
235 };
236
237 &usb2phy0_host {
238 phy-supply = <&vcc5v0_usb30>;
239 status = "okay";
240 };
241
242 &usb2phy1_host {
243 status = "okay";
244 };
245
246 &usb2phy1_otg {
247 status = "okay";
248 };
249
250 &usb_host0_ehci {
251 status = "okay";
252 };
253
254 &usb_host1_xhci {
255 status = "okay";
256 };
257
258 &usb2phy0_otg {
259 status = "okay";
260 };
261
262 &usb_host0_xhci {
263 status = "okay";
264 };
265
266 &vop {
267 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
268 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
269 status = "okay";
270 };
271
272 &vop_mmu {
273 status = "okay";
274 };
275
276 &vp0 {
277 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
278 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
279 remote-endpoint = <&hdmi_in_vp0>;
280 };
281 };
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