1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9
10 #include "rk3566-soquartz.dtsi"
11
12 / {
13 model = "Pine64 SOQuartz on Blade carrier board";
14 compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
15
16 aliases {
17 ethernet0 = &gmac1;
18 };
19
20 /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */
21 vcc3v0_sd: vcc3v0-sd-regulator {
22 compatible = "regulator-fixed";
23 regulator-name = "vcc3v0_sd";
24 regulator-always-on;
25 regulator-boot-on;
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
28 vin-supply = <&vcc3v3_sys>;
29 };
30
31 /* labeled VCC_SSD in schematic */
32 vcc3v3_pcie_p: vcc3v3-pcie-regulator {
33 compatible = "regulator-fixed";
34 regulator-name = "vcc3v3_pcie_p";
35 regulator-always-on;
36 regulator-boot-on;
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 vin-supply = <&vbus>;
40 };
41
42 vcc5v_dcin: vcc5v-dcin-regulator {
43 compatible = "regulator-fixed";
44 regulator-name = "vcc5v_dcin";
45 regulator-always-on;
46 regulator-boot-on;
47 regulator-min-microvolt = <5000000>;
48 regulator-max-microvolt = <5000000>;
49 };
50 };
51
52 &combphy2 {
53 phy-supply = <&vcc3v3_sys>;
54 status = "okay";
55 };
56
57 &gmac1 {
58 status = "okay";
59 };
60
61 /*
62 * i2c1 is exposed on CM1 / Module1A
63 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
64 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
65 */
66 &i2c1 {
67 status = "okay";
68
69 };
70
71 /*
72 * i2c2 is exposed on CM1 / Module1A - to PI40
73 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
74 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
75 */
76 &i2c2 {
77 status = "disabled";
78 };
79
80 /*
81 * i2c3 is exposed on CM1 / Module1A - to PI40
82 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
83 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
84 */
85 &i2c3 {
86 status = "disabled";
87 };
88
89 /*
90 * i2c4 is exposed on CM2 / Module1B - to PI40
91 * pin 45 - GPIO24 - i2c4_scl_m1
92 * pin 47 - GPIO23 - i2c4_sda_m1
93 */
94 &i2c4 {
95 status = "disabled";
96 };
97
98 /*
99 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
100 * pin 24 - GPIO26 - i2s1_sdi1_m1
101 * pin 25 - GPIO21 - i2s1_sdo0_m1
102 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
103 * pin 27 - GPIO20 - i2s1_sdi0_m1
104 * pin 29 - GPIO16 - i2s1_sdi3_m1
105 * pin 30 - GPIO6 - i2s1_sdi2_m1
106 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
107 * pin 41 - GPIO25 - i2s1_sdo2_m1
108 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
109 * pin 50 - GPIO17 - i2s1_mclk_m1
110 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
111 */
112 &i2s1_8ch {
113 status = "disabled";
114 };
115
116 &led_diy {
117 color = <LED_COLOR_ID_RED>;
118 function = LED_FUNCTION_DISK_ACTIVITY;
119 linux,default-trigger = "disk-activity";
120 status = "okay";
121 };
122
123 &led_work {
124 color = <LED_COLOR_ID_GREEN>;
125 function = LED_FUNCTION_STATUS;
126 linux,default-trigger = "heartbeat";
127 status = "okay";
128 };
129
130 &pcie2x1 {
131 vpcie3v3-supply = <&vcc3v3_pcie_p>;
132 status = "okay";
133 };
134
135 &rgmii_phy1 {
136 status = "okay";
137 };
138
139 /*
140 * saradc is exposed on CM1 / Module1A - to J2
141 * pin 94 - AIN1 - saradc_vin3
142 * pin 96 - AIN0 - saradc_vin2
143 */
144 &saradc {
145 status = "disabled";
146 };
147
148 &sdmmc0 {
149 vmmc-supply = <&vcc3v0_sd>;
150 status = "okay";
151 };
152
153 /*
154 * spi3 is exposed on CM1 / Module1A - to PI40
155 * pin 37 - GPIO7 - spi3_cs1_m0
156 * pin 38 - GPIO11 - spi3_clk_m0
157 * pin 39 - GPIO8 - spi3_cs0_m0
158 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
159 * pin 44 - GPIO10 - spi3_mosi_m0
160 */
161 &spi3 {
162 status = "disabled";
163 };
164
165 /*
166 * uart2 is exposed on CM1 / Module1A - to PI40
167 * pin 51 - GPIO15 - uart2_rx_m0
168 * pin 55 - GPIO14 - uart2_tx_m0
169 */
170 &uart2 {
171 status = "okay";
172 };
173
174 /*
175 * uart7 is exposed on CM1 / Module1A - to PI40
176 * pin 46 - GPIO22 - uart7_tx_m2
177 * pin 47 - GPIO23 - uart7_rx_m2
178 */
179 &uart7 {
180 status = "okay";
181 };
182
183 &usb2phy0 {
184 status = "okay";
185 };
186
187 &usb2phy0_otg {
188 phy-supply = <&vbus>;
189 status = "okay";
190 };
191
192 &usb_host0_xhci {
193 status = "okay";
194 };
195
196 &vbus {
197 vin-supply = <&vcc5v_dcin>;
198 };
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