1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
2 /*
3 * Device tree overlay base for the WolfVision PF5 displays.
4 *
5 * Copyright (C) 2024 WolfVision GmbH.
6 */
7
8 /dts-v1/;
9 /plugin/;
10
11 #include <dt-bindings/clock/rk3568-cru.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/rockchip.h>
15 #include <dt-bindings/soc/rockchip,vop2.h>
16
17 &{/} {
18 display_backlight: backlight {
19 compatible = "pwm-backlight";
20 brightness-levels = <0 255>;
21 default-brightness-level = <255>;
22 num-interpolated-steps = <255>;
23 power-supply = <&vcc3v3_sd>;
24 pwms = <&pwm10 0 1000000 0>;
25 };
26
27 display_spi: spi {
28 compatible = "spi-gpio";
29 #address-cells = <1>;
30 #size-cells = <0>;
31 cs-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>;
32 miso-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
33 mosi-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
34 num-chipselects = <1>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&lcd_spi>;
37 sck-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
38
39 st7789: panel@0 {
40 compatible = "sitronix,st7789v";
41 reg = <0>;
42 assigned-clocks = <&cru PLL_VPLL>;
43 assigned-clock-rates = <700000000>;
44 backlight = <&display_backlight>;
45 pinctrl-names = "default";
46 pinctrl-0 = <&lcdc_clock &lcdc_data18 &lcd_rstn>;
47 power-supply = <&vcc3v3_sw>;
48 reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
49 spi-max-frequency = <100000>;
50
51 port {
52 panel_in_vp2: endpoint {
53 remote-endpoint = <&vp2_out_rgb>;
54 };
55 };
56 };
57 };
58 };
59
60 &i2c1 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 status = "okay";
64
65 st1624: touchscreen@55 {
66 compatible = "sitronix,st1624", "sitronix,st1633";
67 reg = <0x55>;
68 interrupt-parent = <&gpio0>;
69 interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>;
70 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&touch_int &touch_rstn>;
73 wakeup-source;
74 };
75 };
76
77 &pinctrl {
78 display: display-pinctrl {
79 lcd_rstn: lcd-rstn-pinctrl {
80 rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
81 };
82
83 lcd_spi: lcd-spi-pinctrl {
84 rockchip,pins =
85 /* lcd_sdo */
86 <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>,
87 /* lcd_csn */
88 <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>,
89 /* lcd_scl */
90 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
91 /* lcd_sdi */
92 <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
93 };
94 };
95
96 touchscreen: touchscreen-pinctrl {
97 touch_int: touch-int-pinctrl {
98 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
99 };
100
101 touch_rstn: touch-rstn-pinctrl {
102 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
103 };
104 };
105 };
106
107 &pwm10 {
108 pinctrl-names = "default";
109 pinctrl-0 = <&pwm10m1_pins>;
110 status = "okay";
111 };
112
113 &vp2 {
114 #address-cells = <1>;
115 #size-cells = <0>;
116
117 vp2_out_rgb: endpoint@ROCKCHIP_VOP2_EP_RGB0 {
118 reg = <ROCKCHIP_VOP2_EP_RGB0>;
119 remote-endpoint = <&panel_in_vp2>;
120 };
121 };
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