1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 * Copyright (c) 2023 Thomas McKahan
5 * Copyright (c) 2024 Sebastian Kropatsch
6 *
7 */
8
9 /dts-v1/;
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/usb/pd.h>
15 #include "rk3588-friendlyelec-cm3588.dtsi"
16
17 / {
18 model = "FriendlyElec CM3588 NAS";
19 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588";
20
21 adc_key_recovery: adc-key-recovery {
22 compatible = "adc-keys";
23 io-channels = <&saradc 1>;
24 io-channel-names = "buttons";
25 keyup-threshold-microvolt = <1800000>;
26 poll-interval = <100>;
27
28 button-recovery {
29 label = "Recovery";
30 linux,code = <KEY_VENDOR>;
31 press-threshold-microvolt = <17000>;
32 };
33 };
34
35 analog-sound {
36 compatible = "simple-audio-card";
37 pinctrl-names = "default";
38 pinctrl-0 = <&headphone_detect>;
39
40 simple-audio-card,format = "i2s";
41 simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
42 simple-audio-card,mclk-fs = <256>;
43 simple-audio-card,name = "realtek,rt5616-codec";
44
45 simple-audio-card,routing =
46 "Headphones", "HPOL",
47 "Headphones", "HPOR",
48 "MIC1", "Microphone Jack",
49 "Microphone Jack", "micbias1";
50 simple-audio-card,widgets =
51 "Headphone", "Headphones",
52 "Microphone", "Microphone Jack";
53
54 simple-audio-card,cpu {
55 sound-dai = <&i2s0_8ch>;
56 };
57
58 simple-audio-card,codec {
59 sound-dai = <&rt5616>;
60 };
61 };
62
63 buzzer: pwm-beeper {
64 compatible = "pwm-beeper";
65 amp-supply = <&vcc_5v0_sys>;
66 beeper-hz = <500>;
67 pwms = <&pwm8 0 500000 0>;
68 };
69
70 fan: pwm-fan {
71 compatible = "pwm-fan";
72 #cooling-cells = <2>;
73 cooling-levels = <0 50 80 120 160 220>;
74 fan-supply = <&vcc_5v0_sys>;
75 pwms = <&pwm1 0 50000 0>;
76 };
77
78 gpio_keys: gpio-keys {
79 compatible = "gpio-keys";
80 pinctrl-names = "default";
81 pinctrl-0 = <&key1_pin>;
82
83 button-user {
84 debounce-interval = <50>;
85 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
86 label = "User Button";
87 linux,code = <BTN_1>;
88 wakeup-source;
89 };
90 };
91
92 ir-receiver {
93 compatible = "gpio-ir-receiver";
94 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
95 };
96
97 vcc_12v_dcin: regulator-vcc-12v-dcin {
98 compatible = "regulator-fixed";
99 regulator-name = "vcc_12v_dcin";
100 regulator-always-on;
101 regulator-boot-on;
102 regulator-min-microvolt = <12000000>;
103 regulator-max-microvolt = <12000000>;
104 };
105
106 vcc_3v3_m2_a: regulator-vcc-3v3-m2-a {
107 compatible = "regulator-fixed";
108 regulator-name = "vcc_3v3_m2_a";
109 regulator-always-on;
110 regulator-boot-on;
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
113 vin-supply = <&vcc_12v_dcin>;
114 };
115
116 vcc_3v3_m2_b: regulator-vcc-3v3-m2-b {
117 compatible = "regulator-fixed";
118 regulator-name = "vcc_3v3_m2_b";
119 regulator-always-on;
120 regulator-boot-on;
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
123 vin-supply = <&vcc_12v_dcin>;
124 };
125
126 vcc_3v3_m2_c: regulator-vcc-3v3-m2-c {
127 compatible = "regulator-fixed";
128 regulator-name = "vcc_3v3_m2_c";
129 regulator-always-on;
130 regulator-boot-on;
131 regulator-min-microvolt = <3300000>;
132 regulator-max-microvolt = <3300000>;
133 vin-supply = <&vcc_12v_dcin>;
134 };
135
136 vcc_3v3_m2_d: regulator-vcc-3v3-m2-d {
137 compatible = "regulator-fixed";
138 regulator-name = "vcc_3v3_m2_d";
139 regulator-always-on;
140 regulator-boot-on;
141 regulator-min-microvolt = <3300000>;
142 regulator-max-microvolt = <3300000>;
143 vin-supply = <&vcc_12v_dcin>;
144 };
145
146 /* vcc_5v0_sys powers the peripherals */
147 vcc_5v0_sys: regulator-vcc-5v0-sys {
148 compatible = "regulator-fixed";
149 regulator-name = "vcc_5v0_sys";
150 regulator-always-on;
151 regulator-boot-on;
152 regulator-min-microvolt = <5000000>;
153 regulator-max-microvolt = <5000000>;
154 vin-supply = <&vcc_12v_dcin>;
155 };
156
157 /* SY6280AAC power switch (U14 in schematics) */
158 vcc_5v0_host_20: regulator-vcc-5v0-host-20 {
159 compatible = "regulator-fixed";
160 enable-active-high;
161 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&vcc_5v0_host20_en>;
164 regulator-name = "vcc_5v0_host_20";
165 regulator-min-microvolt = <5000000>;
166 regulator-max-microvolt = <5000000>;
167 vin-supply = <&vcc_5v0_sys>;
168 };
169
170 /* SY6280AAC power switch (U8 in schematics) */
171 vcc_5v0_host_30_p1: regulator-vcc-5v0-host-30-p1 {
172 compatible = "regulator-fixed";
173 enable-active-high;
174 gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&vcc_5v0_host30p1_en>;
177 regulator-name = "vcc_5v0_host_30_p1";
178 regulator-min-microvolt = <5000000>;
179 regulator-max-microvolt = <5000000>;
180 vin-supply = <&vcc_5v0_sys>;
181 };
182
183 /* SY6280AAC power switch (U9 in schematics) */
184 vcc_5v0_host_30_p2: regulator-vcc-5v0-host-30-p2 {
185 compatible = "regulator-fixed";
186 enable-active-high;
187 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&vcc_5v0_host30p2_en>;
190 regulator-name = "vcc_5v0_host_30_p2";
191 regulator-min-microvolt = <5000000>;
192 regulator-max-microvolt = <5000000>;
193 vin-supply = <&vcc_5v0_sys>;
194 };
195
196 /* SY6280AAC power switch (U10 in schematics) */
197 vbus_5v0_typec: regulator-vbus-5v0-typec {
198 compatible = "regulator-fixed";
199 enable-active-high;
200 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&typec_5v_pwr_en>;
203 regulator-name = "vbus_5v0_typec";
204 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <5000000>;
206 vin-supply = <&vcc_5v0_sys>;
207 };
208 };
209
210 /* vcc_4v0_sys powers the RK806 and RK860's */
211 &vcc_4v0_sys {
212 vin-supply = <&vcc_12v_dcin>;
213 };
214
215 /* Combo PHY 1 is configured to act as as PCIe 2.0 PHY */
216 /* Used by PCIe controller 2 (pcie2x1l0) */
217 &combphy1_ps {
218 status = "okay";
219 };
220
221 /* Combo PHY 2 is configured to act as USB3 PHY */
222 /* Used by USB 3.0 OTG 2 controller (USB 3.0 Type-A port 2) */
223 /* CM3588 USB Controller Config Table: USB30 HOST2 */
224 &combphy2_psu {
225 status = "okay";
226 };
227
228 /* GPIO names are in the format "Human-readable-name [SIGNAL_LABEL]" */
229 /* Signal labels match the official CM3588 NAS SDK schematic revision 2309 */
230 &gpio0 {
231 gpio-line-names =
232 /* GPIO0 A0-A7 */
233 "", "", "", "",
234 "MicroSD detect [SDMMC_DET_L]", "", "", "",
235 /* GPIO0 B0-B7 */
236 "", "", "", "",
237 "", "", "", "",
238 /* GPIO0 C0-C7 */
239 "", "", "", "",
240 "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "",
241 /* GPIO0 D0-D7 */
242 "", "", "", "USB3 Type-C [CC_INT_L]",
243 "IR receiver [PWM3_IR_M0]", "User Button", "", "";
244 };
245
246 &gpio1 {
247 gpio-line-names =
248 /* GPIO1 A0-A7 */
249 "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "",
250 "USB2 Type-A [USB2_PWREN]", "", "", "Pin 15",
251 /* GPIO1 B0-B7 */
252 "Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4_TX_M2]",
253 "Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2_CLKOUT]",
254 /* GPIO1 C0-C7 */
255 "", "", "", "",
256 "Headphone detect [HP_DET_L]", "", "", "",
257 /* GPIO1 D0-D7 */
258 "", "", "USB3 Type-C [TYPEC5V_PWREN_H]", "5V Fan [PWM1_M1]",
259 "", "HDMI-in detect [HDMIIRX_DET_L]", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]";
260 };
261
262 &gpio2 {
263 gpio-line-names =
264 /* GPIO2 A0-A7 */
265 "", "", "", "",
266 "", "", "SPI NOR Flash [FSPI_D0_M1]", "SPI NOR Flash [FSPI_D1_M1]",
267 /* GPIO2 B0-B7 */
268 "SPI NOR Flash [FSPI_D2_M1]", "SPI NOR Flash [FSPI_D3_M1]", "", "SPI NOR Flash [FSPI_CLK_M1]",
269 "SPI NOR Flash [FSPI_CSN0_M1]", "", "", "",
270 /* GPIO2 C0-C7 */
271 "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "",
272 "", "", "", "",
273 /* GPIO2 D0-D7 */
274 "", "", "", "",
275 "", "", "", "";
276 };
277
278 &gpio3 {
279 gpio-line-names =
280 /* GPIO3 A0-A7 */
281 "Pin 35 [SPI4_MISO_M1/PWM10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pin 36 [SPI4_CS0_M1/UART8_RX_M1]",
282 "Pin 37 [SPI4_CS1_M1]", "USB3-A #2 [USB3_2_PWREN]", "DSI-Pin 12 [LCD_RST]", "Buzzer [PWM8_M0]",
283 /* GPIO3 B0-B7 */
284 "Pin 33 [PWM9_M0]", "DSI-Pin 10 [PWM2_M1/LCD_BL]", "Pin 07", "Pin 16",
285 "Pin 18", "Pin 29 [UART3_TX_M1/PWM12_M0]", "Pin 31 [UART3_RX_M1/PWM13_M0]", "Pin 12",
286 /* GPIO3 C0-C7 */
287 "DSI-Pin 08 [TP_INT_L]", "DSI-Pin 14 [TP_RST_L]", "Pin 11 [PWM14_M0]", "Pin 13 [PWM15_IR_M0]",
288 "", "", "", "DSI-Pin 06 [I2C5_SCL_M0_TP]",
289 /* GPIO3 D0-D7 */
290 "DSI-Pin 05 [I2C5_SDA_M0_TP]", "", "", "",
291 "", "", "", "";
292 };
293
294 &gpio4 {
295 gpio-line-names =
296 /* GPIO4 A0-A7 */
297 "", "", "M.2 M-Key Slot4 [M2_D_PERST_L]", "",
298 "", "", "", "",
299 /* GPIO4 B0-B7 */
300 "USB3-A #1 [USB3_TYPEC1_PWREN]", "", "", "M.2 M-Key Slot3 [M2_C_PERST_L]",
301 "M.2 M-Key Slot2 [M2_B_PERST_L]", "M.2 M-Key Slot1 [M2_A_CLKREQ_L]", "M.2 M-Key Slot1 [M2_A_PERST_L]", "",
302 /* GPIO4 C0-C7 */
303 "", "", "", "",
304 "", "", "", "",
305 /* GPIO4 D0-D7 */
306 "", "", "", "",
307 "", "", "", "";
308 };
309
310 /* Connected to MIPI-DSI0 */
311 &i2c5 {
312 pinctrl-names = "default";
313 pinctrl-0 = <&i2c5m0_xfer>;
314 status = "disabled";
315 };
316
317 &i2c6 {
318 fusb302: typec-portc@22 {
319 compatible = "fcs,fusb302";
320 reg = <0x22>;
321 interrupt-parent = <&gpio0>;
322 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&usbc0_int>;
325 vbus-supply = <&vbus_5v0_typec>;
326
327 usb_con: connector {
328 compatible = "usb-c-connector";
329 data-role = "dual";
330 label = "USB-C";
331 power-role = "source";
332 source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
333 try-power-role = "source";
334 vbus-supply = <&vbus_5v0_typec>;
335
336 ports {
337 #address-cells = <1>;
338 #size-cells = <0>;
339
340 port@0 {
341 reg = <0>;
342
343 usbc0_orien_sw: endpoint {
344 remote-endpoint = <&usbdp_phy0_orientation_switch>;
345 };
346 };
347
348 port@1 {
349 reg = <1>;
350
351 usbc0_role_sw: endpoint {
352 remote-endpoint = <&dwc3_0_role_switch>;
353 };
354 };
355
356 port@2 {
357 reg = <2>;
358
359 dp_altmode_mux: endpoint {
360 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
361 };
362 };
363 };
364 };
365 };
366 };
367
368 /* Connected to MIPI-CSI1 */
369 /* &i2c7 */
370
371 /* GPIO Connector, connected to 40-pin GPIO header */
372 &i2c8 {
373 pinctrl-names = "default";
374 pinctrl-0 = <&i2c8m2_xfer>;
375 status = "okay";
376 };
377
378 &pcie2x1l0 {
379 /* 2. M.2 socket, CON14: pcie30phy port0 lane1, @fe170000 */
380 max-link-speed = <3>;
381 num-lanes = <1>;
382 phys = <&pcie30phy>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pcie2_0_rst>;
385 reset-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
386 vpcie3v3-supply = <&vcc_3v3_m2_b>;
387 status = "okay";
388 };
389
390 &pcie2x1l1 {
391 /* 4. M.2 socket, CON16: pcie30phy port1 lane1, @fe180000 */
392 max-link-speed = <3>;
393 num-lanes = <1>;
394 phys = <&pcie30phy>;
395 pinctrl-names = "default";
396 pinctrl-0 = <&pcie2_1_rst>;
397 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
398 vpcie3v3-supply = <&vcc_3v3_m2_d>;
399 status = "okay";
400 };
401
402 &pcie30phy {
403 /*
404 * Data lane mapping <1 3 2 4> = x1x1 x1x1 (bifurcation of both ports)
405 * port 0 lane 0 - always mapped to controller 0 (4L)
406 * port 0 lane 1 - map to controller 2 (1L0)
407 * port 1 lane 0 - map to controller 1 (2L)
408 * port 1 lane 1 - map to controller 3 (1L1)
409 */
410 data-lanes = <1 3 2 4>;
411 status = "okay";
412 };
413
414 &pcie3x4 {
415 /* 1. M.2 socket, CON13: pcie30phy port0 lane0, @fe150000 */
416 max-link-speed = <3>;
417 num-lanes = <1>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pcie3x4_rst>;
420 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
421 vpcie3v3-supply = <&vcc_3v3_m2_a>;
422 status = "okay";
423 };
424
425 &pcie3x2 {
426 /* 3. M.2 socket, CON15: pcie30phy port1 lane0, @fe160000 */
427 max-link-speed = <3>;
428 num-lanes = <1>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pcie3x2_rst>;
431 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
432 vpcie3v3-supply = <&vcc_3v3_m2_c>;
433 status = "okay";
434 };
435
436 &pinctrl {
437 audio {
438 headphone_detect: headphone-detect {
439 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
440 };
441 };
442
443 gpio-key {
444 key1_pin: key1-pin {
445 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
446 };
447 };
448
449 pcie {
450 pcie2_0_rst: pcie2-0-rst {
451 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
452 };
453
454 pcie2_1_rst: pcie2-1-rst {
455 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
456 };
457
458 pcie3x2_rst: pcie3x2-rst {
459 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
460 };
461
462 pcie3x4_rst: pcie3x4-rst {
463 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
464 };
465 };
466
467 usb {
468 vcc_5v0_host20_en: vcc-5v0-host20-en {
469 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
470 };
471
472 vcc_5v0_host30p1_en: vcc-5v0-host30p1-en {
473 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
474 };
475
476 vcc_5v0_host30p2_en: vcc-5v0-host30p2-en {
477 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
478 };
479 };
480
481 usb-typec {
482 usbc0_int: usbc0-int {
483 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
484 };
485
486 typec_5v_pwr_en: typec-5v-pwr-en {
487 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
488 };
489 };
490 };
491
492 /* Connected to 5V Fan */
493 &pwm1 {
494 pinctrl-names = "default";
495 pinctrl-0 = <&pwm1m1_pins>;
496 status = "okay";
497 };
498
499 /* Connected to MIPI-DSI0 */
500 &pwm2 {
501 pinctrl-names = "default";
502 pinctrl-0 = <&pwm2m1_pins>;
503 };
504
505 /* Connected to IR Receiver */
506 &pwm3 {
507 pinctrl-names = "default";
508 pinctrl-0 = <&pwm3m0_pins>;
509 status = "okay";
510 };
511
512 /* GPIO Connector, connected to 40-pin GPIO header */
513 /* Shared with UART0 */
514 &pwm4 {
515 pinctrl-names = "default";
516 pinctrl-0 = <&pwm4m1_pins>;
517 status = "disabled";
518 };
519
520 /* GPIO Connector, connected to 40-pin GPIO header */
521 &pwm5 {
522 pinctrl-names = "default";
523 pinctrl-0 = <&pwm5m1_pins>;
524 status = "okay";
525 };
526
527 /* Connected to Buzzer */
528 &pwm8 {
529 pinctrl-names = "default";
530 pinctrl-0 = <&pwm8m0_pins>;
531 status = "okay";
532 };
533
534 /* GPIO Connector, connected to 40-pin GPIO header */
535 &pwm9 {
536 pinctrl-names = "default";
537 pinctrl-0 = <&pwm9m0_pins>;
538 status = "okay";
539 };
540
541 /* GPIO Connector, connected to 40-pin GPIO header */
542 /* Shared with SPI4 */
543 &pwm10 {
544 pinctrl-names = "default";
545 pinctrl-0 = <&pwm10m0_pins>;
546 status = "disabled";
547 };
548
549 /* GPIO Connector, connected to 40-pin GPIO header */
550 /* Shared with UART3 */
551 &pwm12 {
552 pinctrl-names = "default";
553 pinctrl-0 = <&pwm12m0_pins>;
554 status = "disabled";
555 };
556
557 /* GPIO Connector, connected to 40-pin GPIO header */
558 /* Shared with UART3 */
559 &pwm13 {
560 pinctrl-names = "default";
561 pinctrl-0 = <&pwm13m0_pins>;
562 status = "disabled";
563 };
564
565 /* GPIO Connector, connected to 40-pin GPIO header */
566 &pwm14 {
567 pinctrl-names = "default";
568 pinctrl-0 = <&pwm14m0_pins>;
569 status = "okay";
570 };
571
572 /* GPIO Connector, connected to 40-pin GPIO header */
573 /* Optimized for infrared applications */
574 &pwm15 {
575 pinctrl-names = "default";
576 pinctrl-0 = <&pwm15m0_pins>;
577 status = "disabled";
578 };
579
580 /* microSD card */
581 &sdmmc {
582 status = "okay";
583 };
584
585 /* GPIO Connector, connected to 40-pin GPIO header */
586 /* Shared with UART4, UART7 and PWM10 */
587 &spi0 {
588 num-cs = <1>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&spi0m2_cs0 &spi0m2_pins>;
591 status = "disabled";
592 };
593
594 /* GPIO Connector, connected to 40-pin GPIO header */
595 /* Shared with UART8 */
596 &spi4 {
597 num-cs = <1>;
598 pinctrl-names = "default";
599 pinctrl-0 = <&spi4m1_cs0 &spi4m1_pins>;
600 status = "disabled";
601 };
602
603 /* GPIO Connector, connected to 40-pin GPIO header */
604 /* Shared with PWM4 */
605 &uart0 {
606 pinctrl-names = "default";
607 pinctrl-0 = <&uart0m0_xfer>;
608 status = "disabled";
609 };
610
611 /* Debug UART */
612 &uart2 {
613 status = "okay";
614 };
615
616 /* GPIO Connector, connected to 40-pin GPIO header */
617 /* Shared with PWM12 and PWM13 */
618 &uart3 {
619 pinctrl-names = "default";
620 pinctrl-0 = <&uart3m1_xfer>;
621 status = "disabled";
622 };
623
624 /* GPIO Connector, connected to 40-pin GPIO header */
625 /* Shared with SPI0 */
626 &uart4 {
627 pinctrl-names = "default";
628 pinctrl-0 = <&uart4m2_xfer>;
629 status = "disabled";
630 };
631
632 /* GPIO Connector, connected to 40-pin GPIO header */
633 &uart6 {
634 pinctrl-names = "default";
635 pinctrl-0 = <&uart6m1_xfer>;
636 status = "okay";
637 };
638
639 /* GPIO Connector, connected to 40-pin GPIO header */
640 /* Shared with SPI0 */
641 &uart7 {
642 pinctrl-names = "default";
643 pinctrl-0 = <&uart7m2_xfer>;
644 status = "disabled";
645 };
646
647 /* GPIO Connector, connected to 40-pin GPIO header */
648 /* Shared with SPI4 */
649 &uart8 {
650 pinctrl-names = "default";
651 pinctrl-0 = <&uart8m1_xfer>;
652 status = "disabled";
653 };
654
655 /* USB2 PHY for USB Type-C port */
656 /* CM3588 USB Controller Config Table: USB20 OTG0 */
657 &u2phy0 {
658 status = "okay";
659 };
660
661 &u2phy0_otg {
662 phy-supply = <&vbus_5v0_typec>;
663 status = "okay";
664 };
665
666 /* USB2 PHY for USB 3.0 Type-A port 1 */
667 /* CM3588 USB Controller Config Table: USB20 OTG1 */
668 &u2phy1 {
669 status = "okay";
670 };
671
672 &u2phy1_otg {
673 phy-supply = <&vcc_5v0_host_30_p1>;
674 status = "okay";
675 };
676
677 /* USB2 PHY for USB 2.0 Type-A */
678 /* CM3588 USB Controller Config Table: USB20 HOST0 */
679 &u2phy2 {
680 status = "okay";
681 };
682
683 &u2phy2_host {
684 phy-supply = <&vcc_5v0_host_20>;
685 status = "okay";
686 };
687
688 /* USB2 PHY for USB 3.0 Type-A port 2 */
689 /* CM3588 USB Controller Config Table: USB20 HOST1 */
690 &u2phy3 {
691 status = "okay";
692 };
693
694 &u2phy3_host {
695 phy-supply = <&vcc_5v0_host_30_p2>;
696 status = "okay";
697 };
698
699 /* USB 2.0 Type-A */
700 /* PHY: <&u2phy2_host> */
701 &usb_host0_ehci {
702 status = "okay";
703 };
704
705 /* USB 2.0 Type-A */
706 /* PHY: <&u2phy2_host> */
707 &usb_host0_ohci {
708 status = "okay";
709 };
710
711 /* USB Type-C */
712 /* PHYs: <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3> */
713 &usb_host0_xhci {
714 usb-role-switch;
715 status = "okay";
716
717 port {
718 dwc3_0_role_switch: endpoint {
719 remote-endpoint = <&usbc0_role_sw>;
720 };
721 };
722 };
723
724 /* Lower USB 3.0 Type-A (port 2) */
725 /* PHY: <&u2phy3_host> */
726 &usb_host1_ehci {
727 status = "okay";
728 };
729
730 /* Lower USB 3.0 Type-A (port 2) */
731 /* PHY: <&u2phy3_host> */
732 &usb_host1_ohci {
733 status = "okay";
734 };
735
736 /* Upper USB 3.0 Type-A (port 1) */
737 /* PHYs: <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3> */
738 &usb_host1_xhci {
739 dr_mode = "host";
740 status = "okay";
741 };
742
743 /* Lower USB 3.0 Type-A (port 2) */
744 /* PHYs: <&combphy2_psu PHY_TYPE_USB3> */
745 &usb_host2_xhci {
746 status = "okay";
747 };
748
749 /* USB3 PHY for USB Type-C port */
750 /* CM3588 USB Controller Config Table: USB30 OTG0 */
751 &usbdp_phy0 {
752 mode-switch;
753 orientation-switch;
754 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
755 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
756 status = "okay";
757
758 port {
759 #address-cells = <1>;
760 #size-cells = <0>;
761
762 usbdp_phy0_orientation_switch: endpoint@0 {
763 reg = <0>;
764 remote-endpoint = <&usbc0_orien_sw>;
765 };
766
767 usbdp_phy0_dp_altmode_mux: endpoint@1 {
768 reg = <1>;
769 remote-endpoint = <&dp_altmode_mux>;
770 };
771 };
772 };
773
774 /* USB3 PHY for USB 3.0 Type-A port 1 */
775 /* CM3588 USB Controller Config Table: USB30 OTG1 */
776 &usbdp_phy1 {
777 status = "okay";
778 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.