1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 /*
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
4 * Author: Matt McKee <mmckee@phytec.com>
5 *
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
7 * Author: Wadim Egorov <w.egorov@phytec.de>
8 *
9 * Product homepage:
10 * https://www.phytec.com/product/phycore-am64x
11 */
12
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16
17 / {
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
20
21 aliases {
22 ethernet0 = &cpsw_port1;
23 mmc0 = &sdhci0;
24 rtc0 = &i2c_som_rtc;
25 };
26
27 memory@80000000 {
28 device_type = "memory";
29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
30 };
31
32 reserved_memory: reserved-memory {
33 #address-cells = <2>;
34 #size-cells = <2>;
35 ranges;
36
37 secure_ddr: optee@9e800000 {
38 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
39 alignment = <0x1000>;
40 no-map;
41 };
42
43 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
44 compatible = "shared-dma-pool";
45 reg = <0x00 0xa0000000 0x00 0x100000>;
46 no-map;
47 };
48
49 main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
50 compatible = "shared-dma-pool";
51 reg = <0x00 0xa0100000 0x00 0xf00000>;
52 no-map;
53 };
54
55 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
56 compatible = "shared-dma-pool";
57 reg = <0x00 0xa1000000 0x00 0x100000>;
58 no-map;
59 };
60
61 main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
62 compatible = "shared-dma-pool";
63 reg = <0x00 0xa1100000 0x00 0xf00000>;
64 no-map;
65 };
66
67 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
68 compatible = "shared-dma-pool";
69 reg = <0x00 0xa2000000 0x00 0x100000>;
70 no-map;
71 };
72
73 main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
74 compatible = "shared-dma-pool";
75 reg = <0x00 0xa2100000 0x00 0xf00000>;
76 no-map;
77 };
78
79 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
80 compatible = "shared-dma-pool";
81 reg = <0x00 0xa3000000 0x00 0x100000>;
82 no-map;
83 };
84
85 main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
86 compatible = "shared-dma-pool";
87 reg = <0x00 0xa3100000 0x00 0xf00000>;
88 no-map;
89 };
90 };
91
92 leds {
93 compatible = "gpio-leds";
94 pinctrl-names = "default";
95 pinctrl-0 = <&leds_pins_default>;
96
97 led-0 {
98 color = <LED_COLOR_ID_GREEN>;
99 gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
100 linux,default-trigger = "heartbeat";
101 function = LED_FUNCTION_HEARTBEAT;
102 };
103 };
104
105 vcc_5v0_som: regulator-vcc-5v0-som {
106 /* VIN / VCC_5V0_SOM */
107 compatible = "regulator-fixed";
108 regulator-name = "VCC_5V0_SOM";
109 regulator-min-microvolt = <5000000>;
110 regulator-max-microvolt = <5000000>;
111 regulator-always-on;
112 regulator-boot-on;
113 };
114 };
115
116 &main_pmx0 {
117 cpsw_mdio_pins_default: cpsw-mdio-default-pins {
118 pinctrl-single,pins = <
119 AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
120 AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
121 AM64X_IOPAD(0x0100, PIN_OUTPUT, 7) /* (V7) PRG1_PRU0_GPO18.GPIO0_63 */
122 >;
123 };
124
125 cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
126 pinctrl-single,pins = <
127 AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
128 AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
129 AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
130 AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
131 AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
132 AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
133 AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
134 AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
135 AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
136 AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
137 AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
138 AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
139 AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
140 >;
141 };
142
143 eeprom_wp_pins_default: eeprom-wp-default-pins {
144 pinctrl-single,pins = <
145 AM64X_IOPAD(0x0208, PIN_OUTPUT, 7) /* (D12) SPI0_CS0.GPIO1_42 */
146 >;
147 };
148
149 leds_pins_default: leds-default-pins {
150 pinctrl-single,pins = <
151 AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (L18) OSPI0_CSn1.GPIO0_12 */
152 >;
153 };
154
155 main_i2c0_pins_default: main-i2c0-default-pins {
156 pinctrl-single,pins = <
157 AM64X_IOPAD(0x0260, PIN_INPUT, 0) /* (A18) I2C0_SCL */
158 AM64X_IOPAD(0x0264, PIN_INPUT, 0) /* (B18) I2C0_SDA */
159 >;
160 };
161
162 ospi0_pins_default: ospi0-default-pins {
163 pinctrl-single,pins = <
164 AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
165 AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
166 AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
167 AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
168 AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
169 AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
170 AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
171 AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
172 AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
173 AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
174 AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
175 >;
176 };
177
178 rtc_pins_default: rtc-defaults-pins {
179 pinctrl-single,pins = <
180 AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* (C19) EXTINTn.GPIO1_70 */
181 >;
182 };
183 };
184
185 &cpsw3g {
186 pinctrl-names = "default";
187 pinctrl-0 = <&cpsw_rgmii1_pins_default>;
188 status = "okay";
189 };
190
191 &cpsw3g_mdio {
192 status = "okay";
193 pinctrl-names = "default";
194 pinctrl-0 = <&cpsw_mdio_pins_default>;
195
196 cpsw3g_phy1: ethernet-phy@1 {
197 compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
198 reg = <1>;
199 interrupt-parent = <&main_gpio0>;
200 interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
201 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
202 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
203 reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>;
204 reset-assert-us = <1000>;
205 reset-deassert-us = <1000>;
206 };
207 };
208
209 &cpsw_port1 {
210 phy-mode = "rgmii-rxid";
211 phy-handle = <&cpsw3g_phy1>;
212 status = "okay";
213 };
214
215 &mailbox0_cluster2 {
216 status = "okay";
217
218 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
219 ti,mbox-rx = <0 0 2>;
220 ti,mbox-tx = <1 0 2>;
221 };
222
223 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
224 ti,mbox-rx = <2 0 2>;
225 ti,mbox-tx = <3 0 2>;
226 };
227 };
228
229 &mailbox0_cluster4 {
230 status = "okay";
231
232 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
233 ti,mbox-rx = <0 0 2>;
234 ti,mbox-tx = <1 0 2>;
235 };
236
237 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
238 ti,mbox-rx = <2 0 2>;
239 ti,mbox-tx = <3 0 2>;
240 };
241 };
242
243 &main_i2c0 {
244 status = "okay";
245 pinctrl-names = "default";
246 pinctrl-0 = <&main_i2c0_pins_default>;
247 clock-frequency = <400000>;
248
249 eeprom@50 {
250 compatible = "atmel,24c32";
251 pinctrl-names = "default";
252 pinctrl-0 = <&eeprom_wp_pins_default>;
253 pagesize = <32>;
254 reg = <0x50>;
255 };
256
257 i2c_som_rtc: rtc@52 {
258 compatible = "microcrystal,rv3028";
259 reg = <0x52>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&rtc_pins_default>;
262 interrupt-parent = <&main_gpio1>;
263 interrupts = <70 IRQ_TYPE_EDGE_FALLING>;
264 wakeup-source;
265 };
266
267 pmic@61 {
268 compatible = "ti,lp8733";
269 reg = <0x61>;
270
271 buck0-in-supply = <&vcc_5v0_som>;
272 buck1-in-supply = <&vcc_5v0_som>;
273 ldo0-in-supply = <&vdd_3v3>;
274 ldo1-in-supply = <&vdd_3v3>;
275
276 regulators {
277 vdd_core: buck0 {
278 regulator-name = "VDD_CORE";
279 regulator-min-microvolt = <750000>;
280 regulator-max-microvolt = <750000>;
281 regulator-always-on;
282 regulator-boot-on;
283 };
284
285 vdd_3v3: buck1 {
286 regulator-name = "VDD_3V3";
287 regulator-min-microvolt = <3300000>;
288 regulator-max-microvolt = <3300000>;
289 regulator-always-on;
290 regulator-boot-on;
291 };
292
293 vdd_1v8_ldo0: ldo0 {
294 regulator-name = "VDD_1V8_LDO0";
295 regulator-min-microvolt = <1800000>;
296 regulator-max-microvolt = <1800000>;
297 regulator-always-on;
298 regulator-boot-on;
299 };
300
301 vdda_1v8: ldo1 {
302 regulator-name = "VDDA_1V8";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
305 regulator-always-on;
306 regulator-boot-on;
307 };
308 };
309 };
310 };
311
312 &main_r5fss0_core0 {
313 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
314 memory-region = <&main_r5fss0_core0_dma_memory_region>,
315 <&main_r5fss0_core0_memory_region>;
316 };
317
318 &main_r5fss0_core1 {
319 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
320 memory-region = <&main_r5fss0_core1_dma_memory_region>,
321 <&main_r5fss0_core1_memory_region>;
322 };
323
324 &main_r5fss1_core0 {
325 mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
326 memory-region = <&main_r5fss1_core0_dma_memory_region>,
327 <&main_r5fss1_core0_memory_region>;
328 };
329
330 &main_r5fss1_core1 {
331 mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
332 memory-region = <&main_r5fss1_core1_dma_memory_region>,
333 <&main_r5fss1_core1_memory_region>;
334 };
335
336 &ospi0 {
337 status = "okay";
338 pinctrl-names = "default";
339 pinctrl-0 = <&ospi0_pins_default>;
340
341 serial_flash: flash@0 {
342 compatible = "jedec,spi-nor";
343 reg = <0x0>;
344 spi-tx-bus-width = <8>;
345 spi-rx-bus-width = <8>;
346 spi-max-frequency = <25000000>;
347 cdns,tshsl-ns = <60>;
348 cdns,tsd2d-ns = <60>;
349 cdns,tchsh-ns = <60>;
350 cdns,tslch-ns = <60>;
351 cdns,read-delay = <0>;
352 };
353 };
354
355 &sdhci0 {
356 status = "okay";
357 bus-width = <8>;
358 non-removable;
359 ti,driver-strength-ohm = <50>;
360 disable-wp;
361 keep-power-in-suspend;
362 };
363
364 &tscadc0 {
365 status = "okay";
366 adc {
367 ti,adc-channels = <0 1 2 3 4 5 6 7>;
368 };
369 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.