1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 /*
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
5 */
6
7 /dts-v1/;
8
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pwm/pwm.h>
15 #include "k3-serdes.h"
16
17 #include "k3-am642-tqma64xxl.dtsi"
18
19 / {
20 compatible = "tq,am642-tqma6442l-mbax4xxl", "tq,am642-tqma6442l",
21 "ti,am642";
22 model = "TQ-Systems TQMa64xxL SoM on MBax4xxL carrier board";
23 chassis-type = "embedded";
24
25 aliases {
26 ethernet0 = &cpsw_port1;
27 ethernet1 = &icssg1_emac0;
28 ethernet2 = &icssg1_emac1;
29 i2c1 = &mcu_i2c0;
30 mmc1 = &sdhci1;
31 serial0 = &mcu_uart0;
32 serial1 = &mcu_uart1;
33 serial2 = &main_uart0;
34 serial3 = &main_uart1;
35 serial4 = &main_uart2;
36 serial5 = &main_uart4;
37 serial6 = &main_uart5;
38 serial7 = &main_uart3;
39 spi1 = &main_spi0;
40 spi2 = &mcu_spi0;
41 };
42
43 chosen {
44 stdout-path = &main_uart0;
45 };
46
47 gpio-keys {
48 compatible = "gpio-keys";
49 pinctrl-names = "default";
50 pinctrl-0 = <&mcu_gpio_keys_pins>;
51
52 user-button {
53 label = "USER_BUTTON";
54 linux,code = <BTN_0>;
55 gpios = <&mcu_gpio0 5 GPIO_ACTIVE_LOW>;
56 };
57 };
58
59 gpio-leds {
60 compatible = "gpio-leds";
61 pinctrl-names = "default";
62 pinctrl-0 = <&mcu_gpio_leds_pins>;
63
64 led-0 {
65 gpios = <&mcu_gpio0 8 GPIO_ACTIVE_HIGH>;
66 color = <LED_COLOR_ID_GREEN>;
67 function = LED_FUNCTION_INDICATOR;
68 };
69 led-1 {
70 gpios = <&mcu_gpio0 9 GPIO_ACTIVE_HIGH>;
71 color = <LED_COLOR_ID_YELLOW>;
72 function = LED_FUNCTION_INDICATOR;
73 };
74 };
75
76 icssg1_eth: icssg1-eth {
77 compatible = "ti,am642-icssg-prueth";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pru_icssg1_rgmii1_pins>, <&pru_icssg1_rgmii2_pins>;
80 interrupt-parent = <&icssg1_intc>;
81 interrupts = <24 0 2>, <25 1 3>;
82 interrupt-names = "tx_ts0", "tx_ts1";
83 dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
84 <&main_pktdma 0xc201 15>, /* egress slice 0 */
85 <&main_pktdma 0xc202 15>, /* egress slice 0 */
86 <&main_pktdma 0xc203 15>, /* egress slice 0 */
87 <&main_pktdma 0xc204 15>, /* egress slice 1 */
88 <&main_pktdma 0xc205 15>, /* egress slice 1 */
89 <&main_pktdma 0xc206 15>, /* egress slice 1 */
90 <&main_pktdma 0xc207 15>, /* egress slice 1 */
91 <&main_pktdma 0x4200 15>, /* ingress slice 0 */
92 <&main_pktdma 0x4201 15>; /* ingress slice 1 */
93 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
94 "tx1-0", "tx1-1", "tx1-2", "tx1-3",
95 "rx0", "rx1";
96 sram = <&oc_sram>;
97 firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
98 "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
99 "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
100 "ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
101 "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
102 "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";
103 ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
104 ti,pruss-gp-mux-sel = <2>, /* MII mode */
105 <2>,
106 <2>,
107 <2>, /* MII mode */
108 <2>,
109 <2>;
110 ti,mii-g-rt = <&icssg1_mii_g_rt>;
111 ti,mii-rt = <&icssg1_mii_rt>;
112 ti,iep = <&icssg1_iep0>, <&icssg1_iep1>;
113
114 ethernet-ports {
115 #address-cells = <1>;
116 #size-cells = <0>;
117
118 icssg1_emac0: port@0 {
119 reg = <0>;
120 phy-handle = <&icssg1_phy0c>;
121 phy-mode = "rgmii-id";
122 /* Filled in by bootloader */
123 local-mac-address = [00 00 00 00 00 00];
124 };
125
126 icssg1_emac1: port@1 {
127 reg = <1>;
128 phy-handle = <&icssg1_phy03>;
129 phy-mode = "rgmii-id";
130 /* Filled in by bootloader */
131 local-mac-address = [00 00 00 00 00 00];
132 };
133 };
134 };
135
136 fan0: pwm-fan {
137 compatible = "pwm-fan";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pwm_fan_pins>;
140 fan-supply = <®_pwm_fan>;
141 #cooling-cells = <2>;
142 /* typical 25 kHz -> 40.000 nsec */
143 pwms = <&epwm5 0 40000 PWM_POLARITY_INVERTED>;
144 cooling-levels = <0 32 64 128 196 240>;
145 pulses-per-revolution = <2>;
146 interrupt-parent = <&main_gpio1>;
147 interrupts = <49 IRQ_TYPE_EDGE_FALLING>;
148 status = "disabled";
149 };
150
151 wifi_pwrseq: pwrseq-wifi {
152 compatible = "mmc-pwrseq-simple";
153 pinctrl-names = "default";
154 pinctrl-0 = <&main_mmc1_wifi_pwrseq_pins>;
155 reset-gpios = <&main_gpio0 23 GPIO_ACTIVE_LOW>;
156 };
157
158 reg_pwm_fan: regulator-pwm-fan {
159 compatible = "regulator-fixed";
160 pinctrl-names = "default";
161 pinctrl-0 = <&pwm_fan_reg_pins>;
162 regulator-name = "FAN_PWR";
163 regulator-min-microvolt = <12000000>;
164 regulator-max-microvolt = <12000000>;
165 gpio = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
166 enable-active-high;
167 };
168
169 reg_sd: regulator-sd {
170 compatible = "regulator-fixed";
171 pinctrl-names = "default";
172 pinctrl-0 = <&main_mmc1_reg_pins>;
173 regulator-name = "V_3V3_SD";
174 regulator-min-microvolt = <3300000>;
175 regulator-max-microvolt = <3300000>;
176 gpio = <&main_gpio1 43 GPIO_ACTIVE_HIGH>;
177 enable-active-high;
178 };
179 };
180
181 &cpsw3g {
182 pinctrl-names = "default";
183 pinctrl-0 = <&cpsw_pins>;
184 status = "okay";
185 };
186
187 &cpsw_port1 {
188 phy-mode = "rgmii-rxid";
189 phy-handle = <&cpsw3g_phy0>;
190 status = "okay";
191 };
192
193 &cpsw3g_mdio {
194 pinctrl-names = "default";
195 pinctrl-0 = <&cpsw_mdio_pins>;
196 status = "okay";
197
198 cpsw3g_phy0: ethernet-phy@0 {
199 compatible = "ethernet-phy-ieee802.3-c22";
200 reg = <0>;
201 reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_LOW>;
202 reset-assert-us = <1000>;
203 reset-deassert-us = <1000>;
204 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
205 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
206 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
207 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
208 };
209 };
210
211 &epwm5 {
212 pinctrl-names = "default";
213 pinctrl-0 = <&epwm5_pins>;
214 status = "okay";
215 };
216
217 &icssg1_mdio {
218 pinctrl-names = "default";
219 pinctrl-0 = <&pru_icssg1_mdio_pins>;
220 status = "okay";
221
222 /* phy-mode is fixed up to rgmii-rxid by prueth driver to account for
223 * the SoC integration, so the only rx-internal-delay and no
224 * tx-internal-delay is set for the PHYs.
225 */
226
227 icssg1_phy03: ethernet-phy@3 {
228 compatible = "ethernet-phy-ieee802.3-c22";
229 reg = <0x3>;
230 reset-gpios = <&main_gpio1 47 GPIO_ACTIVE_LOW>;
231 reset-assert-us = <1000>;
232 reset-deassert-us = <1000>;
233 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
234 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
235 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
236 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
237 };
238
239 icssg1_phy0c: ethernet-phy@c {
240 compatible = "ethernet-phy-ieee802.3-c22";
241 reg = <0xc>;
242 reset-gpios = <&main_gpio1 51 GPIO_ACTIVE_LOW>;
243 reset-assert-us = <1000>;
244 reset-deassert-us = <1000>;
245 ti,rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
246 ti,tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
247 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
248 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
249 };
250 };
251
252
253 &main_gpio0 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&main_gpio0_digital_pins>,
256 <&main_gpio0_hog_pins>;
257 gpio-line-names =
258 "", "", "", "", /* 0-3 */
259 "", "", "", "", /* 4-7 */
260 "", "", "", "", /* 8-11 */
261 "", "", "", "", /* 12-15 */
262 "", "", "", "", /* 16-19 */
263 "", "", "", "", /* 20-23 */
264 "", "", "EN_DIG_OUT_1", "STATUS_OUT_1", /* 24-27 */
265 "EN_DIG_OUT_2", "STATUS_OUT_2", "EN_SIG_OUT_3", "", /* 28-31 */
266 "", "", "STATUS_OUT_3", "EN_DIG_OUT_4", /* 32-35 */
267 "", "", "STATUS_OUT_4", "DIG_IN_1", /* 36-39 */
268 "DIG_IN_2", "DIG_IN_3", "DIG_IN_4"; /* 40- */
269 };
270
271 &main_gpio1 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&main_gpio1_hog_pins>,
274 <&main_gpio1_pru_pins>;
275 gpio-line-names =
276 "", "", "", "", /* 0-3 */
277 "", "", "", "", /* 4-7 */
278 "", "", "", "", /* 8-11 */
279 "", "", "", "", /* 12-15 */
280 "", "", "", "", /* 16-19 */
281 "", "", "", "", /* 20-23 */
282 "", "", "", "", /* 24-27 */
283 "", "", "", "", /* 28-31 */
284 "", "", "", "", /* 32-35 */
285 "", "", "", "", /* 36-39 */
286 "", "", "", "", /* 40-43 */
287 "", "", "", "", /* 44-47 */
288 "", "", "", "", /* 48-51 */
289 "", "", "", "ADC_SYNC", /* 52-55 */
290 "", "", "ADC_RST#", "ADC_DATA_RDY", /* 56-59 */
291 "", "", "", "", /* 60-63 */
292 "", "", "", "ADC_INT#", /* 64-67 */
293 "BG95_PWRKEY", "BG95_RESET"; /* 68- */
294
295 line50-hog {
296 /* See also usb0 */
297 gpio-hog;
298 gpios = <50 0>;
299 line-name = "USB0_VBUS_OC#";
300 input;
301 };
302
303 line54-hog {
304 gpio-hog;
305 gpios = <54 0>;
306 line-name = "PRG0_MDIO_SWITCH";
307 output-low;
308 };
309
310 line70-hog {
311 gpio-hog;
312 gpios = <70 0>;
313 line-name = "PHY_INT#";
314 input;
315 };
316 };
317
318 &main_mcan0 {
319 pinctrl-names = "default";
320 pinctrl-0 = <&main_mcan0_pins>;
321 status = "okay";
322 };
323
324 &main_mcan1 {
325 pinctrl-names = "default";
326 pinctrl-0 = <&main_mcan1_pins>;
327 status = "okay";
328 };
329
330 &main_spi0 {
331 pinctrl-names = "default";
332 pinctrl-0 = <&main_spi0_pins>;
333 ti,pindir-d0-out-d1-in;
334 status = "okay";
335
336 /* adc@0: NXP NAFE13388 */
337 };
338
339 /* UART/USB adapter port 1 */
340 &main_uart0 {
341 pinctrl-names = "default";
342 pinctrl-0 = <&main_uart0_pins>;
343 status = "okay";
344 };
345
346 /*
347 * IOT Module - GNSS UART
348 *
349 * Note: We expect usage of a SYSFW that does not reserve UART1 for debug traces
350 */
351 &main_uart1 {
352 pinctrl-names = "default";
353 pinctrl-0 = <&main_uart1_pins>;
354 status = "okay";
355 };
356
357 /* RS485 port */
358 &main_uart2 {
359 pinctrl-names = "default";
360 pinctrl-0 = <&main_uart2_pins>;
361 linux,rs485-enabled-at-boot-time;
362 rs485-rts-active-low;
363 status = "okay";
364 };
365
366 /* Bluetooth module */
367 &main_uart3 {
368 pinctrl-names = "default";
369 pinctrl-0 = <&main_uart3_pins>;
370 /*
371 * Left disabled for now, until a way to deal with drivers and firmware
372 * for the combined WLAN/BT module has been figured out
373 */
374 };
375
376 /* IOT module - Main UART */
377 &main_uart4 {
378 pinctrl-names = "default";
379 pinctrl-0 = <&main_uart4_pins>;
380 status = "okay";
381 };
382
383 /* IOT module - DBG UART */
384 &main_uart5 {
385 pinctrl-names = "default";
386 pinctrl-0 = <&main_uart5_pins>;
387 status = "okay";
388 };
389
390 &main0_thermal {
391 trips {
392 main0_active0: trip-active0 {
393 temperature = <40000>;
394 hysteresis = <5000>;
395 type = "active";
396 };
397
398 main0_active1: trip-active1 {
399 temperature = <48000>;
400 hysteresis = <3000>;
401 type = "active";
402 };
403
404 main0_active2: trip-active2 {
405 temperature = <60000>;
406 hysteresis = <10000>;
407 type = "active";
408 };
409 };
410
411 cooling-maps {
412 map1 {
413 trip = <&main0_active0>;
414 cooling-device = <&fan0 1 1>;
415 };
416
417 map2 {
418 trip = <&main0_active1>;
419 cooling-device = <&fan0 2 2>;
420 };
421
422 map3 {
423 trip = <&main0_active2>;
424 cooling-device = <&fan0 3 3>;
425 };
426 };
427 };
428
429 &main1_thermal {
430 trips {
431 main1_active0: trip-active0 {
432 temperature = <40000>;
433 hysteresis = <5000>;
434 type = "active";
435 };
436
437 main1_active1: trip-active1 {
438 temperature = <48000>;
439 hysteresis = <3000>;
440 type = "active";
441 };
442
443 main1_active2: trip-active2 {
444 temperature = <60000>;
445 hysteresis = <10000>;
446 type = "active";
447 };
448 };
449
450 cooling-maps {
451 map1 {
452 trip = <&main1_active0>;
453 cooling-device = <&fan0 1 1>;
454 };
455
456 map2 {
457 trip = <&main1_active1>;
458 cooling-device = <&fan0 2 2>;
459 };
460
461 map3 {
462 trip = <&main1_active2>;
463 cooling-device = <&fan0 3 3>;
464 };
465 };
466 };
467
468 &mcu_gpio0 {
469 pinctrl-names = "default";
470 pinctrl-0 = <&mcu_gpio0_pins>;
471 };
472
473 &mcu_i2c0 {
474 pinctrl-names = "default";
475 pinctrl-0 = <&mcu_i2c0_pins>;
476 /* Left disabled: not functional without external pullup */
477 };
478
479 &mcu_spi0 {
480 pinctrl-names = "default";
481 pinctrl-0 = <&mcu_spi0_pins>;
482 ti,pindir-d0-out-d1-in;
483 status = "okay";
484 };
485
486 /* UART/USB adapter port 2 */
487 &mcu_uart0 {
488 pinctrl-names = "default";
489 pinctrl-0 = <&mcu_uart0_pins>;
490 status = "okay";
491 };
492
493 /* Pin header */
494 &mcu_uart1 {
495 pinctrl-names = "default";
496 pinctrl-0 = <&mcu_uart1_pins>;
497 status = "okay";
498 };
499
500 &serdes_ln_ctrl {
501 idle-states = <AM64_SERDES0_LANE0_USB>;
502 };
503
504 &serdes0 {
505 serdes0_usb_link: phy@0 {
506 reg = <0>;
507 #phy-cells = <0>;
508 resets = <&serdes_wiz0 1>;
509 cdns,num-lanes = <1>;
510 cdns,phy-type = <PHY_TYPE_USB3>;
511 };
512 };
513
514 &sdhci1 {
515 pinctrl-names = "default";
516 pinctrl-0 = <&main_mmc1_pins>;
517 bus-width = <4>;
518 cd-gpios = <&main_gpio1 77 GPIO_ACTIVE_LOW>;
519 disable-wp;
520 no-mmc;
521 ti,fails-without-test-cd;
522 /* Enabled by overlay */
523 };
524
525 &tscadc0 {
526 status = "okay";
527 adc {
528 ti,adc-channels = <0 1 2 3 4 5 6 7>;
529 };
530 };
531
532 &usb0 {
533 /*
534 * The CDNS USB driver currently doesn't support overcurrent GPIOs,
535 * so there is no overcurrent detection. The OC pin is configured
536 * as a GPIO hog instead.
537 */
538 pinctrl-names = "default";
539 pinctrl-0 = <&main_usb0_pins>;
540 dr_mode = "otg";
541 maximum-speed = "super-speed";
542 phys = <&serdes0_usb_link>;
543 phy-names = "cdns3,usb3-phy";
544 };
545
546 &usbss0 {
547 ti,vbus-divider;
548 };
549
550 &main_pmx0 {
551 cpsw_pins: cpsw-pins {
552 pinctrl-single,pins = <
553 /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
554 AM64X_IOPAD(0x01cc, PIN_INPUT, 4)
555 /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
556 AM64X_IOPAD(0x01d4, PIN_INPUT, 4)
557 /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
558 AM64X_IOPAD(0x01d8, PIN_INPUT, 4)
559 /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
560 AM64X_IOPAD(0x01f4, PIN_INPUT, 4)
561 /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
562 AM64X_IOPAD(0x0188, PIN_INPUT, 4)
563 /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
564 AM64X_IOPAD(0x0184, PIN_INPUT, 4)
565 /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
566 AM64X_IOPAD(0x0124, PIN_OUTPUT, 4)
567 /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
568 AM64X_IOPAD(0x012c, PIN_OUTPUT, 4)
569 /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
570 AM64X_IOPAD(0x0130, PIN_OUTPUT, 4)
571 /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
572 AM64X_IOPAD(0x014c, PIN_OUTPUT, 4)
573 /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
574 AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4)
575 /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
576 AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4)
577 >;
578 };
579
580 cpsw_mdio_pins: cpsw-mdio-pins {
581 pinctrl-single,pins = <
582 /* (R21) GPMC0_CSn3.GPIO0_44 - RESET_RGMII1# */
583 AM64X_IOPAD(0x00b4, PIN_OUTPUT, 7)
584
585 /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
586 AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4)
587 /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
588 AM64X_IOPAD(0x01f8, PIN_INPUT, 4)
589 >;
590 };
591
592 epwm5_pins: epwm5-pins {
593 pinctrl-single,pins = <
594 /* (W19) GPMC0_WAIT0.EHRPWM5_B */
595 AM64X_IOPAD(0x0098, PIN_OUTPUT, 3)
596 >;
597 };
598
599 /* Digital IOs */
600 main_gpio0_digital_pins: main-gpio0-digital-pins {
601 pinctrl-single,pins = <
602 /* (W20) GPMC0_AD11.GPIO0_26 - EN_DIG_OUT_1 */
603 AM64X_IOPAD(0x0068, PIN_OUTPUT, 7)
604 /* (W21) GPMC0_AD12.GPIO0_27 - STATUS_OUT_1 */
605 AM64X_IOPAD(0x006c, PIN_INPUT, 7)
606 /* (V18) GPMC0_AD13.GPIO0_28 - EN_DIG_OUT_2 */
607 AM64X_IOPAD(0x0070, PIN_OUTPUT, 7)
608 /* (Y21) GPMC0_AD14.GPIO0_29 - STATUS_OUT_2 */
609 AM64X_IOPAD(0x0074, PIN_INPUT, 7)
610 /* (Y20) GPMC0_AD15.GPIO0_30 - EN_DIG_OUT_3 */
611 AM64X_IOPAD(0x0078, PIN_OUTPUT, 7)
612 /* (T21) GPMC0_WEn.GPIO0_34 - STATUS_OUT_3 */
613 AM64X_IOPAD(0x008c, PIN_INPUT, 7)
614 /* (P17) GPMC0_BE0n_CLE.GPIO0_35 - EN_DIG_OUT_4 */
615 AM64X_IOPAD(0x0090, PIN_OUTPUT, 7)
616 /* (Y18) GPMC0_WAIT1.GPIO0_38 - STATUS_OUT_4 */
617 AM64X_IOPAD(0x009c, PIN_INPUT, 7)
618 /* (N16) GPMC0_WPn.GPIO0_39 - DIG_IN_1 */
619 AM64X_IOPAD(0x00a0, PIN_INPUT, 7)
620 /* (N17) GPMC0_DIR.GPIO0_40 - DIG_IN_2 */
621 AM64X_IOPAD(0x00a4, PIN_INPUT, 7)
622 /* (R19) GPMC0_CSn0.GPIO0_41 - DIG_IN_3 */
623 AM64X_IOPAD(0x00a8, PIN_INPUT, 7)
624 /* (R20) GPMC0_CSn1.GPIO0_42 - DIG_IN_4 */
625 AM64X_IOPAD(0x00ac, PIN_INPUT, 7)
626 >;
627 };
628
629 main_gpio0_hog_pins: main-gpio0-hog-pins {
630 pinctrl-single,pins = <
631 /* (P19) GPMC0_CSn2.GPIO0_43 - MMC1_CTRL */
632 AM64X_IOPAD(0x00b0, PIN_OUTPUT, 7)
633 >;
634 };
635
636 main_gpio1_hog_pins: main-gpio1-hog-pins {
637 pinctrl-single,pins = <
638 /* (B15) SPI1_D0.GPIO1_50 - USB0_VBUS_OC# */
639 AM64X_IOPAD(0x0228, PIN_INPUT, 7)
640 /* (B16) UART0_CTSn.GPIO1_54 - PRG0_MDIO_SWITCH */
641 AM64X_IOPAD(0x0238, PIN_OUTPUT, 7)
642 /* (C19) EXTINTn.GPIO1_70 - PHY_INT# */
643 AM64X_IOPAD(0x0278, PIN_INPUT, 7)
644 >;
645 };
646
647 main_gpio1_pru_pins: main-gpio1-pru-pins {
648 pinctrl-single,pins = <
649 /* (Y1) PRG0_PRU0_GPO0.GPIO1_0 */
650 AM64X_IOPAD(0x0160, PIN_INPUT, 7)
651 /* (R4) PRG0_PRU0_GPO1.GPIO1_1 */
652 AM64X_IOPAD(0x0164, PIN_INPUT, 7)
653 /* (U2) PRG0_PRU0_GPO2.GPIO1_2 */
654 AM64X_IOPAD(0x0168, PIN_INPUT, 7)
655 /* (V2) PRG0_PRU0_GPO3.GPIO1_3 */
656 AM64X_IOPAD(0x016c, PIN_INPUT, 7)
657 /* (AA2) PRG0_PRU0_GPO4.GPIO1_4 */
658 AM64X_IOPAD(0x0170, PIN_INPUT, 7)
659 /* (R3) PRG0_PRU0_GPO5.GPIO1_5 */
660 AM64X_IOPAD(0x0174, PIN_INPUT, 7)
661 /* (T3) PRG0_PRU0_GPO6.GPIO1_6 */
662 AM64X_IOPAD(0x0178, PIN_INPUT, 7)
663 /* (T1) PRG0_PRU0_GPO7.GPIO1_7 */
664 AM64X_IOPAD(0x017c, PIN_INPUT, 7)
665 /* (T2) PRG0_PRU0_GPO8.GPIO1_8 */
666 AM64X_IOPAD(0x0180, PIN_INPUT, 7)
667 /* (Y3) PRG0_PRU0_GPO11.GPIO1_11 */
668 AM64X_IOPAD(0x018c, PIN_INPUT, 7)
669 /* (AA3) PRG0_PRU0_GPO12.GPIO1_12 */
670 AM64X_IOPAD(0x0190, PIN_INPUT, 7)
671 /* (R6) PRG0_PRU0_GPO13.GPIO1_13 */
672 AM64X_IOPAD(0x0194, PIN_INPUT, 7)
673 /* (V4) PRG0_PRU0_GPO14.GPIO1_14 */
674 AM64X_IOPAD(0x0198, PIN_INPUT, 7)
675 /* (T5) PRG0_PRU0_GPO15.GPIO1_15 */
676 AM64X_IOPAD(0x019c, PIN_INPUT, 7)
677 /* (U4) PRG0_PRU0_GPO16.GPIO1_16 */
678 AM64X_IOPAD(0x01a0, PIN_INPUT, 7)
679 /* (U1) PRG0_PRU0_GPO17.GPIO1_17 */
680 AM64X_IOPAD(0x01a4, PIN_INPUT, 7)
681 /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */
682 AM64X_IOPAD(0x01a8, PIN_INPUT, 7)
683 /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */
684 AM64X_IOPAD(0x01ac, PIN_INPUT, 7)
685 /* (Y2) PRG0_PRU1_GPO0.GPIO1_20 */
686 AM64X_IOPAD(0x01b0, PIN_INPUT, 7)
687 /* (W2) PRG0_PRU1_GPO1.GPIO1_21 */
688 AM64X_IOPAD(0x01b4, PIN_INPUT, 7)
689 /* (V3) PRG0_PRU1_GPO2.GPIO1_22 */
690 AM64X_IOPAD(0x01b8, PIN_INPUT, 7)
691 /* (T4) PRG0_PRU1_GPO3.GPIO1_23 */
692 AM64X_IOPAD(0x01bc, PIN_INPUT, 7)
693 /* (W3) PRG0_PRU1_GPO4.GPIO1_24 */
694 AM64X_IOPAD(0x01c0, PIN_INPUT, 7)
695 /* (P4) PRG0_PRU1_GPO5.GPIO1_25 */
696 AM64X_IOPAD(0x01c4, PIN_INPUT, 7)
697 /* (R5) PRG0_PRU1_GPO6.GPIO1_26 */
698 AM64X_IOPAD(0x01c8, PIN_INPUT, 7)
699 /* (R1) PRG0_PRU1_GPO8.GPIO1_28 */
700 AM64X_IOPAD(0x01d0, PIN_INPUT, 7)
701 /* (W4) PRG0_PRU1_GPO11.GPIO1_31 */
702 AM64X_IOPAD(0x01dc, PIN_INPUT, 7)
703 /* (Y4) PRG0_PRU1_GPO12.GPIO1_32 */
704 AM64X_IOPAD(0x01e0, PIN_INPUT, 7)
705 /* (T6) PRG0_PRU1_GPO13.GPIO1_33 */
706 AM64X_IOPAD(0x01e4, PIN_INPUT, 7)
707 /* (U6) PRG0_PRU1_GPO14.GPIO1_34 */
708 AM64X_IOPAD(0x01e8, PIN_INPUT, 7)
709 /* (U5) PRG0_PRU1_GPO15.GPIO1_35 */
710 AM64X_IOPAD(0x01ec, PIN_INPUT, 7)
711 /* (AA4) PRG0_PRU1_GPO16.GPIO1_36 */
712 AM64X_IOPAD(0x01f0, PIN_INPUT, 7)
713 /* (P2) PRG0_MDIO0_MDIO.GPIO1_40 */
714 AM64X_IOPAD(0x0200, PIN_INPUT, 7)
715 /* (P3) PRG0_MDIO0_MDC.GPIO1_41 */
716 AM64X_IOPAD(0x0204, PIN_INPUT, 7)
717 >;
718 };
719
720 main_mcan0_pins: main-mcan0-pins {
721 pinctrl-single,pins = <
722 /* (B17) MCAN0_RX */
723 AM64X_IOPAD(0x0254, PIN_INPUT, 0)
724 /* (A17) MCAN0_TX */
725 AM64X_IOPAD(0x0250, PIN_OUTPUT, 0)
726 >;
727 };
728
729 main_mcan1_pins: main-mcan1-pins {
730 pinctrl-single,pins = <
731 /* (D17) MCAN1_RX */
732 AM64X_IOPAD(0x025c, PIN_INPUT, 0)
733 /* (C17) MCAN1_TX */
734 AM64X_IOPAD(0x0258, PIN_OUTPUT, 0)
735 >;
736 };
737
738 main_mmc1_pins: main-mmc1-pins {
739 pinctrl-single,pins = <
740 /* (J19) MMC1_CMD */
741 AM64X_IOPAD(0x0294, PIN_INPUT, 0)
742 /* (L20) MMC1_CLK */
743 AM64X_IOPAD(0x028c, PIN_INPUT, 0)
744 /* (K21) MMC1_DAT0 */
745 AM64X_IOPAD(0x0288, PIN_INPUT, 0)
746 /* (L21) MMC1_DAT1 */
747 AM64X_IOPAD(0x0284, PIN_INPUT, 0)
748 /* (K19) MMC1_DAT2 */
749 AM64X_IOPAD(0x0280, PIN_INPUT, 0)
750 /* (K18) MMC1_DAT3 */
751 AM64X_IOPAD(0x027c, PIN_INPUT, 0)
752 /* (D19) MMC1_SDCD.GPIO1_77 */
753 AM64X_IOPAD(0x0298, PIN_INPUT, 7)
754 /* (#N/A) MMC1_CLKLB */
755 AM64X_IOPAD(0x0290, PIN_INPUT, 0)
756 >;
757 };
758
759 main_mmc1_reg_pins: main-mmc1-reg-pins {
760 pinctrl-single,pins = <
761 /* (C13) SPI0_CS1.GPIO1_43 - MMC1_SD_EN */
762 AM64X_IOPAD(0x020c, PIN_OUTPUT, 7)
763 >;
764 };
765
766 main_mmc1_wifi_pwrseq_pins: main-mmc1-wifi-pwrseq-pins {
767 pinctrl-single,pins = <
768 /* (V19) GPMC0_AD8.GPIO0_23 - WIFI-BT_EN */
769 AM64X_IOPAD(0x005c, PIN_OUTPUT, 7)
770 >;
771 };
772
773 main_spi0_pins: main-spi0-pins {
774 pinctrl-single,pins = <
775 /* (D13) SPI0_CLK */
776 AM64X_IOPAD(0x0210, PIN_OUTPUT, 0)
777 /* (D12) SPI0_CS0 */
778 AM64X_IOPAD(0x0208, PIN_OUTPUT, 0)
779 /* (A13) SPI0_D0 */
780 AM64X_IOPAD(0x0214, PIN_OUTPUT, 0)
781 /* (A14) SPI0_D1 */
782 AM64X_IOPAD(0x0218, PIN_INPUT, 0)
783 >;
784 };
785
786 main_spi0_adc_pins: main-spi0-adc-pins {
787 pinctrl-single,pins = <
788 /* (A16) UART0_RTSn.GPIO1_55 - ADC_SYNC */
789 AM64X_IOPAD(0x023c, PIN_INPUT, 7)
790 /* (D16) UART1_CTSn.GPIO1_58 - ADC_RST# */
791 AM64X_IOPAD(0x0248, PIN_OUTPUT, 7)
792 /* (E16) UART1_RTSn.GPIO1_59 - ADC_DATA_RDY */
793 AM64X_IOPAD(0x024c, PIN_INPUT, 7)
794 /* (B19) I2C1_SDA.GPIO1_67 - ADC_INT# */
795 AM64X_IOPAD(0x026c, PIN_INPUT, 7)
796 >;
797 };
798
799 main_uart0_pins: main-uart0-pins {
800 pinctrl-single,pins = <
801 /* (D15) UART0_RXD */
802 AM64X_IOPAD(0x0230, PIN_INPUT, 0)
803 /* (C16) UART0_TXD */
804 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0)
805 >;
806 };
807
808 main_uart1_pins: main-uart1-pins {
809 pinctrl-single,pins = <
810 /* (E15) UART1_RXD */
811 AM64X_IOPAD(0x0240, PIN_INPUT, 0)
812 /* (E14) UART1_TXD */
813 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0)
814 >;
815 };
816
817 main_uart2_pins: main-uart2-pins {
818 pinctrl-single,pins = <
819 /* (T18) GPMC0_AD2.UART2_RTSn */
820 AM64X_IOPAD(0x0044, PIN_OUTPUT, 2)
821 /* (T20) GPMC0_AD0.UART2_RXD */
822 AM64X_IOPAD(0x003c, PIN_INPUT, 2)
823 /* (U21) GPMC0_AD1.UART2_TXD */
824 AM64X_IOPAD(0x0040, PIN_OUTPUT, 2)
825 >;
826 };
827
828 main_uart3_pins: main-uart3-pins {
829 pinctrl-single,pins = <
830 /* (T17) GPMC0_AD9.UART3_CTSn */
831 AM64X_IOPAD(0x0060, PIN_INPUT, 2)
832 /* (U19) GPMC0_AD5.UART3_RTSn */
833 AM64X_IOPAD(0x0050, PIN_OUTPUT, 2)
834 /* (U20) GPMC0_AD3.UART3_RXD */
835 AM64X_IOPAD(0x0048, PIN_INPUT, 2)
836 /* (U18) GPMC0_AD4.UART3_TXD */
837 AM64X_IOPAD(0x004c, PIN_OUTPUT, 2)
838 >;
839 };
840
841 main_uart4_pins: main-uart4-pins {
842 pinctrl-single,pins = <
843 /* (R16) GPMC0_AD10.UART4_CTSn */
844 AM64X_IOPAD(0x0064, PIN_INPUT, 2)
845 /* (R17) GPMC0_CLK.UART4_RTSn */
846 AM64X_IOPAD(0x007c, PIN_OUTPUT, 2)
847 /* (V20) GPMC0_AD6.UART4_RXD */
848 AM64X_IOPAD(0x0054, PIN_INPUT, 2)
849 /* (V21) GPMC0_AD7.UART4_TXD */
850 AM64X_IOPAD(0x0058, PIN_OUTPUT, 2)
851
852 /* Control GPIOs for IOT Module connected to UART4 */
853 /* (D18) ECAP0_IN_APWM_OUT.GPIO1_68 - BG95_PWRKEY */
854 AM64X_IOPAD(0x0270, PIN_OUTPUT, 7)
855 /* (A19) EXT_REFCLK1.GPIO1_69 - BG95_RESET */
856 AM64X_IOPAD(0x0274, PIN_OUTPUT, 7)
857 >;
858 };
859
860 main_uart5_pins: main-uart5-pins {
861 pinctrl-single,pins = <
862 /* (P16) GPMC0_ADVn_ALE.UART5_RXD */
863 AM64X_IOPAD(0x0084, PIN_INPUT, 2)
864 /* (R18) GPMC0_OEn_REn.UART5_TXD */
865 AM64X_IOPAD(0x0088, PIN_OUTPUT, 2)
866 >;
867 };
868
869 main_usb0_pins: main-usb0-pins {
870 pinctrl-single,pins = <
871 /* (E19) USB0_DRVVBUS */
872 AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0)
873 >;
874 };
875
876 pru_icssg1_mdio_pins: pru-icssg1-mdio-pins {
877 pinctrl-single,pins = <
878 /* (A15) SPI1_D1.GPIO1_51 - RESET_PRG1_RGMII1# */
879 AM64X_IOPAD(0x022c, PIN_OUTPUT, 7)
880 /* (B14) SPI1_CS0.GPIO1_47 - RESET_PRG1_RGMII2# */
881 AM64X_IOPAD(0x021c, PIN_OUTPUT, 7)
882
883 /* (Y6) PRG1_MDIO0_MDC */
884 AM64X_IOPAD(0x015c, PIN_OUTPUT, 0)
885 /* (AA6) PRG1_MDIO0_MDIO */
886 AM64X_IOPAD(0x0158, PIN_INPUT, 0)
887 >;
888 };
889
890 pru_icssg1_rgmii1_pins: pru-icssg1-rgmii1-pins {
891 pinctrl-single,pins = <
892 /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
893 AM64X_IOPAD(0x00b8, PIN_INPUT, 2)
894 /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
895 AM64X_IOPAD(0x00bc, PIN_INPUT, 2)
896 /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
897 AM64X_IOPAD(0x00c0, PIN_INPUT, 2)
898 /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
899 AM64X_IOPAD(0x00c4, PIN_INPUT, 2)
900 /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
901 AM64X_IOPAD(0x00d0, PIN_INPUT, 2)
902 /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */
903 AM64X_IOPAD(0x00c8, PIN_INPUT, 2)
904 /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */
905 AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2)
906 /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */
907 AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2)
908 /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */
909 AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2)
910 /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */
911 AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2)
912 /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
913 AM64X_IOPAD(0x00f8, PIN_OUTPUT, 2)
914 /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */
915 AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2)
916 >;
917 };
918
919 pru_icssg1_rgmii2_pins: pru-icssg1-rgmii2-pins {
920 pinctrl-single,pins = <
921 /* (W11) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
922 AM64X_IOPAD(0x0108, PIN_INPUT, 2)
923 /* (V11) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
924 AM64X_IOPAD(0x010c, PIN_INPUT, 2)
925 /* (AA12) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
926 AM64X_IOPAD(0x0110, PIN_INPUT, 2)
927 /* (Y12) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
928 AM64X_IOPAD(0x0114, PIN_INPUT, 2)
929 /* (U11) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
930 AM64X_IOPAD(0x0120, PIN_INPUT, 2)
931 /* (W12) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
932 AM64X_IOPAD(0x0118, PIN_INPUT, 2)
933 /* (AA10) PRG1_PRU1_GPO11.PRG1_RGMII2_TD0 */
934 AM64X_IOPAD(0x0134, PIN_OUTPUT, 2)
935 /* (V10) PRG1_PRU1_GPO12.PRG1_RGMII2_TD1 */
936 AM64X_IOPAD(0x0138, PIN_OUTPUT, 2)
937 /* (U10) PRG1_PRU1_GPO13.PRG1_RGMII2_TD2 */
938 AM64X_IOPAD(0x013c, PIN_OUTPUT, 2)
939 /* (AA11) PRG1_PRU1_GPO14.PRG1_RGMII2_TD3 */
940 AM64X_IOPAD(0x0140, PIN_OUTPUT, 2)
941 /* (Y10) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
942 AM64X_IOPAD(0x0148, PIN_OUTPUT, 2)
943 /* (Y11) PRG1_PRU1_GPO15.PRG1_RGMII2_TX_CTL */
944 AM64X_IOPAD(0x0144, PIN_OUTPUT, 2)
945 >;
946 };
947
948 pwm_fan_pins: pwm-fan-pins {
949 pinctrl-single,pins = <
950 /* (T19) GPMC0_BE1n.EHRPWM5_A */
951 AM64X_IOPAD(0x0094, PIN_OUTPUT, 3)
952 /* (C14) SPI1_CLK.GPIO1_49 - FAN_RPM */
953 AM64X_IOPAD(0x0224, PIN_INPUT, 7)
954 >;
955 };
956
957 pwm_fan_reg_pins: pwm-fan-reg-pins {
958 pinctrl-single,pins = <
959 /* (D14) SPI1_CS1.GPIO1_48 - FAN_PWR */
960 AM64X_IOPAD(0x0220, PIN_OUTPUT, 7)
961 >;
962 };
963 };
964
965 &mcu_pmx0 {
966 mcu_gpio_keys_pins: mcu-gpio-keys-pins {
967 pinctrl-single,pins = <
968 /* (A7) MCU_SPI1_CS0.MCU_GPIO0_5 */
969 AM64X_MCU_IOPAD(0x0014, PIN_INPUT, 7)
970 >;
971 };
972
973 mcu_gpio_leds_pins: mcu-gpio-leds-pins {
974 pinctrl-single,pins = <
975 /* (C7) MCU_SPI1_D0.MCU_GPIO0_8 */
976 AM64X_MCU_IOPAD(0x0020, PIN_OUTPUT, 7)
977 /* (C8) MCU_SPI1_D1.MCU_GPIO0_9 */
978 AM64X_MCU_IOPAD(0x0024, PIN_OUTPUT, 7)
979 >;
980 };
981
982 mcu_gpio0_pins: mcu-gpio0-pins {
983 pinctrl-single,pins = <
984 /* (E8) MCU_UART0_RTSn.MCU_GPIO0_0 */
985 AM64X_MCU_IOPAD(0x0034, PIN_INPUT, 7)
986 /* (D8) MCU_UART0_CTSn.MCU_GPIO0_1 */
987 AM64X_MCU_IOPAD(0x0030, PIN_INPUT, 7)
988 /* (B7) MCU_SPI1_CS1.MCU_GPIO0_6 */
989 AM64X_MCU_IOPAD(0x0018, PIN_INPUT, 7)
990 /* (D7) MCU_SPI1_CLK.MCU_GPIO0_7 */
991 AM64X_MCU_IOPAD(0x001c, PIN_INPUT, 7)
992 /* (A11) MCU_I2C1_SCL.MCU_GPIO0_20 */
993 AM64X_MCU_IOPAD(0x0050, PIN_INPUT, 7)
994 /* (B10) MCU_I2C1_SDA.MCU_GPIO0_21 */
995 AM64X_MCU_IOPAD(0x0054, PIN_INPUT, 7)
996 >;
997 };
998
999 mcu_i2c0_pins: mcu-i2c0-pins {
1000 pinctrl-single,pins = <
1001 /* (E9) MCU_I2C0_SCL */
1002 AM64X_MCU_IOPAD(0x0048, PIN_INPUT, 0)
1003 /* (A10) MCU_I2C0_SDA */
1004 AM64X_MCU_IOPAD(0x004c, PIN_INPUT, 0)
1005 >;
1006 };
1007
1008 mcu_spi0_pins: mcu-spi0-pins {
1009 pinctrl-single,pins = <
1010 /* (E6) MCU_SPI0_CLK */
1011 AM64X_MCU_IOPAD(0x0008, PIN_OUTPUT, 0)
1012 /* (D6) MCU_SPI0_CS0 */
1013 AM64X_MCU_IOPAD(0x0000, PIN_OUTPUT, 0)
1014 /* (C6) MCU_SPI0_CS1 */
1015 AM64X_MCU_IOPAD(0x0004, PIN_OUTPUT, 0)
1016 /* (E7) MCU_SPI0_D0 */
1017 AM64X_MCU_IOPAD(0x000c, PIN_OUTPUT, 0)
1018 /* (B6) MCU_SPI0_D1 */
1019 AM64X_MCU_IOPAD(0x0010, PIN_INPUT, 0)
1020 >;
1021 };
1022
1023 mcu_uart0_pins: mcu-uart0-pins {
1024 pinctrl-single,pins = <
1025 /* (A9) MCU_UART0_RXD */
1026 AM64X_MCU_IOPAD(0x0028, PIN_INPUT, 0)
1027 /* (A8) MCU_UART0_TXD */
1028 AM64X_MCU_IOPAD(0x002c, PIN_OUTPUT, 0)
1029 >;
1030 };
1031
1032 mcu_uart1_pins: mcu-uart1-pins {
1033 pinctrl-single,pins = <
1034 /* (B8) MCU_UART1_CTSn */
1035 AM64X_MCU_IOPAD(0x0040, PIN_INPUT, 0)
1036 /* (B9) MCU_UART1_RTSn */
1037 AM64X_MCU_IOPAD(0x0044, PIN_OUTPUT, 0)
1038 /* (C9) MCU_UART1_RXD */
1039 AM64X_MCU_IOPAD(0x0038, PIN_INPUT, 0)
1040 /* (D9) MCU_UART1_TXD */
1041 AM64X_MCU_IOPAD(0x003c, PIN_OUTPUT, 0)
1042 >;
1043 };
1044 };
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