1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2 #ifndef DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H 3 #define DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H 4 5 #define EP93XX_CLK_PLL1 0 6 #define EP93XX_CLK_PLL2 1 7 8 #define EP93XX_CLK_FCLK 2 9 #define EP93XX_CLK_HCLK 3 10 #define EP93XX_CLK_PCLK 4 11 12 #define EP93XX_CLK_UART 5 13 #define EP93XX_CLK_SPI 6 14 #define EP93XX_CLK_PWM 7 15 #define EP93XX_CLK_USB 8 16 17 #define EP93XX_CLK_M2M0 9 18 #define EP93XX_CLK_M2M1 10 19 20 #define EP93XX_CLK_M2P0 11 21 #define EP93XX_CLK_M2P1 12 22 #define EP93XX_CLK_M2P2 13 23 #define EP93XX_CLK_M2P3 14 24 #define EP93XX_CLK_M2P4 15 25 #define EP93XX_CLK_M2P5 16 26 #define EP93XX_CLK_M2P6 17 27 #define EP93XX_CLK_M2P7 18 28 #define EP93XX_CLK_M2P8 19 29 #define EP93XX_CLK_M2P9 20 30 31 #define EP93XX_CLK_UART1 21 32 #define EP93XX_CLK_UART2 22 33 #define EP93XX_CLK_UART3 23 34 35 #define EP93XX_CLK_ADC 24 36 #define EP93XX_CLK_ADC_EN 25 37 38 #define EP93XX_CLK_KEYPAD 26 39 40 #define EP93XX_CLK_VIDEO 27 41 42 #define EP93XX_CLK_I2S_MCLK 28 43 #define EP93XX_CLK_I2S_SCLK 29 44 #define EP93XX_CLK_I2S_LRCLK 30 45 46 #endif /* DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H */ 47
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