1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Linaro Limited 5 */ 6 7 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H 8 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8550_H 9 10 #define MASTER_QSPI_0 0 11 #define MASTER_QUP_1 1 12 #define MASTER_SDCC_4 2 13 #define MASTER_UFS_MEM 3 14 #define MASTER_USB3_0 4 15 #define SLAVE_A1NOC_SNOC 5 16 17 #define MASTER_QDSS_BAM 0 18 #define MASTER_QUP_2 1 19 #define MASTER_CRYPTO 2 20 #define MASTER_IPA 3 21 #define MASTER_SP 4 22 #define MASTER_QDSS_ETR 5 23 #define MASTER_QDSS_ETR_1 6 24 #define MASTER_SDCC_2 7 25 #define SLAVE_A2NOC_SNOC 8 26 27 #define MASTER_QUP_CORE_0 0 28 #define MASTER_QUP_CORE_1 1 29 #define MASTER_QUP_CORE_2 2 30 #define SLAVE_QUP_CORE_0 3 31 #define SLAVE_QUP_CORE_1 4 32 #define SLAVE_QUP_CORE_2 5 33 34 #define MASTER_CNOC_CFG 0 35 #define SLAVE_AHB2PHY_SOUTH 1 36 #define SLAVE_AHB2PHY_NORTH 2 37 #define SLAVE_APPSS 3 38 #define SLAVE_CAMERA_CFG 4 39 #define SLAVE_CLK_CTL 5 40 #define SLAVE_RBCPR_CX_CFG 6 41 #define SLAVE_RBCPR_MMCX_CFG 7 42 #define SLAVE_RBCPR_MXA_CFG 8 43 #define SLAVE_RBCPR_MXC_CFG 9 44 #define SLAVE_CPR_NSPCX 10 45 #define SLAVE_CRYPTO_0_CFG 11 46 #define SLAVE_CX_RDPM 12 47 #define SLAVE_DISPLAY_CFG 13 48 #define SLAVE_GFX3D_CFG 14 49 #define SLAVE_I2C 15 50 #define SLAVE_IMEM_CFG 16 51 #define SLAVE_IPA_CFG 17 52 #define SLAVE_IPC_ROUTER_CFG 18 53 #define SLAVE_CNOC_MSS 19 54 #define SLAVE_MX_RDPM 20 55 #define SLAVE_PCIE_0_CFG 21 56 #define SLAVE_PCIE_1_CFG 22 57 #define SLAVE_PDM 23 58 #define SLAVE_PIMEM_CFG 24 59 #define SLAVE_PRNG 25 60 #define SLAVE_QDSS_CFG 26 61 #define SLAVE_QSPI_0 27 62 #define SLAVE_QUP_1 28 63 #define SLAVE_QUP_2 29 64 #define SLAVE_SDCC_2 30 65 #define SLAVE_SDCC_4 31 66 #define SLAVE_SPSS_CFG 32 67 #define SLAVE_TCSR 33 68 #define SLAVE_TLMM 34 69 #define SLAVE_UFS_MEM_CFG 35 70 #define SLAVE_USB3_0 36 71 #define SLAVE_VENUS_CFG 37 72 #define SLAVE_VSENSE_CTRL_CFG 38 73 #define SLAVE_LPASS_QTB_CFG 39 74 #define SLAVE_CNOC_MNOC_CFG 40 75 #define SLAVE_NSP_QTB_CFG 41 76 #define SLAVE_PCIE_ANOC_CFG 42 77 #define SLAVE_QDSS_STM 43 78 #define SLAVE_TCU 44 79 80 #define MASTER_GEM_NOC_CNOC 0 81 #define MASTER_GEM_NOC_PCIE_SNOC 1 82 #define SLAVE_AOSS 2 83 #define SLAVE_TME_CFG 3 84 #define SLAVE_CNOC_CFG 4 85 #define SLAVE_DDRSS_CFG 5 86 #define SLAVE_BOOT_IMEM 6 87 #define SLAVE_IMEM 7 88 #define SLAVE_PCIE_0 8 89 #define SLAVE_PCIE_1 9 90 91 #define MASTER_GPU_TCU 0 92 #define MASTER_SYS_TCU 1 93 #define MASTER_APPSS_PROC 2 94 #define MASTER_GFX3D 3 95 #define MASTER_LPASS_GEM_NOC 4 96 #define MASTER_MSS_PROC 5 97 #define MASTER_MNOC_HF_MEM_NOC 6 98 #define MASTER_MNOC_SF_MEM_NOC 7 99 #define MASTER_COMPUTE_NOC 8 100 #define MASTER_ANOC_PCIE_GEM_NOC 9 101 #define MASTER_SNOC_GC_MEM_NOC 10 102 #define MASTER_SNOC_SF_MEM_NOC 11 103 #define SLAVE_GEM_NOC_CNOC 12 104 #define SLAVE_LLCC 13 105 #define SLAVE_MEM_NOC_PCIE_SNOC 14 106 #define MASTER_MNOC_HF_MEM_NOC_DISP 15 107 #define MASTER_ANOC_PCIE_GEM_NOC_DISP 16 108 #define SLAVE_LLCC_DISP 17 109 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_0 18 110 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_0 19 111 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_0 20 112 #define SLAVE_LLCC_CAM_IFE_0 21 113 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_1 22 114 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_1 23 115 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_1 24 116 #define SLAVE_LLCC_CAM_IFE_1 25 117 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_2 26 118 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_2 27 119 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_2 28 120 #define SLAVE_LLCC_CAM_IFE_2 29 121 122 #define MASTER_LPIAON_NOC 0 123 #define SLAVE_LPASS_GEM_NOC 1 124 125 #define MASTER_LPASS_LPINOC 0 126 #define SLAVE_LPIAON_NOC_LPASS_AG_NOC 1 127 128 #define MASTER_LPASS_PROC 0 129 #define SLAVE_LPICX_NOC_LPIAON_NOC 1 130 131 #define MASTER_LLCC 0 132 #define SLAVE_EBI1 1 133 #define MASTER_LLCC_DISP 2 134 #define SLAVE_EBI1_DISP 3 135 #define MASTER_LLCC_CAM_IFE_0 4 136 #define SLAVE_EBI1_CAM_IFE_0 5 137 #define MASTER_LLCC_CAM_IFE_1 6 138 #define SLAVE_EBI1_CAM_IFE_1 7 139 #define MASTER_LLCC_CAM_IFE_2 8 140 #define SLAVE_EBI1_CAM_IFE_2 9 141 142 #define MASTER_CAMNOC_HF 0 143 #define MASTER_CAMNOC_ICP 1 144 #define MASTER_CAMNOC_SF 2 145 #define MASTER_MDP 3 146 #define MASTER_CDSP_HCP 4 147 #define MASTER_VIDEO 5 148 #define MASTER_VIDEO_CV_PROC 6 149 #define MASTER_VIDEO_PROC 7 150 #define MASTER_VIDEO_V_PROC 8 151 #define MASTER_CNOC_MNOC_CFG 9 152 #define SLAVE_MNOC_HF_MEM_NOC 10 153 #define SLAVE_MNOC_SF_MEM_NOC 11 154 #define SLAVE_SERVICE_MNOC 12 155 #define MASTER_MDP_DISP 13 156 #define SLAVE_MNOC_HF_MEM_NOC_DISP 14 157 #define MASTER_CAMNOC_HF_CAM_IFE_0 15 158 #define MASTER_CAMNOC_ICP_CAM_IFE_0 16 159 #define MASTER_CAMNOC_SF_CAM_IFE_0 17 160 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_0 18 161 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_0 19 162 #define MASTER_CAMNOC_HF_CAM_IFE_1 20 163 #define MASTER_CAMNOC_ICP_CAM_IFE_1 21 164 #define MASTER_CAMNOC_SF_CAM_IFE_1 22 165 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_1 23 166 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_1 24 167 #define MASTER_CAMNOC_HF_CAM_IFE_2 25 168 #define MASTER_CAMNOC_ICP_CAM_IFE_2 26 169 #define MASTER_CAMNOC_SF_CAM_IFE_2 27 170 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_2 28 171 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_2 29 172 173 #define MASTER_CDSP_PROC 0 174 #define SLAVE_CDSP_MEM_NOC 1 175 176 #define MASTER_PCIE_ANOC_CFG 0 177 #define MASTER_PCIE_0 1 178 #define MASTER_PCIE_1 2 179 #define SLAVE_ANOC_PCIE_GEM_NOC 3 180 #define SLAVE_SERVICE_PCIE_ANOC 4 181 182 #define MASTER_GIC_AHB 0 183 #define MASTER_A1NOC_SNOC 1 184 #define MASTER_A2NOC_SNOC 2 185 #define MASTER_GIC 3 186 #define SLAVE_SNOC_GEM_NOC_GC 4 187 #define SLAVE_SNOC_GEM_NOC_SF 5 188 189 #endif 190
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