1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2023, Linaro Limited 5 */ 6 7 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_X1E80100_H 8 #define __DT_BINDINGS_INTERCONNECT_QCOM_X1E80100_H 9 10 #define MASTER_QSPI_0 0 11 #define MASTER_QUP_1 1 12 #define MASTER_SDCC_4 2 13 #define MASTER_UFS_MEM 3 14 #define SLAVE_A1NOC_SNOC 4 15 16 #define MASTER_QUP_0 0 17 #define MASTER_QUP_2 1 18 #define MASTER_CRYPTO 2 19 #define MASTER_SP 3 20 #define MASTER_QDSS_ETR 4 21 #define MASTER_QDSS_ETR_1 5 22 #define MASTER_SDCC_2 6 23 #define SLAVE_A2NOC_SNOC 7 24 25 #define MASTER_DDR_PERF_MODE 0 26 #define MASTER_QUP_CORE_0 1 27 #define MASTER_QUP_CORE_1 2 28 #define MASTER_QUP_CORE_2 3 29 #define SLAVE_DDR_PERF_MODE 4 30 #define SLAVE_QUP_CORE_0 5 31 #define SLAVE_QUP_CORE_1 6 32 #define SLAVE_QUP_CORE_2 7 33 34 #define MASTER_CNOC_CFG 0 35 #define SLAVE_AHB2PHY_SOUTH 1 36 #define SLAVE_AHB2PHY_NORTH 2 37 #define SLAVE_AHB2PHY_2 3 38 #define SLAVE_AV1_ENC_CFG 4 39 #define SLAVE_CAMERA_CFG 5 40 #define SLAVE_CLK_CTL 6 41 #define SLAVE_CRYPTO_0_CFG 7 42 #define SLAVE_DISPLAY_CFG 8 43 #define SLAVE_GFX3D_CFG 9 44 #define SLAVE_IMEM_CFG 10 45 #define SLAVE_IPC_ROUTER_CFG 11 46 #define SLAVE_PCIE_0_CFG 12 47 #define SLAVE_PCIE_1_CFG 13 48 #define SLAVE_PCIE_2_CFG 14 49 #define SLAVE_PCIE_3_CFG 15 50 #define SLAVE_PCIE_4_CFG 16 51 #define SLAVE_PCIE_5_CFG 17 52 #define SLAVE_PCIE_6A_CFG 18 53 #define SLAVE_PCIE_6B_CFG 19 54 #define SLAVE_PCIE_RSC_CFG 20 55 #define SLAVE_PDM 21 56 #define SLAVE_PRNG 22 57 #define SLAVE_QDSS_CFG 23 58 #define SLAVE_QSPI_0 24 59 #define SLAVE_QUP_0 25 60 #define SLAVE_QUP_1 26 61 #define SLAVE_QUP_2 27 62 #define SLAVE_SDCC_2 28 63 #define SLAVE_SDCC_4 29 64 #define SLAVE_SMMUV3_CFG 30 65 #define SLAVE_TCSR 31 66 #define SLAVE_TLMM 32 67 #define SLAVE_UFS_MEM_CFG 33 68 #define SLAVE_USB2 34 69 #define SLAVE_USB3_0 35 70 #define SLAVE_USB3_1 36 71 #define SLAVE_USB3_2 37 72 #define SLAVE_USB3_MP 38 73 #define SLAVE_USB4_0 39 74 #define SLAVE_USB4_1 40 75 #define SLAVE_USB4_2 41 76 #define SLAVE_VENUS_CFG 42 77 #define SLAVE_LPASS_QTB_CFG 43 78 #define SLAVE_CNOC_MNOC_CFG 44 79 #define SLAVE_NSP_QTB_CFG 45 80 #define SLAVE_QDSS_STM 46 81 #define SLAVE_TCU 47 82 83 #define MASTER_GEM_NOC_CNOC 0 84 #define MASTER_GEM_NOC_PCIE_SNOC 1 85 #define SLAVE_AOSS 2 86 #define SLAVE_TME_CFG 3 87 #define SLAVE_APPSS 4 88 #define SLAVE_CNOC_CFG 5 89 #define SLAVE_BOOT_IMEM 6 90 #define SLAVE_IMEM 7 91 #define SLAVE_PCIE_0 8 92 #define SLAVE_PCIE_1 9 93 #define SLAVE_PCIE_2 10 94 #define SLAVE_PCIE_3 11 95 #define SLAVE_PCIE_4 12 96 #define SLAVE_PCIE_5 13 97 #define SLAVE_PCIE_6A 14 98 #define SLAVE_PCIE_6B 15 99 100 #define MASTER_GPU_TCU 0 101 #define MASTER_PCIE_TCU 1 102 #define MASTER_SYS_TCU 2 103 #define MASTER_APPSS_PROC 3 104 #define MASTER_GFX3D 4 105 #define MASTER_LPASS_GEM_NOC 5 106 #define MASTER_MNOC_HF_MEM_NOC 6 107 #define MASTER_MNOC_SF_MEM_NOC 7 108 #define MASTER_COMPUTE_NOC 8 109 #define MASTER_ANOC_PCIE_GEM_NOC 9 110 #define MASTER_SNOC_SF_MEM_NOC 10 111 #define MASTER_GIC2 11 112 #define SLAVE_GEM_NOC_CNOC 12 113 #define SLAVE_LLCC 13 114 #define SLAVE_MEM_NOC_PCIE_SNOC 14 115 116 #define MASTER_LPIAON_NOC 0 117 #define SLAVE_LPASS_GEM_NOC 1 118 119 #define MASTER_LPASS_LPINOC 0 120 #define SLAVE_LPIAON_NOC_LPASS_AG_NOC 1 121 122 #define MASTER_LPASS_PROC 0 123 #define SLAVE_LPICX_NOC_LPIAON_NOC 1 124 125 #define MASTER_LLCC 0 126 #define SLAVE_EBI1 1 127 128 #define MASTER_AV1_ENC 0 129 #define MASTER_CAMNOC_HF 1 130 #define MASTER_CAMNOC_ICP 2 131 #define MASTER_CAMNOC_SF 3 132 #define MASTER_EVA 4 133 #define MASTER_MDP 5 134 #define MASTER_VIDEO 6 135 #define MASTER_VIDEO_CV_PROC 7 136 #define MASTER_VIDEO_V_PROC 8 137 #define MASTER_CNOC_MNOC_CFG 9 138 #define SLAVE_MNOC_HF_MEM_NOC 10 139 #define SLAVE_MNOC_SF_MEM_NOC 11 140 #define SLAVE_SERVICE_MNOC 12 141 142 #define MASTER_CDSP_PROC 0 143 #define SLAVE_CDSP_MEM_NOC 1 144 145 #define MASTER_PCIE_NORTH 0 146 #define MASTER_PCIE_SOUTH 1 147 #define SLAVE_ANOC_PCIE_GEM_NOC 2 148 149 #define MASTER_PCIE_3 0 150 #define MASTER_PCIE_4 1 151 #define MASTER_PCIE_5 2 152 #define SLAVE_PCIE_NORTH 3 153 154 #define MASTER_PCIE_0 0 155 #define MASTER_PCIE_1 1 156 #define MASTER_PCIE_2 2 157 #define MASTER_PCIE_6A 3 158 #define MASTER_PCIE_6B 4 159 #define SLAVE_PCIE_SOUTH 5 160 161 #define MASTER_A1NOC_SNOC 0 162 #define MASTER_A2NOC_SNOC 1 163 #define MASTER_GIC1 2 164 #define MASTER_USB_NOC_SNOC 3 165 #define SLAVE_SNOC_GEM_NOC_SF 4 166 167 #define MASTER_AGGRE_USB_NORTH 0 168 #define MASTER_AGGRE_USB_SOUTH 1 169 #define SLAVE_USB_NOC_SNOC 2 170 171 #define MASTER_USB2 0 172 #define MASTER_USB3_MP 1 173 #define SLAVE_AGGRE_USB_NORTH 2 174 175 #define MASTER_USB3_0 0 176 #define MASTER_USB3_1 1 177 #define MASTER_USB3_2 2 178 #define MASTER_USB4_0 3 179 #define MASTER_USB4_1 4 180 #define MASTER_USB4_2 5 181 #define SLAVE_AGGRE_USB_SOUTH 6 182 183 #endif 184
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