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Linux/scripts/dtc/include-prefixes/mips/lantiq/danube.dtsi

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  1 // SPDX-License-Identifier: GPL-2.0
  2 / {
  3         #address-cells = <1>;
  4         #size-cells = <1>;
  5         compatible = "lantiq,xway", "lantiq,danube";
  6 
  7         cpus {
  8                 cpu@0 {
  9                         compatible = "mips,mips24Kc";
 10                 };
 11         };
 12 
 13         biu@1f800000 {
 14                 #address-cells = <1>;
 15                 #size-cells = <1>;
 16                 compatible = "lantiq,biu", "simple-bus";
 17                 reg = <0x1f800000 0x800000>;
 18                 ranges = <0x0 0x1f800000 0x7fffff>;
 19 
 20                 icu0: icu@80200 {
 21                         #interrupt-cells = <1>;
 22                         interrupt-controller;
 23                         compatible = "lantiq,icu";
 24                         reg = <0x80200 0x120>;
 25                 };
 26 
 27                 watchdog@803f0 {
 28                         compatible = "lantiq,wdt";
 29                         reg = <0x803f0 0x10>;
 30                 };
 31         };
 32 
 33         sram@1f000000 {
 34                 #address-cells = <1>;
 35                 #size-cells = <1>;
 36                 compatible = "lantiq,sram";
 37                 reg = <0x1f000000 0x800000>;
 38                 ranges = <0x0 0x1f000000 0x7fffff>;
 39 
 40                 eiu0: eiu@101000 {
 41                         #interrupt-cells = <1>;
 42                         interrupt-controller;
 43                         compatible = "lantiq,eiu-xway";
 44                         reg = <0x101000 0x1000>;
 45                 };
 46 
 47                 pmu0: pmu@102000 {
 48                         compatible = "lantiq,pmu-xway";
 49                         reg = <0x102000 0x1000>;
 50                 };
 51 
 52                 cgu0: cgu@103000 {
 53                         compatible = "lantiq,cgu-xway";
 54                         reg = <0x103000 0x1000>;
 55                         #clock-cells = <1>;
 56                 };
 57 
 58                 rcu0: rcu@203000 {
 59                         compatible = "lantiq,rcu-xway";
 60                         reg = <0x203000 0x1000>;
 61                 };
 62         };
 63 
 64         fpi@10000000 {
 65                 #address-cells = <1>;
 66                 #size-cells = <1>;
 67                 compatible = "lantiq,fpi", "simple-bus";
 68                 ranges = <0x0 0x10000000 0xeefffff>;
 69                 reg = <0x10000000 0xef00000>;
 70 
 71                 gptu@e100a00 {
 72                         compatible = "lantiq,gptu-xway";
 73                         reg = <0xe100a00 0x100>;
 74                 };
 75 
 76                 serial@e100c00 {
 77                         compatible = "lantiq,asc";
 78                         reg = <0xe100c00 0x400>;
 79                         interrupt-parent = <&icu0>;
 80                         interrupts = <112 113 114>;
 81                 };
 82 
 83                 dma0: dma@e104100 {
 84                         compatible = "lantiq,dma-xway";
 85                         reg = <0xe104100 0x800>;
 86                 };
 87 
 88                 ebu0: ebu@e105300 {
 89                         compatible = "lantiq,ebu-xway";
 90                         reg = <0xe105300 0x100>;
 91                 };
 92 
 93                 pci0: pci@e105400 {
 94                         #address-cells = <3>;
 95                         #size-cells = <2>;
 96                         #interrupt-cells = <1>;
 97                         compatible = "lantiq,pci-xway";
 98                         bus-range = <0x0 0x0>;
 99                         ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000   /* pci memory */
100                                   0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
101                         reg = <0x7000000 0x8000         /* config space */
102                                 0xe105400 0x400>;       /* pci bridge */
103                 };
104         };
105 };

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