1 /*
2 * P1023/P1017 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 &bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38 };
39
40 &qman_fqd {
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
43 };
44
45 &qman_pfdr {
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
48 };
49
50 &lbc {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
54 interrupts = <19 2 0 0>,
55 <16 2 0 0>;
56 };
57
58 /* controller at 0xa000 */
59 &pci0 {
60 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
61 device_type = "pci";
62 #size-cells = <2>;
63 #address-cells = <3>;
64 bus-range = <0x0 0xff>;
65 clock-frequency = <33333333>;
66 interrupts = <16 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
69 #interrupt-cells = <1>;
70 #size-cells = <2>;
71 #address-cells = <3>;
72 device_type = "pci";
73 interrupts = <16 2 0 0>;
74 };
75 };
76
77 /* controller at 0x9000 */
78 &pci1 {
79 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
80 device_type = "pci";
81 #size-cells = <2>;
82 #address-cells = <3>;
83 bus-range = <0 0xff>;
84 clock-frequency = <33333333>;
85 interrupts = <16 2 0 0>;
86 pcie@0 {
87 reg = <0 0 0 0 0>;
88 #interrupt-cells = <1>;
89 #size-cells = <2>;
90 #address-cells = <3>;
91 device_type = "pci";
92 interrupts = <16 2 0 0>;
93 };
94 };
95
96 /* controller at 0xb000 */
97 &pci2 {
98 compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
99 device_type = "pci";
100 #size-cells = <2>;
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 0 0>;
105 pcie@0 {
106 reg = <0 0 0 0 0>;
107 #interrupt-cells = <1>;
108 #size-cells = <2>;
109 #address-cells = <3>;
110 device_type = "pci";
111 interrupts = <16 2 0 0>;
112 };
113 };
114
115 &qportals {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 compatible = "simple-bus";
119
120 qportal0: qman-portal@0 {
121 compatible = "fsl,qman-portal";
122 reg = <0x0 0x4000>, <0x100000 0x1000>;
123 interrupts = <29 2 0 0>;
124 cell-index = <0>;
125 };
126 qportal1: qman-portal@4000 {
127 compatible = "fsl,qman-portal";
128 reg = <0x4000 0x4000>, <0x101000 0x1000>;
129 interrupts = <31 2 0 0>;
130 cell-index = <1>;
131 };
132 qportal2: qman-portal@8000 {
133 compatible = "fsl,qman-portal";
134 reg = <0x8000 0x4000>, <0x102000 0x1000>;
135 interrupts = <33 2 0 0>;
136 cell-index = <2>;
137 };
138 };
139
140 &bportals {
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "simple-bus";
144
145 bman-portal@0 {
146 compatible = "fsl,bman-portal";
147 reg = <0x0 0x4000>, <0x100000 0x1000>;
148 interrupts = <30 2 0 0>;
149 };
150 bman-portal@4000 {
151 compatible = "fsl,bman-portal";
152 reg = <0x4000 0x4000>, <0x101000 0x1000>;
153 interrupts = <32 2 0 0>;
154 };
155 bman-portal@8000 {
156 compatible = "fsl,bman-portal";
157 reg = <0x8000 0x4000>, <0x102000 0x1000>;
158 interrupts = <34 2 0 0>;
159 };
160 };
161
162 &soc {
163 #address-cells = <1>;
164 #size-cells = <1>;
165 device_type = "soc";
166 compatible = "fsl,p1023-immr", "simple-bus";
167 bus-frequency = <0>; // Filled out by uboot.
168
169 ecm-law@0 {
170 compatible = "fsl,ecm-law";
171 reg = <0x0 0x1000>;
172 fsl,num-laws = <12>;
173 };
174
175 ecm@1000 {
176 compatible = "fsl,p1023-ecm", "fsl,ecm";
177 reg = <0x1000 0x1000>;
178 interrupts = <16 2 0 0>;
179 };
180
181 memory-controller@2000 {
182 compatible = "fsl,p1023-memory-controller";
183 reg = <0x2000 0x1000>;
184 interrupts = <16 2 0 0>;
185 };
186
187 /include/ "pq3-i2c-0.dtsi"
188 /include/ "pq3-i2c-1.dtsi"
189 /include/ "pq3-duart-0.dtsi"
190
191 /include/ "pq3-espi-0.dtsi"
192 spi@7000 {
193 fsl,espi-num-chipselects = <4>;
194 };
195
196 /include/ "pq3-gpio-0.dtsi"
197
198 L2: l2-cache-controller@20000 {
199 compatible = "fsl,p1023-l2-cache-controller";
200 reg = <0x20000 0x1000>;
201 cache-line-size = <32>; // 32 bytes
202 cache-size = <0x40000>; // L2,256K
203 interrupts = <16 2 0 0>;
204 };
205
206 /include/ "pq3-dma-0.dtsi"
207 /include/ "pq3-usb2-dr-0.dtsi"
208 usb@22000 {
209 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
210 };
211
212 crypto: crypto@300000 {
213 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
214 fsl,sec-era = <3>;
215 #address-cells = <1>;
216 #size-cells = <1>;
217 reg = <0x30000 0x10000>;
218 ranges = <0 0x30000 0x10000>;
219 interrupts = <58 2 0 0>;
220
221 sec_jr0: jr@1000 {
222 compatible = "fsl,sec-v4.2-job-ring",
223 "fsl,sec-v4.0-job-ring";
224 reg = <0x1000 0x1000>;
225 interrupts = <45 2 0 0>;
226 };
227
228 sec_jr1: jr@2000 {
229 compatible = "fsl,sec-v4.2-job-ring",
230 "fsl,sec-v4.0-job-ring";
231 reg = <0x2000 0x1000>;
232 interrupts = <45 2 0 0>;
233 };
234
235 sec_jr2: jr@3000 {
236 compatible = "fsl,sec-v4.2-job-ring",
237 "fsl,sec-v4.0-job-ring";
238 reg = <0x3000 0x1000>;
239 interrupts = <57 2 0 0>;
240 };
241
242 sec_jr3: jr@4000 {
243 compatible = "fsl,sec-v4.2-job-ring",
244 "fsl,sec-v4.0-job-ring";
245 reg = <0x4000 0x1000>;
246 interrupts = <57 2 0 0>;
247 };
248
249 rtic@6000 {
250 compatible = "fsl,sec-v4.2-rtic",
251 "fsl,sec-v4.0-rtic";
252 #address-cells = <1>;
253 #size-cells = <1>;
254 reg = <0x6000 0x100>;
255 ranges = <0x0 0x6100 0xe00>;
256
257 rtic_a: rtic-a@0 {
258 compatible = "fsl,sec-v4.2-rtic-memory",
259 "fsl,sec-v4.0-rtic-memory";
260 reg = <0x00 0x20 0x100 0x80>;
261 };
262
263 rtic_b: rtic-b@20 {
264 compatible = "fsl,sec-v4.2-rtic-memory",
265 "fsl,sec-v4.0-rtic-memory";
266 reg = <0x20 0x20 0x200 0x80>;
267 };
268
269 rtic_c: rtic-c@40 {
270 compatible = "fsl,sec-v4.2-rtic-memory",
271 "fsl,sec-v4.0-rtic-memory";
272 reg = <0x40 0x20 0x300 0x80>;
273 };
274
275 rtic_d: rtic-d@60 {
276 compatible = "fsl,sec-v4.2-rtic-memory",
277 "fsl,sec-v4.0-rtic-memory";
278 reg = <0x60 0x20 0x500 0x80>;
279 };
280 };
281 };
282
283 /include/ "pq3-mpic.dtsi"
284 /include/ "pq3-mpic-timer-B.dtsi"
285
286 qman: qman@88000 {
287 compatible = "fsl,qman";
288 reg = <0x88000 0x1000>;
289 interrupts = <16 2 0 0>;
290 fsl,qman-portals = <&qportals>;
291 memory-region = <&qman_fqd &qman_pfdr>;
292 };
293
294 bman: bman@8a000 {
295 compatible = "fsl,bman";
296 reg = <0x8a000 0x1000>;
297 interrupts = <16 2 0 0>;
298 fsl,bman-portals = <&bportals>;
299 memory-region = <&bman_fbpr>;
300 };
301
302 global-utilities@e0000 {
303 compatible = "fsl,p1023-guts";
304 reg = <0xe0000 0x1000>;
305 fsl,has-rstcr;
306 };
307 };
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