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Linux/sound/soc/amd/acp/acp-platform.c

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  1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
  2 //
  3 // This file is provided under a dual BSD/GPLv2 license. When using or
  4 // redistributing this file, you may do so under either license.
  5 //
  6 // Copyright(c) 2021 Advanced Micro Devices, Inc.
  7 //
  8 // Authors: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
  9 
 10 /*
 11  * Generic interface for ACP audio blck PCM component
 12  */
 13 
 14 #include <linux/platform_device.h>
 15 #include <linux/module.h>
 16 #include <linux/err.h>
 17 #include <linux/io.h>
 18 #include <sound/pcm_params.h>
 19 #include <sound/soc.h>
 20 #include <sound/soc-dai.h>
 21 #include <linux/dma-mapping.h>
 22 
 23 #include "amd.h"
 24 #include "../mach-config.h"
 25 #include "acp-mach.h"
 26 
 27 #define DRV_NAME "acp_i2s_dma"
 28 
 29 static const struct snd_pcm_hardware acp_pcm_hardware_playback = {
 30         .info = SNDRV_PCM_INFO_INTERLEAVED |
 31                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 32                 SNDRV_PCM_INFO_BATCH |
 33                 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
 34                 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
 35         .formats = SNDRV_PCM_FMTBIT_S16_LE |  SNDRV_PCM_FMTBIT_S8 |
 36                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
 37                    SNDRV_PCM_FMTBIT_S32_LE,
 38         .channels_min = 2,
 39         .channels_max = 8,
 40         .rates = SNDRV_PCM_RATE_8000_96000,
 41         .rate_min = 8000,
 42         .rate_max = 96000,
 43         .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
 44         .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
 45         .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
 46         .periods_min = PLAYBACK_MIN_NUM_PERIODS,
 47         .periods_max = PLAYBACK_MAX_NUM_PERIODS,
 48 };
 49 
 50 static const struct snd_pcm_hardware acp_pcm_hardware_capture = {
 51         .info = SNDRV_PCM_INFO_INTERLEAVED |
 52                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 53                 SNDRV_PCM_INFO_BATCH |
 54                 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
 55                 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
 56         .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
 57                    SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
 58                    SNDRV_PCM_FMTBIT_S32_LE,
 59         .channels_min = 2,
 60         .channels_max = 2,
 61         .rates = SNDRV_PCM_RATE_8000_48000,
 62         .rate_min = 8000,
 63         .rate_max = 48000,
 64         .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
 65         .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
 66         .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
 67         .periods_min = CAPTURE_MIN_NUM_PERIODS,
 68         .periods_max = CAPTURE_MAX_NUM_PERIODS,
 69 };
 70 
 71 int acp_machine_select(struct acp_dev_data *adata)
 72 {
 73         struct snd_soc_acpi_mach *mach;
 74         int size, platform;
 75 
 76         if (adata->flag == FLAG_AMD_LEGACY_ONLY_DMIC) {
 77                 platform = adata->platform;
 78                 adata->mach_dev = platform_device_register_data(adata->dev, "acp-pdm-mach",
 79                                                                 PLATFORM_DEVID_NONE, &platform,
 80                                                                 sizeof(platform));
 81         } else {
 82                 size = sizeof(*adata->machines);
 83                 mach = snd_soc_acpi_find_machine(adata->machines);
 84                 if (!mach) {
 85                         dev_err(adata->dev, "warning: No matching ASoC machine driver found\n");
 86                         return -EINVAL;
 87                 }
 88                 adata->mach_dev = platform_device_register_data(adata->dev, mach->drv_name,
 89                                                                 PLATFORM_DEVID_NONE, mach, size);
 90         }
 91         if (IS_ERR(adata->mach_dev))
 92                 dev_warn(adata->dev, "Unable to register Machine device\n");
 93         return 0;
 94 }
 95 EXPORT_SYMBOL_NS_GPL(acp_machine_select, SND_SOC_ACP_COMMON);
 96 
 97 static irqreturn_t i2s_irq_handler(int irq, void *data)
 98 {
 99         struct acp_dev_data *adata = data;
100         struct acp_resource *rsrc = adata->rsrc;
101         struct acp_stream *stream;
102         u16 i2s_flag = 0;
103         u32 ext_intr_stat, ext_intr_stat1;
104 
105         if (!adata)
106                 return IRQ_NONE;
107 
108         if (adata->rsrc->no_of_ctrls == 2)
109                 ext_intr_stat1 = readl(ACP_EXTERNAL_INTR_STAT(adata, (rsrc->irqp_used - 1)));
110 
111         ext_intr_stat = readl(ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
112 
113         spin_lock(&adata->acp_lock);
114         list_for_each_entry(stream, &adata->stream_list, list) {
115                 if (ext_intr_stat & stream->irq_bit) {
116                         writel(stream->irq_bit,
117                                ACP_EXTERNAL_INTR_STAT(adata, rsrc->irqp_used));
118                         snd_pcm_period_elapsed(stream->substream);
119                         i2s_flag = 1;
120                 }
121                 if (adata->rsrc->no_of_ctrls == 2) {
122                         if (ext_intr_stat1 & stream->irq_bit) {
123                                 writel(stream->irq_bit, ACP_EXTERNAL_INTR_STAT(adata,
124                                        (rsrc->irqp_used - 1)));
125                                 snd_pcm_period_elapsed(stream->substream);
126                                 i2s_flag = 1;
127                         }
128                 }
129         }
130         spin_unlock(&adata->acp_lock);
131         if (i2s_flag)
132                 return IRQ_HANDLED;
133 
134         return IRQ_NONE;
135 }
136 
137 void config_pte_for_stream(struct acp_dev_data *adata, struct acp_stream *stream)
138 {
139         struct acp_resource *rsrc = adata->rsrc;
140         u32 pte_reg, pte_size, reg_val;
141 
142         /* Use ATU base Group5 */
143         pte_reg = ACPAXI2AXI_ATU_BASE_ADDR_GRP_5;
144         pte_size =  ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5;
145         stream->reg_offset = 0x02000000;
146 
147         /* Group Enable */
148         reg_val = rsrc->sram_pte_offset;
149         writel(reg_val | BIT(31), adata->acp_base + pte_reg);
150         writel(PAGE_SIZE_4K_ENABLE,  adata->acp_base + pte_size);
151         writel(0x01, adata->acp_base + ACPAXI2AXI_ATU_CTRL);
152 }
153 EXPORT_SYMBOL_NS_GPL(config_pte_for_stream, SND_SOC_ACP_COMMON);
154 
155 void config_acp_dma(struct acp_dev_data *adata, struct acp_stream *stream, int size)
156 {
157         struct snd_pcm_substream *substream = stream->substream;
158         struct acp_resource *rsrc = adata->rsrc;
159         dma_addr_t addr = substream->dma_buffer.addr;
160         int num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
161         u32 low, high, val;
162         u16 page_idx;
163 
164         val = stream->pte_offset;
165 
166         for (page_idx = 0; page_idx < num_pages; page_idx++) {
167                 /* Load the low address of page int ACP SRAM through SRBM */
168                 low = lower_32_bits(addr);
169                 high = upper_32_bits(addr);
170                 writel(low, adata->acp_base + rsrc->scratch_reg_offset + val);
171                 high |= BIT(31);
172                 writel(high, adata->acp_base + rsrc->scratch_reg_offset + val + 4);
173 
174                 /* Move to next physically contiguous page */
175                 val += 8;
176                 addr += PAGE_SIZE;
177         }
178 }
179 EXPORT_SYMBOL_NS_GPL(config_acp_dma, SND_SOC_ACP_COMMON);
180 
181 static int acp_dma_open(struct snd_soc_component *component, struct snd_pcm_substream *substream)
182 {
183         struct snd_pcm_runtime *runtime = substream->runtime;
184         struct device *dev = component->dev;
185         struct acp_dev_data *adata = dev_get_drvdata(dev);
186         struct acp_stream *stream;
187         int ret;
188 
189         stream = kzalloc(sizeof(*stream), GFP_KERNEL);
190         if (!stream)
191                 return -ENOMEM;
192 
193         stream->substream = substream;
194 
195         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
196                 runtime->hw = acp_pcm_hardware_playback;
197         else
198                 runtime->hw = acp_pcm_hardware_capture;
199 
200         ret = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, DMA_SIZE);
201         if (ret) {
202                 dev_err(component->dev, "set hw constraint HW_PARAM_PERIOD_BYTES failed\n");
203                 kfree(stream);
204                 return ret;
205         }
206 
207         ret = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, DMA_SIZE);
208         if (ret) {
209                 dev_err(component->dev, "set hw constraint HW_PARAM_BUFFER_BYTES failed\n");
210                 kfree(stream);
211                 return ret;
212         }
213 
214         ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
215         if (ret < 0) {
216                 dev_err(component->dev, "set integer constraint failed\n");
217                 kfree(stream);
218                 return ret;
219         }
220         runtime->private_data = stream;
221 
222         writel(1, ACP_EXTERNAL_INTR_ENB(adata));
223 
224         spin_lock_irq(&adata->acp_lock);
225         list_add_tail(&stream->list, &adata->stream_list);
226         spin_unlock_irq(&adata->acp_lock);
227 
228         return ret;
229 }
230 
231 static int acp_dma_hw_params(struct snd_soc_component *component,
232                              struct snd_pcm_substream *substream,
233                              struct snd_pcm_hw_params *params)
234 {
235         struct acp_dev_data *adata = snd_soc_component_get_drvdata(component);
236         struct acp_stream *stream = substream->runtime->private_data;
237         u64 size = params_buffer_bytes(params);
238 
239         /* Configure ACP DMA block with params */
240         config_pte_for_stream(adata, stream);
241         config_acp_dma(adata, stream, size);
242 
243         return 0;
244 }
245 
246 static snd_pcm_uframes_t acp_dma_pointer(struct snd_soc_component *component,
247                                          struct snd_pcm_substream *substream)
248 {
249         struct device *dev = component->dev;
250         struct acp_dev_data *adata = dev_get_drvdata(dev);
251         struct acp_stream *stream = substream->runtime->private_data;
252         u32 pos, buffersize;
253         u64 bytescount;
254 
255         buffersize = frames_to_bytes(substream->runtime,
256                                      substream->runtime->buffer_size);
257 
258         bytescount = acp_get_byte_count(adata, stream->dai_id, substream->stream);
259 
260         if (bytescount > stream->bytescount)
261                 bytescount -= stream->bytescount;
262 
263         pos = do_div(bytescount, buffersize);
264 
265         return bytes_to_frames(substream->runtime, pos);
266 }
267 
268 static int acp_dma_new(struct snd_soc_component *component,
269                        struct snd_soc_pcm_runtime *rtd)
270 {
271         struct device *parent = component->dev->parent;
272 
273         snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
274                                        parent, MIN_BUFFER, MAX_BUFFER);
275         return 0;
276 }
277 
278 static int acp_dma_close(struct snd_soc_component *component,
279                          struct snd_pcm_substream *substream)
280 {
281         struct device *dev = component->dev;
282         struct acp_dev_data *adata = dev_get_drvdata(dev);
283         struct acp_stream *stream = substream->runtime->private_data;
284 
285         /* Remove entry from list */
286         spin_lock_irq(&adata->acp_lock);
287         list_del(&stream->list);
288         spin_unlock_irq(&adata->acp_lock);
289         kfree(stream);
290 
291         return 0;
292 }
293 
294 static const struct snd_soc_component_driver acp_pcm_component = {
295         .name                   = DRV_NAME,
296         .open                   = acp_dma_open,
297         .close                  = acp_dma_close,
298         .hw_params              = acp_dma_hw_params,
299         .pointer                = acp_dma_pointer,
300         .pcm_construct          = acp_dma_new,
301         .legacy_dai_naming      = 1,
302 };
303 
304 int acp_platform_register(struct device *dev)
305 {
306         struct acp_dev_data *adata = dev_get_drvdata(dev);
307         struct snd_soc_dai_driver;
308         unsigned int status;
309 
310         status = devm_request_irq(dev, adata->i2s_irq, i2s_irq_handler,
311                                   IRQF_SHARED, "ACP_I2S_IRQ", adata);
312         if (status) {
313                 dev_err(dev, "ACP I2S IRQ request failed\n");
314                 return status;
315         }
316 
317         status = devm_snd_soc_register_component(dev, &acp_pcm_component,
318                                                  adata->dai_driver,
319                                                  adata->num_dai);
320         if (status) {
321                 dev_err(dev, "Fail to register acp i2s component\n");
322                 return status;
323         }
324 
325         INIT_LIST_HEAD(&adata->stream_list);
326         spin_lock_init(&adata->acp_lock);
327 
328         return 0;
329 }
330 EXPORT_SYMBOL_NS_GPL(acp_platform_register, SND_SOC_ACP_COMMON);
331 
332 int acp_platform_unregister(struct device *dev)
333 {
334         struct acp_dev_data *adata = dev_get_drvdata(dev);
335 
336         if (adata->mach_dev)
337                 platform_device_unregister(adata->mach_dev);
338         return 0;
339 }
340 EXPORT_SYMBOL_NS_GPL(acp_platform_unregister, SND_SOC_ACP_COMMON);
341 
342 MODULE_DESCRIPTION("AMD ACP PCM Driver");
343 MODULE_LICENSE("Dual BSD/GPL");
344 MODULE_ALIAS(DRV_NAME);
345 

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