1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // aw88395.h -- ALSA SoC AW88395 codec support
4 //
5 // Copyright (c) 2022-2023 AWINIC Technology CO., LTD
6 //
7 // Author: Bruce zhao <zhaolei@awinic.com>
8 //
9
10 #ifndef __AW88395_H__
11 #define __AW88395_H__
12
13 #define AW88395_CHIP_ID_REG (0x00)
14 #define AW88395_START_RETRIES (5)
15 #define AW88395_START_WORK_DELAY_MS (0)
16
17 #define AW88395_DSP_16_DATA_MASK (0x0000ffff)
18
19 #define AW88395_I2C_NAME "aw88395"
20
21 #define AW88395_RATES (SNDRV_PCM_RATE_8000_48000 | \
22 SNDRV_PCM_RATE_96000)
23 #define AW88395_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
24 SNDRV_PCM_FMTBIT_S24_LE | \
25 SNDRV_PCM_FMTBIT_S32_LE)
26
27 #define FADE_TIME_MAX 100000
28 #define FADE_TIME_MIN 0
29
30 #define AW88395_PROFILE_EXT(xname, profile_info, profile_get, profile_set) \
31 { \
32 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
33 .name = xname, \
34 .info = profile_info, \
35 .get = profile_get, \
36 .put = profile_set, \
37 }
38
39 enum {
40 AW88395_SYNC_START = 0,
41 AW88395_ASYNC_START,
42 };
43
44 enum {
45 AW88395_STREAM_CLOSE = 0,
46 AW88395_STREAM_OPEN,
47 };
48
49 struct aw88395 {
50 struct aw_device *aw_pa;
51 struct mutex lock;
52 struct gpio_desc *reset_gpio;
53 struct delayed_work start_work;
54 struct regmap *regmap;
55 struct aw_container *aw_cfg;
56 };
57
58 #endif
59
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