1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * cs35l33.h -- CS35L33 ALSA SoC audio driver
4 *
5 * Copyright 2016 Cirrus Logic, Inc.
6 *
7 * Author: Paul Handrigan <paul.handrigan@cirrus.com>
8 */
9
10 #ifndef __CS35L33_H__
11 #define __CS35L33_H__
12
13 #define CS35L33_CHIP_ID 0x00035A33
14 #define CS35L33_DEVID_AB 0x01 /* Device ID A & B [RO] */
15 #define CS35L33_DEVID_CD 0x02 /* Device ID C & D [RO] */
16 #define CS35L33_DEVID_E 0x03 /* Device ID E [RO] */
17 #define CS35L33_FAB_ID 0x04 /* Fab ID [RO] */
18 #define CS35L33_REV_ID 0x05 /* Revision ID [RO] */
19 #define CS35L33_PWRCTL1 0x06 /* Power Ctl 1 */
20 #define CS35L33_PWRCTL2 0x07 /* Power Ctl 2 */
21 #define CS35L33_CLK_CTL 0x08 /* Clock Ctl */
22 #define CS35L33_BST_PEAK_CTL 0x09 /* Max Current for Boost */
23 #define CS35L33_PROTECT_CTL 0x0A /* Amp Protection Parameters */
24 #define CS35L33_BST_CTL1 0x0B /* Boost Converter CTL1 */
25 #define CS35L33_BST_CTL2 0x0C /* Boost Converter CTL2 */
26 #define CS35L33_ADSP_CTL 0x0D /* Serial Port Control */
27 #define CS35L33_ADC_CTL 0x0E /* ADC Control */
28 #define CS35L33_DAC_CTL 0x0F /* DAC Control */
29 #define CS35L33_DIG_VOL_CTL 0x10 /* Digital Volume CTL */
30 #define CS35L33_CLASSD_CTL 0x11 /* Class D Amp CTL */
31 #define CS35L33_AMP_CTL 0x12 /* Amp Gain/Protecton Release CTL */
32 #define CS35L33_INT_MASK_1 0x13 /* Interrupt Mask 1 */
33 #define CS35L33_INT_MASK_2 0x14 /* Interrupt Mask 2 */
34 #define CS35L33_INT_STATUS_1 0x15 /* Interrupt Status 1 [RO] */
35 #define CS35L33_INT_STATUS_2 0x16 /* Interrupt Status 2 [RO] */
36 #define CS35L33_DIAG_LOCK 0x17 /* Diagnostic Mode Register Lock */
37 #define CS35L33_DIAG_CTRL_1 0x18 /* Diagnostic Mode Register Control */
38 #define CS35L33_DIAG_CTRL_2 0x19 /* Diagnostic Mode Register Control 2 */
39 #define CS35L33_HG_MEMLDO_CTL 0x23 /* H/G Memory/LDO CTL */
40 #define CS35L33_HG_REL_RATE 0x24 /* H/G Release Rate */
41 #define CS35L33_LDO_DEL 0x25 /* LDO Entry Delay/VPhg Control 1 */
42 #define CS35L33_HG_HEAD 0x29 /* H/G Headroom */
43 #define CS35L33_HG_EN 0x2A /* H/G Enable/VPhg CNT2 */
44 #define CS35L33_TX_VMON 0x2D /* TDM TX Control 1 (VMON) */
45 #define CS35L33_TX_IMON 0x2E /* TDM TX Control 2 (IMON) */
46 #define CS35L33_TX_VPMON 0x2F /* TDM TX Control 3 (VPMON) */
47 #define CS35L33_TX_VBSTMON 0x30 /* TDM TX Control 4 (VBSTMON) */
48 #define CS35L33_TX_FLAG 0x31 /* TDM TX Control 5 (FLAG) */
49 #define CS35L33_TX_EN1 0x32 /* TDM TX Enable 1 */
50 #define CS35L33_TX_EN2 0x33 /* TDM TX Enable 2 */
51 #define CS35L33_TX_EN3 0x34 /* TDM TX Enable 3 */
52 #define CS35L33_TX_EN4 0x35 /* TDM TX Enable 4 */
53 #define CS35L33_RX_AUD 0x36 /* TDM RX Control 1 */
54 #define CS35L33_RX_SPLY 0x37 /* TDM RX Control 2 */
55 #define CS35L33_RX_ALIVE 0x38 /* TDM RX Control 3 */
56 #define CS35L33_BST_CTL4 0x39 /* Boost Converter Control 4 */
57 #define CS35L33_HG_STATUS 0x3F /* H/G Status */
58 #define CS35L33_MAX_REGISTER 0x59
59
60 #define CS35L33_MCLK_5644 5644800
61 #define CS35L33_MCLK_6144 6144000
62 #define CS35L33_MCLK_6 6000000
63 #define CS35L33_MCLK_11289 11289600
64 #define CS35L33_MCLK_12 12000000
65 #define CS35L33_MCLK_12288 12288000
66
67 /* CS35L33_PWRCTL1 */
68 #define CS35L33_PDN_AMP (1 << 7)
69 #define CS35L33_PDN_BST (1 << 2)
70 #define CS35L33_PDN_ALL 1
71
72 /* CS35L33_PWRCTL2 */
73 #define CS35L33_PDN_VMON_SHIFT 7
74 #define CS35L33_PDN_VMON (1 << CS35L33_PDN_VMON_SHIFT)
75 #define CS35L33_PDN_IMON_SHIFT 6
76 #define CS35L33_PDN_IMON (1 << CS35L33_PDN_IMON_SHIFT)
77 #define CS35L33_PDN_VPMON_SHIFT 5
78 #define CS35L33_PDN_VPMON (1 << CS35L33_PDN_VPMON_SHIFT)
79 #define CS35L33_PDN_VBSTMON_SHIFT 4
80 #define CS35L33_PDN_VBSTMON (1 << CS35L33_PDN_VBSTMON_SHIFT)
81 #define CS35L33_SDOUT_3ST_I2S_SHIFT 3
82 #define CS35L33_SDOUT_3ST_I2S (1 << CS35L33_SDOUT_3ST_I2S_SHIFT)
83 #define CS35L33_PDN_SDIN_SHIFT 2
84 #define CS35L33_PDN_SDIN (1 << CS35L33_PDN_SDIN_SHIFT)
85 #define CS35L33_PDN_TDM_SHIFT 1
86 #define CS35L33_PDN_TDM (1 << CS35L33_PDN_TDM_SHIFT)
87
88 /* CS35L33_CLK_CTL */
89 #define CS35L33_MCLKDIS (1 << 7)
90 #define CS35L33_MCLKDIV2 (1 << 6)
91 #define CS35L33_SDOUT_3ST_TDM (1 << 5)
92 #define CS35L33_INT_FS_RATE (1 << 4)
93 #define CS35L33_ADSP_FS 0xF
94
95 /* CS35L33_PROTECT_CTL */
96 #define CS35L33_ALIVE_WD_DIS (3 << 2)
97
98 /* CS35L33_BST_CTL1 */
99 #define CS35L33_BST_CTL_SRC (1 << 6)
100 #define CS35L33_BST_CTL_SHIFT (1 << 5)
101 #define CS35L33_BST_CTL_MASK 0x3F
102
103 /* CS35L33_BST_CTL2 */
104 #define CS35L33_TDM_WD_SEL (1 << 4)
105 #define CS35L33_ALIVE_WD_DIS2 (1 << 3)
106 #define CS35L33_VBST_SR_STEP 0x3
107
108 /* CS35L33_ADSP_CTL */
109 #define CS35L33_ADSP_DRIVE (1 << 7)
110 #define CS35L33_MS_MASK (1 << 6)
111 #define CS35L33_SDIN_LOC (3 << 4)
112 #define CS35L33_ALIVE_RATE 0x3
113
114 /* CS35L33_ADC_CTL */
115 #define CS35L33_INV_VMON (1 << 7)
116 #define CS35L33_INV_IMON (1 << 6)
117 #define CS35L33_ADC_NOTCH_DIS (1 << 5)
118 #define CS35L33_IMON_SCALE 0xF
119
120 /* CS35L33_DAC_CTL */
121 #define CS35L33_INV_DAC (1 << 7)
122 #define CS35L33_DAC_NOTCH_DIS (1 << 5)
123 #define CS35L33_DIGSFT (1 << 4)
124 #define CS35L33_DSR_RATE 0xF
125
126 /* CS35L33_CLASSD_CTL */
127 #define CS35L33_AMP_SD (1 << 6)
128 #define CS35L33_AMP_DRV_SEL_SRC (1 << 5)
129 #define CS35L33_AMP_DRV_SEL_MASK 0x10
130 #define CS35L33_AMP_DRV_SEL_SHIFT 4
131 #define CS35L33_AMP_CAL (1 << 3)
132 #define CS35L33_GAIN_CHG_ZC_MASK 0x04
133 #define CS35L33_GAIN_CHG_ZC_SHIFT 2
134 #define CS35L33_CLASS_D_CTL_MASK 0x3F
135
136 /* CS35L33_AMP_CTL */
137 #define CS35L33_AMP_GAIN 0xF0
138 #define CS35L33_CAL_ERR_RLS (1 << 3)
139 #define CS35L33_AMP_SHORT_RLS (1 << 2)
140 #define CS35L33_OTW_RLS (1 << 1)
141 #define CS35L33_OTE_RLS 1
142
143 /* CS35L33_INT_MASK_1 */
144 #define CS35L33_M_CAL_ERR_SHIFT 6
145 #define CS35L33_M_CAL_ERR (1 << CS35L33_M_CAL_ERR_SHIFT)
146 #define CS35L33_M_ALIVE_ERR_SHIFT 5
147 #define CS35L33_M_ALIVE_ERR (1 << CS35L33_M_ALIVE_ERR_SHIFT)
148 #define CS35L33_M_AMP_SHORT_SHIFT 2
149 #define CS35L33_M_AMP_SHORT (1 << CS35L33_M_AMP_SHORT_SHIFT)
150 #define CS35L33_M_OTW_SHIFT 1
151 #define CS35L33_M_OTW (1 << CS35L33_M_OTW_SHIFT)
152 #define CS35L33_M_OTE_SHIFT 0
153 #define CS35L33_M_OTE (1 << CS35L33_M_OTE_SHIFT)
154
155 /* CS35L33_INT_STATUS_1 */
156 #define CS35L33_CAL_ERR (1 << 6)
157 #define CS35L33_ALIVE_ERR (1 << 5)
158 #define CS35L33_ADSPCLK_ERR (1 << 4)
159 #define CS35L33_MCLK_ERR (1 << 3)
160 #define CS35L33_AMP_SHORT (1 << 2)
161 #define CS35L33_OTW (1 << 1)
162 #define CS35L33_OTE (1 << 0)
163
164 /* CS35L33_INT_STATUS_2 */
165 #define CS35L33_VMON_OVFL (1 << 7)
166 #define CS35L33_IMON_OVFL (1 << 6)
167 #define CS35L33_VPMON_OVFL (1 << 5)
168 #define CS35L33_VBSTMON_OVFL (1 << 4)
169 #define CS35L33_PDN_DONE 1
170
171 /* CS35L33_BST_CTL4 */
172 #define CS35L33_BST_RGS 0x70
173 #define CS35L33_BST_COEFF3 0xF
174
175 /* CS35L33_HG_MEMLDO_CTL */
176 #define CS35L33_MEM_DEPTH_SHIFT 5
177 #define CS35L33_MEM_DEPTH_MASK (0x3 << CS35L33_MEM_DEPTH_SHIFT)
178 #define CS35L33_LDO_THLD_SHIFT 1
179 #define CS35L33_LDO_THLD_MASK (0xF << CS35L33_LDO_THLD_SHIFT)
180 #define CS35L33_LDO_DISABLE_SHIFT 0
181 #define CS35L33_LDO_DISABLE_MASK (0x1 << CS35L33_LDO_DISABLE_SHIFT)
182
183 /* CS35L33_LDO_DEL */
184 #define CS35L33_VP_HG_VA_SHIFT 5
185 #define CS35L33_VP_HG_VA_MASK (0x7 << CS35L33_VP_HG_VA_SHIFT)
186 #define CS35L33_LDO_ENTRY_DELAY_SHIFT 2
187 #define CS35L33_LDO_ENTRY_DELAY_MASK (0x7 << CS35L33_LDO_ENTRY_DELAY_SHIFT)
188 #define CS35L33_VP_HG_RATE_SHIFT 0
189 #define CS35L33_VP_HG_RATE_MASK (0x3 << CS35L33_VP_HG_RATE_SHIFT)
190
191 /* CS35L33_HG_HEAD */
192 #define CS35L33_HD_RM_SHIFT 0
193 #define CS35L33_HD_RM_MASK (0x7F << CS35L33_HD_RM_SHIFT)
194
195 /* CS35L33_HG_EN */
196 #define CS35L33_CLASS_HG_ENA_SHIFT 7
197 #define CS35L33_CLASS_HG_EN_MASK (0x1 << CS35L33_CLASS_HG_ENA_SHIFT)
198 #define CS35L33_VP_HG_AUTO_SHIFT 6
199 #define CS35L33_VP_HG_AUTO_MASK (0x1 << 6)
200 #define CS35L33_VP_HG_SHIFT 0
201 #define CS35L33_VP_HG_MASK (0x1F << CS35L33_VP_HG_SHIFT)
202
203 #define CS35L33_RATES (SNDRV_PCM_RATE_8000_48000)
204 #define CS35L33_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
205 SNDRV_PCM_FMTBIT_S24_LE)
206
207 /* CS35L33_{RX,TX}_X */
208 #define CS35L33_X_STATE_SHIFT 7
209 #define CS35L33_X_STATE (1 << CS35L33_X_STATE_SHIFT)
210 #define CS35L33_X_LOC_SHIFT 0
211 #define CS35L33_X_LOC (0x1F << CS35L33_X_LOC_SHIFT)
212
213 /* CS35L33_RX_AUD */
214 #define CS35L33_AUDIN_RX_DEPTH_SHIFT 5
215 #define CS35L33_AUDIN_RX_DEPTH (0x7 << CS35L33_AUDIN_RX_DEPTH_SHIFT)
216
217 #endif
218
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