1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * CS530x CODEC driver internal data
4 *
5 * Copyright (C) 2023-2024 Cirrus Logic, Inc. and
6 * Cirrus Logic International Semiconductor Ltd.
7 */
8
9 #ifndef _CS530X_H
10 #define _CS530X_H
11
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16
17 /* Devices */
18 #define CS530X_2CH_ADC_DEV_ID 0x5302
19 #define CS530X_4CH_ADC_DEV_ID 0x5304
20 #define CS530X_8CH_ADC_DEV_ID 0x5308
21
22 /* Registers */
23
24 #define CS530X_DEVID 0x0000000
25 #define CS530X_REVID 0x0000004
26 #define CS530X_SW_RESET 0x0000022
27
28 #define CS530X_CLK_CFG_0 0x0000040
29 #define CS530X_CLK_CFG_1 0x0000042
30 #define CS530X_CHIP_ENABLE 0x0000044
31 #define CS530X_ASP_CFG 0x0000048
32 #define CS530X_SIGNAL_PATH_CFG 0x0000050
33 #define CS530X_IN_ENABLES 0x0000080
34 #define CS530X_IN_RAMP_SUM 0x0000082
35 #define CS530X_IN_FILTER 0x0000086
36 #define CS530X_IN_HIZ 0x0000088
37 #define CS530X_IN_INV 0x000008A
38 #define CS530X_IN_VOL_CTRL1_0 0x0000090
39 #define CS530X_IN_VOL_CTRL1_1 0x0000092
40 #define CS530X_IN_VOL_CTRL2_0 0x0000094
41 #define CS530X_IN_VOL_CTRL2_1 0x0000096
42 #define CS530X_IN_VOL_CTRL3_0 0x0000098
43 #define CS530X_IN_VOL_CTRL3_1 0x000009A
44 #define CS530X_IN_VOL_CTRL4_0 0x000009C
45 #define CS530X_IN_VOL_CTRL4_1 0x000009E
46 #define CS530X_IN_VOL_CTRL5 0x00000A0
47
48 #define CS530X_PAD_FN 0x0003D24
49 #define CS530X_PAD_LVL 0x0003D28
50
51 #define CS530X_MAX_REGISTER CS530X_PAD_LVL
52
53 /* Register Fields */
54
55 /* REVID */
56 #define CS530X_MTLREVID GENMASK(3, 0)
57 #define CS530X_AREVID GENMASK(7, 4)
58
59 /* SW_RESET */
60 #define CS530X_SW_RST_SHIFT 8
61 #define CS530X_SW_RST_VAL (0x5A << CS530X_SW_RST_SHIFT)
62
63 /* CLK_CFG_0 */
64 #define CS530X_PLL_REFCLK_SRC_MASK BIT(0)
65 #define CS530X_PLL_REFCLK_FREQ_MASK GENMASK(5, 4)
66 #define CS530X_SYSCLK_SRC_MASK BIT(12)
67 #define CS530X_SYSCLK_SRC_SHIFT 12
68 #define CS530X_REFCLK_2P822_3P072 0
69 #define CS530X_REFCLK_5P6448_6P144 0x10
70 #define CS530X_REFCLK_11P2896_12P288 0x20
71 #define CS530X_REFCLK_24P5792_24P576 0x30
72
73 /* CLK_CFG_1 */
74 #define CS530X_SAMPLE_RATE_MASK GENMASK(2, 0)
75 #define CS530X_FS_32K 0
76 #define CS530X_FS_48K_44P1K 1
77 #define CS530X_FS_96K_88P2K 2
78 #define CS530X_FS_192K_176P4K 3
79 #define CS530X_FS_384K_356P8K 4
80 #define CS530X_FS_768K_705P6K 5
81
82 /* CHIP_ENABLE */
83 #define CS530X_GLOBAL_EN BIT(0)
84
85 /* ASP_CFG */
86 #define CS530X_ASP_BCLK_FREQ_MASK GENMASK(1, 0)
87 #define CS530X_ASP_PRIMARY BIT(5)
88 #define CS530X_ASP_BCLK_INV BIT(6)
89 #define CS530X_BCLK_2P822_3P072 0
90 #define CS530X_BCLK_5P6448_6P144 1
91 #define CS530X_BCLK_11P2896_12P288 2
92 #define CS530X_BCLK_24P5792_24P576 3
93
94 /* SIGNAL_PATH_CFG */
95 #define CS530X_ASP_FMT_MASK GENMASK(2, 0)
96 #define CS530X_ASP_TDM_SLOT_MASK GENMASK(5, 3)
97 #define CS530X_ASP_TDM_SLOT_SHIFT 3
98 #define CS530X_ASP_CH_REVERSE BIT(9)
99 #define CS530X_TDM_EN_MASK BIT(2)
100 #define CS530X_ASP_FMT_I2S 0
101 #define CS530X_ASP_FMT_LJ 1
102 #define CS530X_ASP_FMT_DSP_A 0x6
103
104 /* TDM Slots */
105 #define CS530X_0_1_TDM_SLOT_MASK GENMASK(1, 0)
106 #define CS530X_0_3_TDM_SLOT_MASK GENMASK(3, 0)
107 #define CS530X_0_7_TDM_SLOT_MASK GENMASK(7, 0)
108 #define CS530X_0_7_TDM_SLOT_VAL 0
109
110 #define CS530X_2_3_TDM_SLOT_MASK GENMASK(3, 2)
111 #define CS530X_2_3_TDM_SLOT_VAL 1
112
113 #define CS530X_4_5_TDM_SLOT_MASK GENMASK(5, 4)
114 #define CS530X_4_7_TDM_SLOT_MASK GENMASK(7, 4)
115 #define CS530X_4_7_TDM_SLOT_VAL 2
116
117 #define CS530X_6_7_TDM_SLOT_MASK GENMASK(7, 6)
118 #define CS530X_6_7_TDM_SLOT_VAL 3
119
120 #define CS530X_8_9_TDM_SLOT_MASK GENMASK(9, 8)
121 #define CS530X_8_11_TDM_SLOT_MASK GENMASK(11, 8)
122 #define CS530X_8_15_TDM_SLOT_MASK GENMASK(15, 8)
123 #define CS530X_8_15_TDM_SLOT_VAL 4
124
125 #define CS530X_10_11_TDM_SLOT_MASK GENMASK(11, 10)
126 #define CS530X_10_11_TDM_SLOT_VAL 5
127
128 #define CS530X_12_13_TDM_SLOT_MASK GENMASK(13, 12)
129 #define CS530X_12_15_TDM_SLOT_MASK GENMASK(15, 12)
130 #define CS530X_12_15_TDM_SLOT_VAL 6
131
132 #define CS530X_14_15_TDM_SLOT_MASK GENMASK(15, 14)
133 #define CS530X_14_15_TDM_SLOT_VAL 7
134
135 /* IN_RAMP_SUM */
136 #define CS530X_RAMP_RATE_INC_SHIFT 0
137 #define CS530X_RAMP_RATE_DEC_SHIFT 4
138 #define CS530X_IN_SUM_MODE_SHIFT 13
139
140 /* IN_FILTER */
141 #define CS530X_IN_FILTER_SHIFT 8
142 #define CS530X_IN_HPF_EN_SHIFT 12
143
144 /* IN_HIZ */
145 #define CS530X_IN12_HIZ BIT(0)
146 #define CS530X_IN34_HIZ BIT(1)
147 #define CS530X_IN56_HIZ BIT(2)
148 #define CS530X_IN78_HIZ BIT(3)
149
150 /* IN_INV */
151 #define CS530X_IN1_INV_SHIFT 0
152 #define CS530X_IN2_INV_SHIFT 1
153 #define CS530X_IN3_INV_SHIFT 2
154 #define CS530X_IN4_INV_SHIFT 3
155 #define CS530X_IN5_INV_SHIFT 4
156 #define CS530X_IN6_INV_SHIFT 5
157 #define CS530X_IN7_INV_SHIFT 6
158 #define CS530X_IN8_INV_SHIFT 7
159
160 /* IN_VOL_CTLy_z */
161 #define CS530X_IN_MUTE BIT(15)
162
163 /* IN_VOL_CTL5 */
164 #define CS530X_IN_VU BIT(0)
165
166 /* PAD_FN */
167 #define CS530X_DOUT2_FN BIT(0)
168 #define CS530X_DOUT3_FN BIT(1)
169 #define CS530X_DOUT4_FN BIT(2)
170 #define CS530X_SPI_CS_FN BIT(3)
171 #define CS530X_CONFIG2_FN BIT(6)
172 #define CS530X_CONFIG3_FN BIT(7)
173 #define CS530X_CONFIG4_FN BIT(8)
174 #define CS530X_CONFIG5_FN BIT(9)
175
176 /* PAD_LVL */
177 #define CS530X_CONFIG2_LVL BIT(6)
178 #define CS530X_CONFIG3_LVL BIT(7)
179 #define CS530X_CONFIG4_LVL BIT(8)
180 #define CS530X_CONFIG5_LVL BIT(9)
181
182 /* System Clock Source */
183 #define CS530X_SYSCLK_SRC_MCLK 0
184 #define CS530X_SYSCLK_SRC_PLL 1
185
186 /* PLL Reference Clock Source */
187 #define CS530X_PLL_SRC_BCLK 0
188 #define CS530X_PLL_SRC_MCLK 1
189
190 #define CS530X_NUM_SUPPLIES 2
191
192 enum cs530x_type {
193 CS5302,
194 CS5304,
195 CS5308,
196 };
197
198 /* codec private data */
199 struct cs530x_priv {
200 struct regmap *regmap;
201 struct device *dev;
202 struct snd_soc_dai_driver *dev_dai;
203
204 enum cs530x_type devtype;
205 int num_adcs;
206 int num_dacs;
207
208 struct regulator_bulk_data supplies[CS530X_NUM_SUPPLIES];
209
210 unsigned int mclk_rate;
211
212 int tdm_width;
213 int tdm_slots;
214 int fs;
215 int adc_pairs_count;
216
217 struct gpio_desc *reset_gpio;
218 };
219
220 extern const struct regmap_config cs530x_regmap;
221 int cs530x_probe(struct cs530x_priv *cs530x);
222
223 #endif
224
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