1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // DA7210 ALSA Soc codec driver
4 //
5 // Copyright (c) 2009 Dialog Semiconductor
6 // Written by David Chen <Dajun.chen@diasemi.com>
7 //
8 // Copyright (C) 2009 Renesas Solutions Corp.
9 // Cleanups by Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 //
11 // Tested on SuperH Ecovec24 board with S16/S24 LE in 48KHz using I2S
12
13 #include <linux/delay.h>
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
24
25 /* DA7210 register space */
26 #define DA7210_PAGE_CONTROL 0x00
27 #define DA7210_CONTROL 0x01
28 #define DA7210_STATUS 0x02
29 #define DA7210_STARTUP1 0x03
30 #define DA7210_STARTUP2 0x04
31 #define DA7210_STARTUP3 0x05
32 #define DA7210_MIC_L 0x07
33 #define DA7210_MIC_R 0x08
34 #define DA7210_AUX1_L 0x09
35 #define DA7210_AUX1_R 0x0A
36 #define DA7210_AUX2 0x0B
37 #define DA7210_IN_GAIN 0x0C
38 #define DA7210_INMIX_L 0x0D
39 #define DA7210_INMIX_R 0x0E
40 #define DA7210_ADC_HPF 0x0F
41 #define DA7210_ADC 0x10
42 #define DA7210_ADC_EQ1_2 0X11
43 #define DA7210_ADC_EQ3_4 0x12
44 #define DA7210_ADC_EQ5 0x13
45 #define DA7210_DAC_HPF 0x14
46 #define DA7210_DAC_L 0x15
47 #define DA7210_DAC_R 0x16
48 #define DA7210_DAC_SEL 0x17
49 #define DA7210_SOFTMUTE 0x18
50 #define DA7210_DAC_EQ1_2 0x19
51 #define DA7210_DAC_EQ3_4 0x1A
52 #define DA7210_DAC_EQ5 0x1B
53 #define DA7210_OUTMIX_L 0x1C
54 #define DA7210_OUTMIX_R 0x1D
55 #define DA7210_OUT1_L 0x1E
56 #define DA7210_OUT1_R 0x1F
57 #define DA7210_OUT2 0x20
58 #define DA7210_HP_L_VOL 0x21
59 #define DA7210_HP_R_VOL 0x22
60 #define DA7210_HP_CFG 0x23
61 #define DA7210_ZERO_CROSS 0x24
62 #define DA7210_DAI_SRC_SEL 0x25
63 #define DA7210_DAI_CFG1 0x26
64 #define DA7210_DAI_CFG3 0x28
65 #define DA7210_PLL_DIV1 0x29
66 #define DA7210_PLL_DIV2 0x2A
67 #define DA7210_PLL_DIV3 0x2B
68 #define DA7210_PLL 0x2C
69 #define DA7210_ALC_MAX 0x83
70 #define DA7210_ALC_MIN 0x84
71 #define DA7210_ALC_NOIS 0x85
72 #define DA7210_ALC_ATT 0x86
73 #define DA7210_ALC_REL 0x87
74 #define DA7210_ALC_DEL 0x88
75 #define DA7210_A_HID_UNLOCK 0x8A
76 #define DA7210_A_TEST_UNLOCK 0x8B
77 #define DA7210_A_PLL1 0x90
78 #define DA7210_A_CP_MODE 0xA7
79
80 /* STARTUP1 bit fields */
81 #define DA7210_SC_MST_EN (1 << 0)
82
83 /* MIC_L bit fields */
84 #define DA7210_MICBIAS_EN (1 << 6)
85 #define DA7210_MIC_L_EN (1 << 7)
86
87 /* MIC_R bit fields */
88 #define DA7210_MIC_R_EN (1 << 7)
89
90 /* INMIX_L bit fields */
91 #define DA7210_IN_L_EN (1 << 7)
92
93 /* INMIX_R bit fields */
94 #define DA7210_IN_R_EN (1 << 7)
95
96 /* ADC bit fields */
97 #define DA7210_ADC_ALC_EN (1 << 0)
98 #define DA7210_ADC_L_EN (1 << 3)
99 #define DA7210_ADC_R_EN (1 << 7)
100
101 /* DAC/ADC HPF fields */
102 #define DA7210_VOICE_F0_MASK (0x7 << 4)
103 #define DA7210_VOICE_F0_25 (1 << 4)
104 #define DA7210_VOICE_EN (1 << 7)
105
106 /* DAC_SEL bit fields */
107 #define DA7210_DAC_L_SRC_DAI_L (4 << 0)
108 #define DA7210_DAC_L_EN (1 << 3)
109 #define DA7210_DAC_R_SRC_DAI_R (5 << 4)
110 #define DA7210_DAC_R_EN (1 << 7)
111
112 /* OUTMIX_L bit fields */
113 #define DA7210_OUT_L_EN (1 << 7)
114
115 /* OUTMIX_R bit fields */
116 #define DA7210_OUT_R_EN (1 << 7)
117
118 /* HP_CFG bit fields */
119 #define DA7210_HP_2CAP_MODE (1 << 1)
120 #define DA7210_HP_SENSE_EN (1 << 2)
121 #define DA7210_HP_L_EN (1 << 3)
122 #define DA7210_HP_MODE (1 << 6)
123 #define DA7210_HP_R_EN (1 << 7)
124
125 /* DAI_SRC_SEL bit fields */
126 #define DA7210_DAI_OUT_L_SRC (6 << 0)
127 #define DA7210_DAI_OUT_R_SRC (7 << 4)
128
129 /* DAI_CFG1 bit fields */
130 #define DA7210_DAI_WORD_S16_LE (0 << 0)
131 #define DA7210_DAI_WORD_S20_3LE (1 << 0)
132 #define DA7210_DAI_WORD_S24_LE (2 << 0)
133 #define DA7210_DAI_WORD_S32_LE (3 << 0)
134 #define DA7210_DAI_FLEN_64BIT (1 << 2)
135 #define DA7210_DAI_MODE_SLAVE (0 << 7)
136 #define DA7210_DAI_MODE_MASTER (1 << 7)
137
138 /* DAI_CFG3 bit fields */
139 #define DA7210_DAI_FORMAT_I2SMODE (0 << 0)
140 #define DA7210_DAI_FORMAT_LEFT_J (1 << 0)
141 #define DA7210_DAI_FORMAT_RIGHT_J (2 << 0)
142 #define DA7210_DAI_OE (1 << 3)
143 #define DA7210_DAI_EN (1 << 7)
144
145 /*PLL_DIV3 bit fields */
146 #define DA7210_PLL_DIV_L_MASK (0xF << 0)
147 #define DA7210_MCLK_RANGE_10_20_MHZ (1 << 4)
148 #define DA7210_PLL_BYP (1 << 6)
149
150 /* PLL bit fields */
151 #define DA7210_PLL_FS_MASK (0xF << 0)
152 #define DA7210_PLL_FS_8000 (0x1 << 0)
153 #define DA7210_PLL_FS_11025 (0x2 << 0)
154 #define DA7210_PLL_FS_12000 (0x3 << 0)
155 #define DA7210_PLL_FS_16000 (0x5 << 0)
156 #define DA7210_PLL_FS_22050 (0x6 << 0)
157 #define DA7210_PLL_FS_24000 (0x7 << 0)
158 #define DA7210_PLL_FS_32000 (0x9 << 0)
159 #define DA7210_PLL_FS_44100 (0xA << 0)
160 #define DA7210_PLL_FS_48000 (0xB << 0)
161 #define DA7210_PLL_FS_88200 (0xE << 0)
162 #define DA7210_PLL_FS_96000 (0xF << 0)
163 #define DA7210_MCLK_DET_EN (0x1 << 5)
164 #define DA7210_MCLK_SRM_EN (0x1 << 6)
165 #define DA7210_PLL_EN (0x1 << 7)
166
167 /* SOFTMUTE bit fields */
168 #define DA7210_RAMP_EN (1 << 6)
169
170 /* CONTROL bit fields */
171 #define DA7210_REG_EN (1 << 0)
172 #define DA7210_BIAS_EN (1 << 2)
173 #define DA7210_NOISE_SUP_EN (1 << 3)
174
175 /* IN_GAIN bit fields */
176 #define DA7210_INPGA_L_VOL (0x0F << 0)
177 #define DA7210_INPGA_R_VOL (0xF0 << 0)
178
179 /* ZERO_CROSS bit fields */
180 #define DA7210_AUX1_L_ZC (1 << 0)
181 #define DA7210_AUX1_R_ZC (1 << 1)
182 #define DA7210_HP_L_ZC (1 << 6)
183 #define DA7210_HP_R_ZC (1 << 7)
184
185 /* AUX1_L bit fields */
186 #define DA7210_AUX1_L_VOL (0x3F << 0)
187 #define DA7210_AUX1_L_EN (1 << 7)
188
189 /* AUX1_R bit fields */
190 #define DA7210_AUX1_R_VOL (0x3F << 0)
191 #define DA7210_AUX1_R_EN (1 << 7)
192
193 /* AUX2 bit fields */
194 #define DA7210_AUX2_EN (1 << 3)
195
196 /* Minimum INPGA and AUX1 volume to enable noise suppression */
197 #define DA7210_INPGA_MIN_VOL_NS 0x0A /* 10.5dB */
198 #define DA7210_AUX1_MIN_VOL_NS 0x35 /* 6dB */
199
200 /* OUT1_L bit fields */
201 #define DA7210_OUT1_L_EN (1 << 7)
202
203 /* OUT1_R bit fields */
204 #define DA7210_OUT1_R_EN (1 << 7)
205
206 /* OUT2 bit fields */
207 #define DA7210_OUT2_OUTMIX_R (1 << 5)
208 #define DA7210_OUT2_OUTMIX_L (1 << 6)
209 #define DA7210_OUT2_EN (1 << 7)
210
211 struct pll_div {
212 int fref;
213 int fout;
214 u8 div1;
215 u8 div2;
216 u8 div3;
217 u8 mode; /* 0 = slave, 1 = master */
218 };
219
220 /* PLL dividers table */
221 static const struct pll_div da7210_pll_div[] = {
222 /* for MASTER mode, fs = 44.1Khz */
223 { 12000000, 2822400, 0xE8, 0x6C, 0x2, 1}, /* MCLK=12Mhz */
224 { 13000000, 2822400, 0xDF, 0x28, 0xC, 1}, /* MCLK=13Mhz */
225 { 13500000, 2822400, 0xDB, 0x0A, 0xD, 1}, /* MCLK=13.5Mhz */
226 { 14400000, 2822400, 0xD4, 0x5A, 0x2, 1}, /* MCLK=14.4Mhz */
227 { 19200000, 2822400, 0xBB, 0x43, 0x9, 1}, /* MCLK=19.2Mhz */
228 { 19680000, 2822400, 0xB9, 0x6D, 0xA, 1}, /* MCLK=19.68Mhz */
229 { 19800000, 2822400, 0xB8, 0xFB, 0xB, 1}, /* MCLK=19.8Mhz */
230 /* for MASTER mode, fs = 48Khz */
231 { 12000000, 3072000, 0xF3, 0x12, 0x7, 1}, /* MCLK=12Mhz */
232 { 13000000, 3072000, 0xE8, 0xFD, 0x5, 1}, /* MCLK=13Mhz */
233 { 13500000, 3072000, 0xE4, 0x82, 0x3, 1}, /* MCLK=13.5Mhz */
234 { 14400000, 3072000, 0xDD, 0x3A, 0x0, 1}, /* MCLK=14.4Mhz */
235 { 19200000, 3072000, 0xC1, 0xEB, 0x8, 1}, /* MCLK=19.2Mhz */
236 { 19680000, 3072000, 0xBF, 0xEC, 0x0, 1}, /* MCLK=19.68Mhz */
237 { 19800000, 3072000, 0xBF, 0x70, 0x0, 1}, /* MCLK=19.8Mhz */
238 /* for SLAVE mode with SRM */
239 { 12000000, 2822400, 0xED, 0xBF, 0x5, 0}, /* MCLK=12Mhz */
240 { 13000000, 2822400, 0xE4, 0x13, 0x0, 0}, /* MCLK=13Mhz */
241 { 13500000, 2822400, 0xDF, 0xC6, 0x8, 0}, /* MCLK=13.5Mhz */
242 { 14400000, 2822400, 0xD8, 0xCA, 0x1, 0}, /* MCLK=14.4Mhz */
243 { 19200000, 2822400, 0xBE, 0x97, 0x9, 0}, /* MCLK=19.2Mhz */
244 { 19680000, 2822400, 0xBC, 0xAC, 0xD, 0}, /* MCLK=19.68Mhz */
245 { 19800000, 2822400, 0xBC, 0x35, 0xE, 0}, /* MCLK=19.8Mhz */
246 };
247
248 enum clk_src {
249 DA7210_CLKSRC_MCLK
250 };
251
252 #define DA7210_VERSION "0.0.1"
253
254 /*
255 * Playback Volume
256 *
257 * max : 0x3F (+15.0 dB)
258 * (1.5 dB step)
259 * min : 0x11 (-54.0 dB)
260 * mute : 0x10
261 * reserved : 0x00 - 0x0F
262 *
263 * Reserved area are considered as "mute".
264 */
265 static const DECLARE_TLV_DB_RANGE(hp_out_tlv,
266 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
267 /* -54 dB to +15 dB */
268 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
269 );
270
271 static const DECLARE_TLV_DB_RANGE(lineout_vol_tlv,
272 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
273 /* -54dB to 15dB */
274 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
275 );
276
277 static const DECLARE_TLV_DB_RANGE(mono_vol_tlv,
278 0x0, 0x2, TLV_DB_SCALE_ITEM(-1800, 0, 1),
279 /* -18dB to 6dB */
280 0x3, 0x7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
281 );
282
283 static const DECLARE_TLV_DB_RANGE(aux1_vol_tlv,
284 0x0, 0x10, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
285 /* -48dB to 21dB */
286 0x11, 0x3f, TLV_DB_SCALE_ITEM(-4800, 150, 0)
287 );
288
289 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
290 static const DECLARE_TLV_DB_SCALE(adc_eq_master_gain_tlv, -1800, 600, 1);
291 static const DECLARE_TLV_DB_SCALE(dac_gain_tlv, -7725, 75, 0);
292 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
293 static const DECLARE_TLV_DB_SCALE(aux2_vol_tlv, -600, 600, 0);
294 static const DECLARE_TLV_DB_SCALE(inpga_gain_tlv, -450, 150, 0);
295
296 /* ADC and DAC high pass filter f0 value */
297 static const char * const da7210_hpf_cutoff_txt[] = {
298 "Fs/8192*pi", "Fs/4096*pi", "Fs/2048*pi", "Fs/1024*pi"
299 };
300
301 static SOC_ENUM_SINGLE_DECL(da7210_dac_hpf_cutoff,
302 DA7210_DAC_HPF, 0, da7210_hpf_cutoff_txt);
303
304 static SOC_ENUM_SINGLE_DECL(da7210_adc_hpf_cutoff,
305 DA7210_ADC_HPF, 0, da7210_hpf_cutoff_txt);
306
307 /* ADC and DAC voice (8kHz) high pass cutoff value */
308 static const char * const da7210_vf_cutoff_txt[] = {
309 "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
310 };
311
312 static SOC_ENUM_SINGLE_DECL(da7210_dac_vf_cutoff,
313 DA7210_DAC_HPF, 4, da7210_vf_cutoff_txt);
314
315 static SOC_ENUM_SINGLE_DECL(da7210_adc_vf_cutoff,
316 DA7210_ADC_HPF, 4, da7210_vf_cutoff_txt);
317
318 static const char *da7210_hp_mode_txt[] = {
319 "Class H", "Class G"
320 };
321
322 static SOC_ENUM_SINGLE_DECL(da7210_hp_mode_sel,
323 DA7210_HP_CFG, 0, da7210_hp_mode_txt);
324
325 /* ALC can be enabled only if noise suppression is disabled */
326 static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,
327 struct snd_ctl_elem_value *ucontrol)
328 {
329 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
330
331 if (ucontrol->value.integer.value[0]) {
332 /* Check if noise suppression is enabled */
333 if (snd_soc_component_read(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
334 dev_dbg(component->dev,
335 "Disable noise suppression to enable ALC\n");
336 return -EINVAL;
337 }
338 }
339 /* If all conditions are met or we are actually disabling ALC */
340 return snd_soc_put_volsw(kcontrol, ucontrol);
341 }
342
343 /* Noise suppression can be enabled only if following conditions are met
344 * ALC disabled
345 * ZC enabled for HP and AUX1 PGA
346 * INPGA_L_VOL and INPGA_R_VOL >= 10.5 dB
347 * AUX1_L_VOL and AUX1_R_VOL >= 6 dB
348 */
349 static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,
350 struct snd_ctl_elem_value *ucontrol)
351 {
352 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
353 u8 val;
354
355 if (ucontrol->value.integer.value[0]) {
356 /* Check if ALC is enabled */
357 if (snd_soc_component_read(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
358 goto err;
359
360 /* Check ZC for HP and AUX1 PGA */
361 if ((snd_soc_component_read(component, DA7210_ZERO_CROSS) &
362 (DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC |
363 DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC |
364 DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC))
365 goto err;
366
367 /* Check INPGA_L_VOL and INPGA_R_VOL */
368 val = snd_soc_component_read(component, DA7210_IN_GAIN);
369 if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) ||
370 (((val & DA7210_INPGA_R_VOL) >> 4) <
371 DA7210_INPGA_MIN_VOL_NS))
372 goto err;
373
374 /* Check AUX1_L_VOL and AUX1_R_VOL */
375 if (((snd_soc_component_read(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
376 DA7210_AUX1_MIN_VOL_NS) ||
377 ((snd_soc_component_read(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
378 DA7210_AUX1_MIN_VOL_NS))
379 goto err;
380 }
381 /* If all conditions are met or we are actually disabling Noise sup */
382 return snd_soc_put_volsw(kcontrol, ucontrol);
383
384 err:
385 return -EINVAL;
386 }
387
388 static const struct snd_kcontrol_new da7210_snd_controls[] = {
389
390 SOC_DOUBLE_R_TLV("HeadPhone Playback Volume",
391 DA7210_HP_L_VOL, DA7210_HP_R_VOL,
392 0, 0x3F, 0, hp_out_tlv),
393 SOC_DOUBLE_R_TLV("Digital Playback Volume",
394 DA7210_DAC_L, DA7210_DAC_R,
395 0, 0x77, 1, dac_gain_tlv),
396 SOC_DOUBLE_R_TLV("Lineout Playback Volume",
397 DA7210_OUT1_L, DA7210_OUT1_R,
398 0, 0x3f, 0, lineout_vol_tlv),
399 SOC_SINGLE_TLV("Mono Playback Volume", DA7210_OUT2, 0, 0x7, 0,
400 mono_vol_tlv),
401
402 SOC_DOUBLE_R_TLV("Mic Capture Volume",
403 DA7210_MIC_L, DA7210_MIC_R,
404 0, 0x5, 0, mic_vol_tlv),
405 SOC_DOUBLE_R_TLV("Aux1 Capture Volume",
406 DA7210_AUX1_L, DA7210_AUX1_R,
407 0, 0x3f, 0, aux1_vol_tlv),
408 SOC_SINGLE_TLV("Aux2 Capture Volume", DA7210_AUX2, 0, 0x3, 0,
409 aux2_vol_tlv),
410 SOC_DOUBLE_TLV("In PGA Capture Volume", DA7210_IN_GAIN, 0, 4, 0xF, 0,
411 inpga_gain_tlv),
412
413 /* DAC Equalizer controls */
414 SOC_SINGLE("DAC EQ Switch", DA7210_DAC_EQ5, 7, 1, 0),
415 SOC_SINGLE_TLV("DAC EQ1 Volume", DA7210_DAC_EQ1_2, 0, 0xf, 1,
416 eq_gain_tlv),
417 SOC_SINGLE_TLV("DAC EQ2 Volume", DA7210_DAC_EQ1_2, 4, 0xf, 1,
418 eq_gain_tlv),
419 SOC_SINGLE_TLV("DAC EQ3 Volume", DA7210_DAC_EQ3_4, 0, 0xf, 1,
420 eq_gain_tlv),
421 SOC_SINGLE_TLV("DAC EQ4 Volume", DA7210_DAC_EQ3_4, 4, 0xf, 1,
422 eq_gain_tlv),
423 SOC_SINGLE_TLV("DAC EQ5 Volume", DA7210_DAC_EQ5, 0, 0xf, 1,
424 eq_gain_tlv),
425
426 /* ADC Equalizer controls */
427 SOC_SINGLE("ADC EQ Switch", DA7210_ADC_EQ5, 7, 1, 0),
428 SOC_SINGLE_TLV("ADC EQ Master Volume", DA7210_ADC_EQ5, 4, 0x3,
429 1, adc_eq_master_gain_tlv),
430 SOC_SINGLE_TLV("ADC EQ1 Volume", DA7210_ADC_EQ1_2, 0, 0xf, 1,
431 eq_gain_tlv),
432 SOC_SINGLE_TLV("ADC EQ2 Volume", DA7210_ADC_EQ1_2, 4, 0xf, 1,
433 eq_gain_tlv),
434 SOC_SINGLE_TLV("ADC EQ3 Volume", DA7210_ADC_EQ3_4, 0, 0xf, 1,
435 eq_gain_tlv),
436 SOC_SINGLE_TLV("ADC EQ4 Volume", DA7210_ADC_EQ3_4, 4, 0xf, 1,
437 eq_gain_tlv),
438 SOC_SINGLE_TLV("ADC EQ5 Volume", DA7210_ADC_EQ5, 0, 0xf, 1,
439 eq_gain_tlv),
440
441 SOC_SINGLE("DAC HPF Switch", DA7210_DAC_HPF, 3, 1, 0),
442 SOC_ENUM("DAC HPF Cutoff", da7210_dac_hpf_cutoff),
443 SOC_SINGLE("DAC Voice Mode Switch", DA7210_DAC_HPF, 7, 1, 0),
444 SOC_ENUM("DAC Voice Cutoff", da7210_dac_vf_cutoff),
445
446 SOC_SINGLE("ADC HPF Switch", DA7210_ADC_HPF, 3, 1, 0),
447 SOC_ENUM("ADC HPF Cutoff", da7210_adc_hpf_cutoff),
448 SOC_SINGLE("ADC Voice Mode Switch", DA7210_ADC_HPF, 7, 1, 0),
449 SOC_ENUM("ADC Voice Cutoff", da7210_adc_vf_cutoff),
450
451 /* Mute controls */
452 SOC_DOUBLE_R("Mic Capture Switch", DA7210_MIC_L, DA7210_MIC_R, 3, 1, 0),
453 SOC_SINGLE("Aux2 Capture Switch", DA7210_AUX2, 2, 1, 0),
454 SOC_DOUBLE("ADC Capture Switch", DA7210_ADC, 2, 6, 1, 0),
455 SOC_SINGLE("Digital Soft Mute Switch", DA7210_SOFTMUTE, 7, 1, 0),
456 SOC_SINGLE("Digital Soft Mute Rate", DA7210_SOFTMUTE, 0, 0x7, 0),
457
458 /* Zero cross controls */
459 SOC_DOUBLE("Aux1 ZC Switch", DA7210_ZERO_CROSS, 0, 1, 1, 0),
460 SOC_DOUBLE("In PGA ZC Switch", DA7210_ZERO_CROSS, 2, 3, 1, 0),
461 SOC_DOUBLE("Lineout ZC Switch", DA7210_ZERO_CROSS, 4, 5, 1, 0),
462 SOC_DOUBLE("Headphone ZC Switch", DA7210_ZERO_CROSS, 6, 7, 1, 0),
463
464 SOC_ENUM("Headphone Class", da7210_hp_mode_sel),
465
466 /* ALC controls */
467 SOC_SINGLE_EXT("ALC Enable Switch", DA7210_ADC, 0, 1, 0,
468 snd_soc_get_volsw, da7210_put_alc_sw),
469 SOC_SINGLE("ALC Capture Max Volume", DA7210_ALC_MAX, 0, 0x3F, 0),
470 SOC_SINGLE("ALC Capture Min Volume", DA7210_ALC_MIN, 0, 0x3F, 0),
471 SOC_SINGLE("ALC Capture Noise Volume", DA7210_ALC_NOIS, 0, 0x3F, 0),
472 SOC_SINGLE("ALC Capture Attack Rate", DA7210_ALC_ATT, 0, 0xFF, 0),
473 SOC_SINGLE("ALC Capture Release Rate", DA7210_ALC_REL, 0, 0xFF, 0),
474 SOC_SINGLE("ALC Capture Release Delay", DA7210_ALC_DEL, 0, 0xFF, 0),
475
476 SOC_SINGLE_EXT("Noise Suppression Enable Switch", DA7210_CONTROL, 3, 1,
477 0, snd_soc_get_volsw, da7210_put_noise_sup_sw),
478 };
479
480 /*
481 * DAPM Controls
482 *
483 * Current DAPM implementation covers almost all codec components e.g. IOs,
484 * mixers, PGAs,ADC and DAC.
485 */
486 /* In Mixer Left */
487 static const struct snd_kcontrol_new da7210_dapm_inmixl_controls[] = {
488 SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_L, 0, 1, 0),
489 SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_L, 1, 1, 0),
490 SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_INMIX_L, 2, 1, 0),
491 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_L, 3, 1, 0),
492 SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_INMIX_L, 4, 1, 0),
493 };
494
495 /* In Mixer Right */
496 static const struct snd_kcontrol_new da7210_dapm_inmixr_controls[] = {
497 SOC_DAPM_SINGLE("Mic Right Switch", DA7210_INMIX_R, 0, 1, 0),
498 SOC_DAPM_SINGLE("Mic Left Switch", DA7210_INMIX_R, 1, 1, 0),
499 SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_INMIX_R, 2, 1, 0),
500 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_INMIX_R, 3, 1, 0),
501 SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_INMIX_R, 4, 1, 0),
502 };
503
504 /* Out Mixer Left */
505 static const struct snd_kcontrol_new da7210_dapm_outmixl_controls[] = {
506 SOC_DAPM_SINGLE("Aux1 Left Switch", DA7210_OUTMIX_L, 0, 1, 0),
507 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_L, 1, 1, 0),
508 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_L, 2, 1, 0),
509 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_L, 3, 1, 0),
510 SOC_DAPM_SINGLE("DAC Left Switch", DA7210_OUTMIX_L, 4, 1, 0),
511 };
512
513 /* Out Mixer Right */
514 static const struct snd_kcontrol_new da7210_dapm_outmixr_controls[] = {
515 SOC_DAPM_SINGLE("Aux1 Right Switch", DA7210_OUTMIX_R, 0, 1, 0),
516 SOC_DAPM_SINGLE("Aux2 Switch", DA7210_OUTMIX_R, 1, 1, 0),
517 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUTMIX_R, 2, 1, 0),
518 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUTMIX_R, 3, 1, 0),
519 SOC_DAPM_SINGLE("DAC Right Switch", DA7210_OUTMIX_R, 4, 1, 0),
520 };
521
522 /* Mono Mixer */
523 static const struct snd_kcontrol_new da7210_dapm_monomix_controls[] = {
524 SOC_DAPM_SINGLE("INPGA Right Switch", DA7210_OUT2, 3, 1, 0),
525 SOC_DAPM_SINGLE("INPGA Left Switch", DA7210_OUT2, 4, 1, 0),
526 SOC_DAPM_SINGLE("Outmix Right Switch", DA7210_OUT2, 5, 1, 0),
527 SOC_DAPM_SINGLE("Outmix Left Switch", DA7210_OUT2, 6, 1, 0),
528 };
529
530 /* DAPM widgets */
531 static const struct snd_soc_dapm_widget da7210_dapm_widgets[] = {
532 /* Input Side */
533 /* Input Lines */
534 SND_SOC_DAPM_INPUT("MICL"),
535 SND_SOC_DAPM_INPUT("MICR"),
536 SND_SOC_DAPM_INPUT("AUX1L"),
537 SND_SOC_DAPM_INPUT("AUX1R"),
538 SND_SOC_DAPM_INPUT("AUX2"),
539
540 /* Input PGAs */
541 SND_SOC_DAPM_PGA("Mic Left", DA7210_STARTUP3, 0, 1, NULL, 0),
542 SND_SOC_DAPM_PGA("Mic Right", DA7210_STARTUP3, 1, 1, NULL, 0),
543 SND_SOC_DAPM_PGA("Aux1 Left", DA7210_STARTUP3, 2, 1, NULL, 0),
544 SND_SOC_DAPM_PGA("Aux1 Right", DA7210_STARTUP3, 3, 1, NULL, 0),
545 SND_SOC_DAPM_PGA("Aux2 Mono", DA7210_STARTUP3, 4, 1, NULL, 0),
546
547 SND_SOC_DAPM_PGA("INPGA Left", DA7210_INMIX_L, 7, 0, NULL, 0),
548 SND_SOC_DAPM_PGA("INPGA Right", DA7210_INMIX_R, 7, 0, NULL, 0),
549
550 /* MICBIAS */
551 SND_SOC_DAPM_SUPPLY("Mic Bias", DA7210_MIC_L, 6, 0, NULL, 0),
552
553 /* Input Mixers */
554 SND_SOC_DAPM_MIXER("In Mixer Left", SND_SOC_NOPM, 0, 0,
555 &da7210_dapm_inmixl_controls[0],
556 ARRAY_SIZE(da7210_dapm_inmixl_controls)),
557
558 SND_SOC_DAPM_MIXER("In Mixer Right", SND_SOC_NOPM, 0, 0,
559 &da7210_dapm_inmixr_controls[0],
560 ARRAY_SIZE(da7210_dapm_inmixr_controls)),
561
562 /* ADCs */
563 SND_SOC_DAPM_ADC("ADC Left", "Capture", DA7210_STARTUP3, 5, 1),
564 SND_SOC_DAPM_ADC("ADC Right", "Capture", DA7210_STARTUP3, 6, 1),
565
566 /* Output Side */
567 /* DACs */
568 SND_SOC_DAPM_DAC("DAC Left", "Playback", DA7210_STARTUP2, 5, 1),
569 SND_SOC_DAPM_DAC("DAC Right", "Playback", DA7210_STARTUP2, 6, 1),
570
571 /* Output Mixers */
572 SND_SOC_DAPM_MIXER("Out Mixer Left", SND_SOC_NOPM, 0, 0,
573 &da7210_dapm_outmixl_controls[0],
574 ARRAY_SIZE(da7210_dapm_outmixl_controls)),
575
576 SND_SOC_DAPM_MIXER("Out Mixer Right", SND_SOC_NOPM, 0, 0,
577 &da7210_dapm_outmixr_controls[0],
578 ARRAY_SIZE(da7210_dapm_outmixr_controls)),
579
580 SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0,
581 &da7210_dapm_monomix_controls[0],
582 ARRAY_SIZE(da7210_dapm_monomix_controls)),
583
584 /* Output PGAs */
585 SND_SOC_DAPM_PGA("OUTPGA Left Enable", DA7210_OUTMIX_L, 7, 0, NULL, 0),
586 SND_SOC_DAPM_PGA("OUTPGA Right Enable", DA7210_OUTMIX_R, 7, 0, NULL, 0),
587
588 SND_SOC_DAPM_PGA("Out1 Left", DA7210_STARTUP2, 0, 1, NULL, 0),
589 SND_SOC_DAPM_PGA("Out1 Right", DA7210_STARTUP2, 1, 1, NULL, 0),
590 SND_SOC_DAPM_PGA("Out2 Mono", DA7210_STARTUP2, 2, 1, NULL, 0),
591 SND_SOC_DAPM_PGA("Headphone Left", DA7210_STARTUP2, 3, 1, NULL, 0),
592 SND_SOC_DAPM_PGA("Headphone Right", DA7210_STARTUP2, 4, 1, NULL, 0),
593
594 /* Output Lines */
595 SND_SOC_DAPM_OUTPUT("OUT1L"),
596 SND_SOC_DAPM_OUTPUT("OUT1R"),
597 SND_SOC_DAPM_OUTPUT("HPL"),
598 SND_SOC_DAPM_OUTPUT("HPR"),
599 SND_SOC_DAPM_OUTPUT("OUT2"),
600 };
601
602 /* DAPM audio route definition */
603 static const struct snd_soc_dapm_route da7210_audio_map[] = {
604 /* Dest Connecting Widget source */
605 /* Input path */
606 {"Mic Left", NULL, "MICL"},
607 {"Mic Right", NULL, "MICR"},
608 {"Aux1 Left", NULL, "AUX1L"},
609 {"Aux1 Right", NULL, "AUX1R"},
610 {"Aux2 Mono", NULL, "AUX2"},
611
612 {"In Mixer Left", "Mic Left Switch", "Mic Left"},
613 {"In Mixer Left", "Mic Right Switch", "Mic Right"},
614 {"In Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
615 {"In Mixer Left", "Aux2 Switch", "Aux2 Mono"},
616 {"In Mixer Left", "Outmix Left Switch", "Out Mixer Left"},
617
618 {"In Mixer Right", "Mic Right Switch", "Mic Right"},
619 {"In Mixer Right", "Mic Left Switch", "Mic Left"},
620 {"In Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
621 {"In Mixer Right", "Aux2 Switch", "Aux2 Mono"},
622 {"In Mixer Right", "Outmix Right Switch", "Out Mixer Right"},
623
624 {"INPGA Left", NULL, "In Mixer Left"},
625 {"ADC Left", NULL, "INPGA Left"},
626
627 {"INPGA Right", NULL, "In Mixer Right"},
628 {"ADC Right", NULL, "INPGA Right"},
629
630 /* Output path */
631 {"Out Mixer Left", "Aux1 Left Switch", "Aux1 Left"},
632 {"Out Mixer Left", "Aux2 Switch", "Aux2 Mono"},
633 {"Out Mixer Left", "INPGA Left Switch", "INPGA Left"},
634 {"Out Mixer Left", "INPGA Right Switch", "INPGA Right"},
635 {"Out Mixer Left", "DAC Left Switch", "DAC Left"},
636
637 {"Out Mixer Right", "Aux1 Right Switch", "Aux1 Right"},
638 {"Out Mixer Right", "Aux2 Switch", "Aux2 Mono"},
639 {"Out Mixer Right", "INPGA Right Switch", "INPGA Right"},
640 {"Out Mixer Right", "INPGA Left Switch", "INPGA Left"},
641 {"Out Mixer Right", "DAC Right Switch", "DAC Right"},
642
643 {"Mono Mixer", "INPGA Right Switch", "INPGA Right"},
644 {"Mono Mixer", "INPGA Left Switch", "INPGA Left"},
645 {"Mono Mixer", "Outmix Right Switch", "Out Mixer Right"},
646 {"Mono Mixer", "Outmix Left Switch", "Out Mixer Left"},
647
648 {"OUTPGA Left Enable", NULL, "Out Mixer Left"},
649 {"OUTPGA Right Enable", NULL, "Out Mixer Right"},
650
651 {"Out1 Left", NULL, "OUTPGA Left Enable"},
652 {"OUT1L", NULL, "Out1 Left"},
653
654 {"Out1 Right", NULL, "OUTPGA Right Enable"},
655 {"OUT1R", NULL, "Out1 Right"},
656
657 {"Headphone Left", NULL, "OUTPGA Left Enable"},
658 {"HPL", NULL, "Headphone Left"},
659
660 {"Headphone Right", NULL, "OUTPGA Right Enable"},
661 {"HPR", NULL, "Headphone Right"},
662
663 {"Out2 Mono", NULL, "Mono Mixer"},
664 {"OUT2", NULL, "Out2 Mono"},
665 };
666
667 /* Codec private data */
668 struct da7210_priv {
669 struct regmap *regmap;
670 unsigned int mclk_rate;
671 int master;
672 };
673
674 static const struct reg_default da7210_reg_defaults[] = {
675 { 0x00, 0x00 },
676 { 0x01, 0x11 },
677 { 0x03, 0x00 },
678 { 0x04, 0x00 },
679 { 0x05, 0x00 },
680 { 0x06, 0x00 },
681 { 0x07, 0x00 },
682 { 0x08, 0x00 },
683 { 0x09, 0x00 },
684 { 0x0a, 0x00 },
685 { 0x0b, 0x00 },
686 { 0x0c, 0x00 },
687 { 0x0d, 0x00 },
688 { 0x0e, 0x00 },
689 { 0x0f, 0x08 },
690 { 0x10, 0x00 },
691 { 0x11, 0x00 },
692 { 0x12, 0x00 },
693 { 0x13, 0x00 },
694 { 0x14, 0x08 },
695 { 0x15, 0x10 },
696 { 0x16, 0x10 },
697 { 0x17, 0x54 },
698 { 0x18, 0x40 },
699 { 0x19, 0x00 },
700 { 0x1a, 0x00 },
701 { 0x1b, 0x00 },
702 { 0x1c, 0x00 },
703 { 0x1d, 0x00 },
704 { 0x1e, 0x00 },
705 { 0x1f, 0x00 },
706 { 0x20, 0x00 },
707 { 0x21, 0x00 },
708 { 0x22, 0x00 },
709 { 0x23, 0x02 },
710 { 0x24, 0x00 },
711 { 0x25, 0x76 },
712 { 0x26, 0x00 },
713 { 0x27, 0x00 },
714 { 0x28, 0x04 },
715 { 0x29, 0x00 },
716 { 0x2a, 0x00 },
717 { 0x2b, 0x30 },
718 { 0x2c, 0x2A },
719 { 0x83, 0x00 },
720 { 0x84, 0x00 },
721 { 0x85, 0x00 },
722 { 0x86, 0x00 },
723 { 0x87, 0x00 },
724 { 0x88, 0x00 },
725 };
726
727 static bool da7210_readable_register(struct device *dev, unsigned int reg)
728 {
729 switch (reg) {
730 case DA7210_A_HID_UNLOCK:
731 case DA7210_A_TEST_UNLOCK:
732 case DA7210_A_PLL1:
733 case DA7210_A_CP_MODE:
734 return false;
735 default:
736 return true;
737 }
738 }
739
740 static bool da7210_volatile_register(struct device *dev,
741 unsigned int reg)
742 {
743 switch (reg) {
744 case DA7210_STATUS:
745 return true;
746 default:
747 return false;
748 }
749 }
750
751 /*
752 * Set PCM DAI word length.
753 */
754 static int da7210_hw_params(struct snd_pcm_substream *substream,
755 struct snd_pcm_hw_params *params,
756 struct snd_soc_dai *dai)
757 {
758 struct snd_soc_component *component = dai->component;
759 struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
760 u32 dai_cfg1;
761 u32 fs, sysclk;
762
763 /* set DAI source to Left and Right ADC */
764 snd_soc_component_write(component, DA7210_DAI_SRC_SEL,
765 DA7210_DAI_OUT_R_SRC | DA7210_DAI_OUT_L_SRC);
766
767 /* Enable DAI */
768 snd_soc_component_write(component, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);
769
770 dai_cfg1 = 0xFC & snd_soc_component_read(component, DA7210_DAI_CFG1);
771
772 switch (params_width(params)) {
773 case 16:
774 dai_cfg1 |= DA7210_DAI_WORD_S16_LE;
775 break;
776 case 20:
777 dai_cfg1 |= DA7210_DAI_WORD_S20_3LE;
778 break;
779 case 24:
780 dai_cfg1 |= DA7210_DAI_WORD_S24_LE;
781 break;
782 case 32:
783 dai_cfg1 |= DA7210_DAI_WORD_S32_LE;
784 break;
785 default:
786 return -EINVAL;
787 }
788
789 snd_soc_component_write(component, DA7210_DAI_CFG1, dai_cfg1);
790
791 switch (params_rate(params)) {
792 case 8000:
793 fs = DA7210_PLL_FS_8000;
794 sysclk = 3072000;
795 break;
796 case 11025:
797 fs = DA7210_PLL_FS_11025;
798 sysclk = 2822400;
799 break;
800 case 12000:
801 fs = DA7210_PLL_FS_12000;
802 sysclk = 3072000;
803 break;
804 case 16000:
805 fs = DA7210_PLL_FS_16000;
806 sysclk = 3072000;
807 break;
808 case 22050:
809 fs = DA7210_PLL_FS_22050;
810 sysclk = 2822400;
811 break;
812 case 32000:
813 fs = DA7210_PLL_FS_32000;
814 sysclk = 3072000;
815 break;
816 case 44100:
817 fs = DA7210_PLL_FS_44100;
818 sysclk = 2822400;
819 break;
820 case 48000:
821 fs = DA7210_PLL_FS_48000;
822 sysclk = 3072000;
823 break;
824 case 88200:
825 fs = DA7210_PLL_FS_88200;
826 sysclk = 2822400;
827 break;
828 case 96000:
829 fs = DA7210_PLL_FS_96000;
830 sysclk = 3072000;
831 break;
832 default:
833 return -EINVAL;
834 }
835
836 /* Disable active mode */
837 snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
838
839 snd_soc_component_update_bits(component, DA7210_PLL, DA7210_PLL_FS_MASK, fs);
840
841 if (da7210->mclk_rate && (da7210->mclk_rate != sysclk)) {
842 /* PLL mode, disable PLL bypass */
843 snd_soc_component_update_bits(component, DA7210_PLL_DIV3, DA7210_PLL_BYP, 0);
844
845 if (!da7210->master) {
846 /* PLL slave mode, also enable SRM */
847 snd_soc_component_update_bits(component, DA7210_PLL,
848 (DA7210_MCLK_SRM_EN |
849 DA7210_MCLK_DET_EN),
850 (DA7210_MCLK_SRM_EN |
851 DA7210_MCLK_DET_EN));
852 }
853 } else {
854 /* PLL bypass mode, enable PLL bypass and Auto Detection */
855 snd_soc_component_update_bits(component, DA7210_PLL, DA7210_MCLK_DET_EN,
856 DA7210_MCLK_DET_EN);
857 snd_soc_component_update_bits(component, DA7210_PLL_DIV3, DA7210_PLL_BYP,
858 DA7210_PLL_BYP);
859 }
860 /* Enable active mode */
861 snd_soc_component_update_bits(component, DA7210_STARTUP1,
862 DA7210_SC_MST_EN, DA7210_SC_MST_EN);
863
864 return 0;
865 }
866
867 /*
868 * Set DAI mode and Format
869 */
870 static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
871 {
872 struct snd_soc_component *component = codec_dai->component;
873 struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
874 u32 dai_cfg1;
875 u32 dai_cfg3;
876
877 dai_cfg1 = 0x7f & snd_soc_component_read(component, DA7210_DAI_CFG1);
878 dai_cfg3 = 0xfc & snd_soc_component_read(component, DA7210_DAI_CFG3);
879
880 if ((snd_soc_component_read(component, DA7210_PLL) & DA7210_PLL_EN) &&
881 (!(snd_soc_component_read(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
882 return -EINVAL;
883
884 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
885 case SND_SOC_DAIFMT_CBM_CFM:
886 da7210->master = 1;
887 dai_cfg1 |= DA7210_DAI_MODE_MASTER;
888 break;
889 case SND_SOC_DAIFMT_CBS_CFS:
890 da7210->master = 0;
891 dai_cfg1 |= DA7210_DAI_MODE_SLAVE;
892 break;
893 default:
894 return -EINVAL;
895 }
896
897 /* FIXME
898 *
899 * It support I2S only now
900 */
901 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
902 case SND_SOC_DAIFMT_I2S:
903 dai_cfg3 |= DA7210_DAI_FORMAT_I2SMODE;
904 break;
905 case SND_SOC_DAIFMT_LEFT_J:
906 dai_cfg3 |= DA7210_DAI_FORMAT_LEFT_J;
907 break;
908 case SND_SOC_DAIFMT_RIGHT_J:
909 dai_cfg3 |= DA7210_DAI_FORMAT_RIGHT_J;
910 break;
911 default:
912 return -EINVAL;
913 }
914
915 /* FIXME
916 *
917 * It support 64bit data transmission only now
918 */
919 dai_cfg1 |= DA7210_DAI_FLEN_64BIT;
920
921 snd_soc_component_write(component, DA7210_DAI_CFG1, dai_cfg1);
922 snd_soc_component_write(component, DA7210_DAI_CFG3, dai_cfg3);
923
924 return 0;
925 }
926
927 static int da7210_mute(struct snd_soc_dai *dai, int mute, int direction)
928 {
929 struct snd_soc_component *component = dai->component;
930 u8 mute_reg = snd_soc_component_read(component, DA7210_DAC_HPF) & 0xFB;
931
932 if (mute)
933 snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg | 0x4);
934 else
935 snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg);
936 return 0;
937 }
938
939 #define DA7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
940 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
941
942 static int da7210_set_dai_sysclk(struct snd_soc_dai *codec_dai,
943 int clk_id, unsigned int freq, int dir)
944 {
945 struct snd_soc_component *component = codec_dai->component;
946 struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
947
948 switch (clk_id) {
949 case DA7210_CLKSRC_MCLK:
950 switch (freq) {
951 case 12000000:
952 case 13000000:
953 case 13500000:
954 case 14400000:
955 case 19200000:
956 case 19680000:
957 case 19800000:
958 da7210->mclk_rate = freq;
959 return 0;
960 default:
961 dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
962 freq);
963 return -EINVAL;
964 }
965 break;
966 default:
967 dev_err(codec_dai->dev, "Unknown clock source %d\n", clk_id);
968 return -EINVAL;
969 }
970 }
971
972 /**
973 * da7210_set_dai_pll :Configure the codec PLL
974 * @codec_dai: pointer to codec DAI
975 * @pll_id: da7210 has only one pll, so pll_id is always zero
976 * @source: clock source
977 * @fref: MCLK frequency, should be < 20MHz
978 * @fout: FsDM value, Refer page 44 & 45 of datasheet
979 *
980 * Note: Supported PLL input frequencies are 12MHz, 13MHz, 13.5MHz, 14.4MHz,
981 * 19.2MHz, 19.6MHz and 19.8MHz
982 *
983 * Return: Zero for success, negative error code for error
984 */
985 static int da7210_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
986 int source, unsigned int fref, unsigned int fout)
987 {
988 struct snd_soc_component *component = codec_dai->component;
989 struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
990
991 u8 pll_div1, pll_div2, pll_div3, cnt;
992
993 /* In slave mode, there is only one set of divisors */
994 if (!da7210->master)
995 fout = 2822400;
996
997 /* Search pll div array for correct divisors */
998 for (cnt = 0; cnt < ARRAY_SIZE(da7210_pll_div); cnt++) {
999 /* check fref, mode and fout */
1000 if ((fref == da7210_pll_div[cnt].fref) &&
1001 (da7210->master == da7210_pll_div[cnt].mode) &&
1002 (fout == da7210_pll_div[cnt].fout)) {
1003 /* all match, pick up divisors */
1004 pll_div1 = da7210_pll_div[cnt].div1;
1005 pll_div2 = da7210_pll_div[cnt].div2;
1006 pll_div3 = da7210_pll_div[cnt].div3;
1007 break;
1008 }
1009 }
1010 if (cnt >= ARRAY_SIZE(da7210_pll_div))
1011 goto err;
1012
1013 /* Disable active mode */
1014 snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
1015 /* Write PLL dividers */
1016 snd_soc_component_write(component, DA7210_PLL_DIV1, pll_div1);
1017 snd_soc_component_write(component, DA7210_PLL_DIV2, pll_div2);
1018 snd_soc_component_update_bits(component, DA7210_PLL_DIV3,
1019 DA7210_PLL_DIV_L_MASK, pll_div3);
1020
1021 /* Enable PLL */
1022 snd_soc_component_update_bits(component, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN);
1023
1024 /* Enable active mode */
1025 snd_soc_component_update_bits(component, DA7210_STARTUP1, DA7210_SC_MST_EN,
1026 DA7210_SC_MST_EN);
1027 return 0;
1028 err:
1029 dev_err(codec_dai->dev, "Unsupported PLL input frequency %d\n", fref);
1030 return -EINVAL;
1031 }
1032
1033 /* DAI operations */
1034 static const struct snd_soc_dai_ops da7210_dai_ops = {
1035 .hw_params = da7210_hw_params,
1036 .set_fmt = da7210_set_dai_fmt,
1037 .set_sysclk = da7210_set_dai_sysclk,
1038 .set_pll = da7210_set_dai_pll,
1039 .mute_stream = da7210_mute,
1040 .no_capture_mute = 1,
1041 };
1042
1043 static struct snd_soc_dai_driver da7210_dai = {
1044 .name = "da7210-hifi",
1045 /* playback capabilities */
1046 .playback = {
1047 .stream_name = "Playback",
1048 .channels_min = 1,
1049 .channels_max = 2,
1050 .rates = SNDRV_PCM_RATE_8000_96000,
1051 .formats = DA7210_FORMATS,
1052 },
1053 /* capture capabilities */
1054 .capture = {
1055 .stream_name = "Capture",
1056 .channels_min = 1,
1057 .channels_max = 2,
1058 .rates = SNDRV_PCM_RATE_8000_96000,
1059 .formats = DA7210_FORMATS,
1060 },
1061 .ops = &da7210_dai_ops,
1062 .symmetric_rate = 1,
1063 };
1064
1065 static int da7210_probe(struct snd_soc_component *component)
1066 {
1067 struct da7210_priv *da7210 = snd_soc_component_get_drvdata(component);
1068
1069 dev_info(component->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1070
1071 da7210->mclk_rate = 0; /* This will be set from set_sysclk() */
1072 da7210->master = 0; /* This will be set from set_fmt() */
1073
1074 /* Enable internal regulator & bias current */
1075 snd_soc_component_write(component, DA7210_CONTROL, DA7210_REG_EN | DA7210_BIAS_EN);
1076
1077 /*
1078 * ADC settings
1079 */
1080
1081 /* Enable Left & Right MIC PGA and Mic Bias */
1082 snd_soc_component_write(component, DA7210_MIC_L, DA7210_MIC_L_EN | DA7210_MICBIAS_EN);
1083 snd_soc_component_write(component, DA7210_MIC_R, DA7210_MIC_R_EN);
1084
1085 /* Enable Left and Right input PGA */
1086 snd_soc_component_write(component, DA7210_INMIX_L, DA7210_IN_L_EN);
1087 snd_soc_component_write(component, DA7210_INMIX_R, DA7210_IN_R_EN);
1088
1089 /* Enable Left and Right ADC */
1090 snd_soc_component_write(component, DA7210_ADC, DA7210_ADC_L_EN | DA7210_ADC_R_EN);
1091
1092 /*
1093 * DAC settings
1094 */
1095
1096 /* Enable Left and Right DAC */
1097 snd_soc_component_write(component, DA7210_DAC_SEL,
1098 DA7210_DAC_L_SRC_DAI_L | DA7210_DAC_L_EN |
1099 DA7210_DAC_R_SRC_DAI_R | DA7210_DAC_R_EN);
1100
1101 /* Enable Left and Right out PGA */
1102 snd_soc_component_write(component, DA7210_OUTMIX_L, DA7210_OUT_L_EN);
1103 snd_soc_component_write(component, DA7210_OUTMIX_R, DA7210_OUT_R_EN);
1104
1105 /* Enable Left and Right HeadPhone PGA */
1106 snd_soc_component_write(component, DA7210_HP_CFG,
1107 DA7210_HP_2CAP_MODE | DA7210_HP_SENSE_EN |
1108 DA7210_HP_L_EN | DA7210_HP_MODE | DA7210_HP_R_EN);
1109
1110 /* Enable ramp mode for DAC gain update */
1111 snd_soc_component_write(component, DA7210_SOFTMUTE, DA7210_RAMP_EN);
1112
1113 /*
1114 * For DA7210 codec, there are two ways to enable/disable analog IOs
1115 * and ADC/DAC,
1116 * (1) Using "Enable Bit" of register associated with that IO
1117 * (or ADC/DAC)
1118 * e.g. Mic Left can be enabled using bit 7 of MIC_L(0x7) reg
1119 *
1120 * (2) Using "Standby Bit" of STARTUP2 or STARTUP3 register
1121 * e.g. Mic left can be put to STANDBY using bit 0 of STARTUP3(0x5)
1122 *
1123 * Out of these two methods, the one using STANDBY bits is preferred
1124 * way to enable/disable individual blocks. This is because STANDBY
1125 * registers are part of system controller which allows system power
1126 * up/down in a controlled, pop-free manner. Also, as per application
1127 * note of DA7210, STANDBY register bits are only effective if a
1128 * particular IO (or ADC/DAC) is already enabled using enable/disable
1129 * register bits. Keeping these things in mind, current DAPM
1130 * implementation manipulates only STANDBY bits.
1131 *
1132 * Overall implementation can be outlined as below,
1133 *
1134 * - "Enable bit" of an IO or ADC/DAC is used to enable it in probe()
1135 * - "STANDBY bit" is controlled by DAPM
1136 */
1137
1138 /* Enable Line out amplifiers */
1139 snd_soc_component_write(component, DA7210_OUT1_L, DA7210_OUT1_L_EN);
1140 snd_soc_component_write(component, DA7210_OUT1_R, DA7210_OUT1_R_EN);
1141 snd_soc_component_write(component, DA7210_OUT2, DA7210_OUT2_EN |
1142 DA7210_OUT2_OUTMIX_L | DA7210_OUT2_OUTMIX_R);
1143
1144 /* Enable Aux1 */
1145 snd_soc_component_write(component, DA7210_AUX1_L, DA7210_AUX1_L_EN);
1146 snd_soc_component_write(component, DA7210_AUX1_R, DA7210_AUX1_R_EN);
1147 /* Enable Aux2 */
1148 snd_soc_component_write(component, DA7210_AUX2, DA7210_AUX2_EN);
1149
1150 /* Set PLL Master clock range 10-20 MHz, enable PLL bypass */
1151 snd_soc_component_write(component, DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ |
1152 DA7210_PLL_BYP);
1153
1154 /* Diable PLL and bypass it */
1155 snd_soc_component_write(component, DA7210_PLL, DA7210_PLL_FS_48000);
1156
1157 /* Activate all enabled subsystem */
1158 snd_soc_component_write(component, DA7210_STARTUP1, DA7210_SC_MST_EN);
1159
1160 dev_info(component->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
1161
1162 return 0;
1163 }
1164
1165 static const struct snd_soc_component_driver soc_component_dev_da7210 = {
1166 .probe = da7210_probe,
1167 .controls = da7210_snd_controls,
1168 .num_controls = ARRAY_SIZE(da7210_snd_controls),
1169 .dapm_widgets = da7210_dapm_widgets,
1170 .num_dapm_widgets = ARRAY_SIZE(da7210_dapm_widgets),
1171 .dapm_routes = da7210_audio_map,
1172 .num_dapm_routes = ARRAY_SIZE(da7210_audio_map),
1173 .idle_bias_on = 1,
1174 .use_pmdown_time = 1,
1175 .endianness = 1,
1176 };
1177
1178 #if IS_ENABLED(CONFIG_I2C)
1179
1180 static const struct reg_sequence da7210_regmap_i2c_patch[] = {
1181
1182 /* System controller master disable */
1183 { DA7210_STARTUP1, 0x00 },
1184 /* Set PLL Master clock range 10-20 MHz */
1185 { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1186
1187 /* to unlock */
1188 { DA7210_A_HID_UNLOCK, 0x8B},
1189 { DA7210_A_TEST_UNLOCK, 0xB4},
1190 { DA7210_A_PLL1, 0x01},
1191 { DA7210_A_CP_MODE, 0x7C},
1192 /* to re-lock */
1193 { DA7210_A_HID_UNLOCK, 0x00},
1194 { DA7210_A_TEST_UNLOCK, 0x00},
1195 };
1196
1197 static const struct regmap_config da7210_regmap_config_i2c = {
1198 .reg_bits = 8,
1199 .val_bits = 8,
1200
1201 .reg_defaults = da7210_reg_defaults,
1202 .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1203 .volatile_reg = da7210_volatile_register,
1204 .readable_reg = da7210_readable_register,
1205 .cache_type = REGCACHE_RBTREE,
1206 };
1207
1208 static int da7210_i2c_probe(struct i2c_client *i2c)
1209 {
1210 struct da7210_priv *da7210;
1211 int ret;
1212
1213 da7210 = devm_kzalloc(&i2c->dev, sizeof(struct da7210_priv),
1214 GFP_KERNEL);
1215 if (!da7210)
1216 return -ENOMEM;
1217
1218 i2c_set_clientdata(i2c, da7210);
1219
1220 da7210->regmap = devm_regmap_init_i2c(i2c, &da7210_regmap_config_i2c);
1221 if (IS_ERR(da7210->regmap)) {
1222 ret = PTR_ERR(da7210->regmap);
1223 dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
1224 return ret;
1225 }
1226
1227 ret = regmap_register_patch(da7210->regmap, da7210_regmap_i2c_patch,
1228 ARRAY_SIZE(da7210_regmap_i2c_patch));
1229 if (ret != 0)
1230 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1231
1232 ret = devm_snd_soc_register_component(&i2c->dev,
1233 &soc_component_dev_da7210, &da7210_dai, 1);
1234 if (ret < 0)
1235 dev_err(&i2c->dev, "Failed to register component: %d\n", ret);
1236
1237 return ret;
1238 }
1239
1240 static const struct i2c_device_id da7210_i2c_id[] = {
1241 { "da7210" },
1242 { }
1243 };
1244 MODULE_DEVICE_TABLE(i2c, da7210_i2c_id);
1245
1246 /* I2C codec control layer */
1247 static struct i2c_driver da7210_i2c_driver = {
1248 .driver = {
1249 .name = "da7210",
1250 },
1251 .probe = da7210_i2c_probe,
1252 .id_table = da7210_i2c_id,
1253 };
1254 #endif
1255
1256 #if defined(CONFIG_SPI_MASTER)
1257
1258 static const struct reg_sequence da7210_regmap_spi_patch[] = {
1259 /* Dummy read to give two pulses over nCS for SPI */
1260 { DA7210_AUX2, 0x00 },
1261 { DA7210_AUX2, 0x00 },
1262
1263 /* System controller master disable */
1264 { DA7210_STARTUP1, 0x00 },
1265 /* Set PLL Master clock range 10-20 MHz */
1266 { DA7210_PLL_DIV3, DA7210_MCLK_RANGE_10_20_MHZ },
1267
1268 /* to set PAGE1 of SPI register space */
1269 { DA7210_PAGE_CONTROL, 0x80 },
1270 /* to unlock */
1271 { DA7210_A_HID_UNLOCK, 0x8B},
1272 { DA7210_A_TEST_UNLOCK, 0xB4},
1273 { DA7210_A_PLL1, 0x01},
1274 { DA7210_A_CP_MODE, 0x7C},
1275 /* to re-lock */
1276 { DA7210_A_HID_UNLOCK, 0x00},
1277 { DA7210_A_TEST_UNLOCK, 0x00},
1278 /* to set back PAGE0 of SPI register space */
1279 { DA7210_PAGE_CONTROL, 0x00 },
1280 };
1281
1282 static const struct regmap_config da7210_regmap_config_spi = {
1283 .reg_bits = 8,
1284 .val_bits = 8,
1285 .read_flag_mask = 0x01,
1286 .write_flag_mask = 0x00,
1287
1288 .reg_defaults = da7210_reg_defaults,
1289 .num_reg_defaults = ARRAY_SIZE(da7210_reg_defaults),
1290 .volatile_reg = da7210_volatile_register,
1291 .readable_reg = da7210_readable_register,
1292 .cache_type = REGCACHE_RBTREE,
1293 };
1294
1295 static int da7210_spi_probe(struct spi_device *spi)
1296 {
1297 struct da7210_priv *da7210;
1298 int ret;
1299
1300 da7210 = devm_kzalloc(&spi->dev, sizeof(struct da7210_priv),
1301 GFP_KERNEL);
1302 if (!da7210)
1303 return -ENOMEM;
1304
1305 spi_set_drvdata(spi, da7210);
1306 da7210->regmap = devm_regmap_init_spi(spi, &da7210_regmap_config_spi);
1307 if (IS_ERR(da7210->regmap)) {
1308 ret = PTR_ERR(da7210->regmap);
1309 dev_err(&spi->dev, "Failed to register regmap: %d\n", ret);
1310 return ret;
1311 }
1312
1313 ret = regmap_register_patch(da7210->regmap, da7210_regmap_spi_patch,
1314 ARRAY_SIZE(da7210_regmap_spi_patch));
1315 if (ret != 0)
1316 dev_warn(&spi->dev, "Failed to apply regmap patch: %d\n", ret);
1317
1318 ret = devm_snd_soc_register_component(&spi->dev,
1319 &soc_component_dev_da7210, &da7210_dai, 1);
1320
1321 return ret;
1322 }
1323
1324 static struct spi_driver da7210_spi_driver = {
1325 .driver = {
1326 .name = "da7210",
1327 },
1328 .probe = da7210_spi_probe,
1329 };
1330 #endif
1331
1332 static int __init da7210_modinit(void)
1333 {
1334 int ret = 0;
1335 #if IS_ENABLED(CONFIG_I2C)
1336 ret = i2c_add_driver(&da7210_i2c_driver);
1337 if (ret)
1338 return ret;
1339 #endif
1340 #if defined(CONFIG_SPI_MASTER)
1341 ret = spi_register_driver(&da7210_spi_driver);
1342 if (ret) {
1343 printk(KERN_ERR "Failed to register da7210 SPI driver: %d\n",
1344 ret);
1345 }
1346 #endif
1347 return ret;
1348 }
1349 module_init(da7210_modinit);
1350
1351 static void __exit da7210_exit(void)
1352 {
1353 #if IS_ENABLED(CONFIG_I2C)
1354 i2c_del_driver(&da7210_i2c_driver);
1355 #endif
1356 #if defined(CONFIG_SPI_MASTER)
1357 spi_unregister_driver(&da7210_spi_driver);
1358 #endif
1359 }
1360 module_exit(da7210_exit);
1361
1362 MODULE_DESCRIPTION("ASoC DA7210 driver");
1363 MODULE_AUTHOR("David Chen, Kuninori Morimoto");
1364 MODULE_LICENSE("GPL");
1365
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