1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2022 Analog Devices Inc. */
3
4 #ifndef _MAX98363_H
5 #define _MAX98363_H
6
7 #define MAX98363_R2000_SW_RESET 0x2000
8 #define MAX98363_R2001_INTR_RAW 0x2001
9 #define MAX98363_R2003_INTR_STATE 0x2003
10 #define MAX98363_R2005_INTR_FALG 0x2005
11 #define MAX98363_R2007_INTR_EN 0x2007
12 #define MAX98363_R2009_INTR_CLR 0x2009
13 #define MAX98363_R2021_ERR_MON_CTRL 0x2021
14 #define MAX98363_R2022_SPK_MON_THRESH 0x2022
15 #define MAX98363_R2023_SPK_MON_DURATION 0x2023
16 #define MAX98363_R2030_TONE_GEN_CFG 0x2030
17 #define MAX98363_R203F_TONE_GEN_EN 0x203F
18 #define MAX98363_R2040_AMP_VOL 0x2040
19 #define MAX98363_R2041_AMP_GAIN 0x2041
20 #define MAX98363_R2042_DSP_CFG 0x2042
21 #define MAX98363_R21FF_REV_ID 0x21FF
22
23 /* MAX98363_R2021_ERR_MON_CTRL */
24 #define MAX98363_SPKMON_SHIFT (3)
25 #define MAX98363_CLOCK_MON_SHIFT (0)
26
27 /* MAX98363_R2042_DSP_CFG */
28 #define MAX98363_AMP_DSP_CFG_RMP_SHIFT (3)
29
30 struct max98363_priv {
31 struct regmap *regmap;
32 struct sdw_slave *slave;
33 bool hw_init;
34 bool first_hw_init;
35 };
36 #endif
37
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