1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * rt711-sdca.h -- RT711 SDCA ALSA SoC audio driver header
4 *
5 * Copyright(c) 2021 Realtek Semiconductor Corp.
6 */
7
8 #ifndef __RT711_SDCA_H__
9 #define __RT711_SDCA_H__
10
11 #include <linux/pm.h>
12 #include <linux/regmap.h>
13 #include <linux/soundwire/sdw.h>
14 #include <linux/soundwire/sdw_type.h>
15 #include <sound/soc.h>
16 #include <linux/workqueue.h>
17
18 struct rt711_sdca_priv {
19 struct regmap *regmap, *mbq_regmap;
20 struct snd_soc_component *component;
21 struct sdw_slave *slave;
22 struct sdw_bus_params params;
23 bool hw_init;
24 bool first_hw_init;
25 struct snd_soc_jack *hs_jack;
26 struct delayed_work jack_detect_work;
27 struct delayed_work jack_btn_check_work;
28 struct mutex calibrate_mutex; /* for headset calibration */
29 struct mutex disable_irq_lock; /* SDCA irq lock protection */
30 bool disable_irq;
31 int jack_type, jd_src;
32 unsigned int scp_sdca_stat1, scp_sdca_stat2;
33 int hw_ver;
34 bool fu0f_dapm_mute, fu0f_mixer_l_mute, fu0f_mixer_r_mute;
35 bool fu1e_dapm_mute, fu1e_mixer_l_mute, fu1e_mixer_r_mute;
36 unsigned int ge_mode_override;
37 };
38
39 /* NID */
40 #define RT711_AUDIO_FUNCTION_GROUP 0x01
41 #define RT711_DAC_OUT2 0x03
42 #define RT711_ADC_IN1 0x09
43 #define RT711_ADC_IN2 0x08
44 #define RT711_DMIC1 0x12
45 #define RT711_DMIC2 0x13
46 #define RT711_MIC2 0x19
47 #define RT711_LINE1 0x1a
48 #define RT711_LINE2 0x1b
49 #define RT711_BEEP 0x1d
50 #define RT711_VENDOR_REG 0x20
51 #define RT711_HP_OUT 0x21
52 #define RT711_MIXER_IN1 0x22
53 #define RT711_MIXER_IN2 0x23
54 #define RT711_INLINE_CMD 0x55
55 #define RT711_VENDOR_CALI 0x58
56 #define RT711_VENDOR_IMS_DRE 0x5b
57 #define RT711_VENDOR_VAD 0x5e
58 #define RT711_VENDOR_ANALOG_CTL 0x5f
59 #define RT711_VENDOR_HDA_CTL 0x61
60
61 /* Index (NID:20h) */
62 #define RT711_JD_PRODUCT_NUM 0x00
63 #define RT711_DMIC_CTL1 0x06
64 #define RT711_JD_CTL1 0x08
65 #define RT711_JD_CTL2 0x09
66 #define RT711_CC_DET1 0x11
67 #define RT711_PARA_VERB_CTL 0x1a
68 #define RT711_COMBO_JACK_AUTO_CTL1 0x45
69 #define RT711_COMBO_JACK_AUTO_CTL2 0x46
70 #define RT711_COMBO_JACK_AUTO_CTL3 0x47
71 #define RT711_INLINE_CMD_CTL 0x48
72 #define RT711_DIGITAL_MISC_CTRL4 0x4a
73 #define RT711_JD_CTRL6 0x6a
74 #define RT711_VREFOUT_CTL 0x6b
75 #define RT711_GPIO_TEST_MODE_CTL2 0x6d
76 #define RT711_FSM_CTL 0x6f
77 #define RT711_IRQ_FLAG_TABLE1 0x80
78 #define RT711_IRQ_FLAG_TABLE2 0x81
79 #define RT711_IRQ_FLAG_TABLE3 0x82
80 #define RT711_HP_FSM_CTL 0x83
81 #define RT711_TX_RX_MUX_CTL 0x91
82 #define RT711_FILTER_SRC_SEL 0xb0
83 #define RT711_ADC27_VOL_SET 0xb7
84
85 /* Index (NID:58h) */
86 #define RT711_DAC_DC_CALI_CTL1 0x00
87 #define RT711_DAC_DC_CALI_CTL2 0x01
88
89 /* Index (NID:5bh) */
90 #define RT711_IMS_DIGITAL_CTL1 0x00
91 #define RT711_HP_IMS_RESULT_L 0x20
92 #define RT711_HP_IMS_RESULT_R 0x21
93
94 /* Index (NID:5eh) */
95 #define RT711_VAD_SRAM_CTL1 0x10
96
97 /* Index (NID:5fh) */
98 #define RT711_MISC_POWER_CTL0 0x01
99 #define RT711_MISC_POWER_CTL4 0x05
100
101 /* Index (NID:61h) */
102 #define RT711_HDA_LEGACY_MUX_CTL1 0x00
103 #define RT711_HDA_LEGACY_UNSOLICITED_CTL 0x03
104 #define RT711_HDA_LEGACY_CONFIG_CTL 0x06
105 #define RT711_HDA_LEGACY_RESET_CTL 0x08
106 #define RT711_HDA_LEGACY_GPIO_CTL 0x0a
107 #define RT711_ADC08_09_PDE_CTL 0x24
108 #define RT711_GE_MODE_RELATED_CTL 0x35
109 #define RT711_PUSH_BTN_INT_CTL0 0x36
110 #define RT711_PUSH_BTN_INT_CTL1 0x37
111 #define RT711_PUSH_BTN_INT_CTL2 0x38
112 #define RT711_PUSH_BTN_INT_CTL6 0x3c
113 #define RT711_PUSH_BTN_INT_CTL7 0x3d
114 #define RT711_PUSH_BTN_INT_CTL9 0x3f
115
116 /* DAC DC offset calibration control-1 (0x00)(NID:20h) */
117 #define RT711_DAC_DC_CALI_TRIGGER (0x1 << 15)
118 #define RT711_DAC_DC_CALI_CLK_EN (0x1 << 14)
119 #define RT711_DAC_DC_FORCE_CALI_RST (0x1 << 3)
120
121 /* jack detect control 1 (0x08)(NID:20h) */
122 #define RT711_JD2_DIGITAL_MODE_SEL (0x1 << 1)
123
124 /* jack detect control 2 (0x09)(NID:20h) */
125 #define RT711_JD2_2PORT_200K_DECODE_HP (0x1 << 13)
126 #define RT711_JD2_2PORT_100K_DECODE_MASK (0x1 << 12)
127 #define RT711_JD2_2PORT_100K_DECODE_HP (0x0 << 12)
128 #define RT711_HP_JD_SEL_JD1 (0x0 << 1)
129 #define RT711_HP_JD_SEL_JD2 (0x1 << 1)
130
131 /* CC DET1 (0x11)(NID:20h) */
132 #define RT711_HP_JD_FINAL_RESULT_CTL_JD12 (0x1 << 10)
133 #define RT711_HP_JD_FINAL_RESULT_CTL_CCDET (0x0 << 10)
134 #define RT711_POW_CC1_AGPI (0x1 << 5)
135 #define RT711_POW_CC1_AGPI_ON (0x1 << 5)
136 #define RT711_POW_CC1_AGPI_OFF (0x0 << 5)
137
138 /* Parameter & Verb control (0x1a)(NID:20h) */
139 #define RT711_HIDDEN_REG_SW_RESET (0x1 << 14)
140
141 /* combo jack auto switch control 2 (0x46)(NID:20h) */
142 #define RT711_COMBOJACK_AUTO_DET_STATUS (0x1 << 11)
143 #define RT711_COMBOJACK_AUTO_DET_TRS (0x1 << 10)
144 #define RT711_COMBOJACK_AUTO_DET_CTIA (0x1 << 9)
145 #define RT711_COMBOJACK_AUTO_DET_OMTP (0x1 << 8)
146
147 /* FSM control (0x6f)(NID:20h) */
148 #define RT711_CALI_CTL (0x0 << 0)
149 #define RT711_COMBOJACK_CTL (0x1 << 0)
150 #define RT711_IMS_CTL (0x2 << 0)
151 #define RT711_DEPOP_CTL (0x3 << 0)
152 #define RT711_FSM_IMP_EN (0x1 << 6)
153
154 /* Impedance Sense Digital Control 1 (0x00)(NID:5bh) */
155 #define RT711_TRIGGER_IMS (0x1 << 15)
156 #define RT711_IMS_EN (0x1 << 6)
157
158 #define RT711_EAPD_HIGH 0x2
159 #define RT711_EAPD_LOW 0x0
160 #define RT711_MUTE_SFT 7
161 /* set input/output mapping to payload[14][15] separately */
162 #define RT711_DIR_IN_SFT 6
163 #define RT711_DIR_OUT_SFT 7
164
165 /* RC Calibration register */
166 #define RT711_RC_CAL_STATUS 0x320c
167
168 /* Buffer address for HID */
169 #define RT711_BUF_ADDR_HID1 0x44030000
170 #define RT711_BUF_ADDR_HID2 0x44030020
171
172 /* RT711 SDCA Control - function number */
173 #define FUNC_NUM_JACK_CODEC 0x01
174 #define FUNC_NUM_MIC_ARRAY 0x02
175 #define FUNC_NUM_HID 0x03
176
177 /* RT711 SDCA entity */
178 #define RT711_SDCA_ENT_HID01 0x01
179 #define RT711_SDCA_ENT_GE49 0x49
180 #define RT711_SDCA_ENT_USER_FU05 0x05
181 #define RT711_SDCA_ENT_USER_FU0F 0x0f
182 #define RT711_SDCA_ENT_USER_FU1E 0x1e
183 #define RT711_SDCA_ENT_PLATFORM_FU15 0x15
184 #define RT711_SDCA_ENT_PLATFORM_FU44 0x44
185 #define RT711_SDCA_ENT_PDE28 0x28
186 #define RT711_SDCA_ENT_PDE29 0x29
187 #define RT711_SDCA_ENT_PDE2A 0x2a
188 #define RT711_SDCA_ENT_CS01 0x01
189 #define RT711_SDCA_ENT_CS11 0x11
190 #define RT711_SDCA_ENT_CS1F 0x1f
191 #define RT711_SDCA_ENT_OT1 0x06
192 #define RT711_SDCA_ENT_LINE1 0x09
193 #define RT711_SDCA_ENT_LINE2 0x31
194 #define RT711_SDCA_ENT_PDELINE2 0x36
195 #define RT711_SDCA_ENT_USER_FU9 0x41
196
197 /* RT711 SDCA control */
198 #define RT711_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
199 #define RT711_SDCA_CTL_FU_CH_GAIN 0x0b
200 #define RT711_SDCA_CTL_FU_MUTE 0x01
201 #define RT711_SDCA_CTL_FU_VOLUME 0x02
202 #define RT711_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10
203 #define RT711_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11
204 #define RT711_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12
205 #define RT711_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13
206 #define RT711_SDCA_CTL_SELECTED_MODE 0x01
207 #define RT711_SDCA_CTL_DETECTED_MODE 0x02
208 #define RT711_SDCA_CTL_REQ_POWER_STATE 0x01
209 #define RT711_SDCA_CTL_VENDOR_DEF 0x30
210
211 /* RT711 SDCA channel */
212 #define CH_L 0x01
213 #define CH_R 0x02
214
215 /* sample frequency index */
216 #define RT711_SDCA_RATE_44100HZ 0x08
217 #define RT711_SDCA_RATE_48000HZ 0x09
218 #define RT711_SDCA_RATE_96000HZ 0x0b
219 #define RT711_SDCA_RATE_192000HZ 0x0d
220
221 enum {
222 RT711_AIF1,
223 RT711_AIF2,
224 RT711_AIFS,
225 };
226
227 enum rt711_sdca_jd_src {
228 RT711_JD_NULL,
229 RT711_JD1,
230 RT711_JD2,
231 RT711_JD2_100K
232 };
233
234 enum rt711_sdca_ver {
235 RT711_VER_VD0,
236 RT711_VER_VD1
237 };
238
239 int rt711_sdca_io_init(struct device *dev, struct sdw_slave *slave);
240 int rt711_sdca_init(struct device *dev, struct regmap *regmap,
241 struct regmap *mbq_regmap, struct sdw_slave *slave);
242
243 int rt711_sdca_jack_detect(struct rt711_sdca_priv *rt711, bool *hp, bool *mic);
244 #endif /* __RT711_SDCA_H__ */
245
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