1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Driver for the Texas Instruments TAS2764 CODEC
4 // Copyright (C) 2020 Texas Instruments Inc.
5
6 #include <linux/module.h>
7 #include <linux/moduleparam.h>
8 #include <linux/err.h>
9 #include <linux/init.h>
10 #include <linux/delay.h>
11 #include <linux/pm.h>
12 #include <linux/i2c.h>
13 #include <linux/gpio.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/regmap.h>
17 #include <linux/of.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
24
25 #include "tas2764.h"
26
27 struct tas2764_priv {
28 struct snd_soc_component *component;
29 struct gpio_desc *reset_gpio;
30 struct gpio_desc *sdz_gpio;
31 struct regmap *regmap;
32 struct device *dev;
33 int irq;
34
35 int v_sense_slot;
36 int i_sense_slot;
37
38 bool dac_powered;
39 bool unmuted;
40 };
41
42 static const char *tas2764_int_ltch0_msgs[8] = {
43 "fault: over temperature", /* INT_LTCH0 & BIT(0) */
44 "fault: over current",
45 "fault: bad TDM clock",
46 "limiter active",
47 "fault: PVDD below limiter inflection point",
48 "fault: limiter max attenuation",
49 "fault: BOP infinite hold",
50 "fault: BOP mute", /* INT_LTCH0 & BIT(7) */
51 };
52
53 static const unsigned int tas2764_int_readout_regs[6] = {
54 TAS2764_INT_LTCH0,
55 TAS2764_INT_LTCH1,
56 TAS2764_INT_LTCH1_0,
57 TAS2764_INT_LTCH2,
58 TAS2764_INT_LTCH3,
59 TAS2764_INT_LTCH4,
60 };
61
62 static irqreturn_t tas2764_irq(int irq, void *data)
63 {
64 struct tas2764_priv *tas2764 = data;
65 u8 latched[6] = {0, 0, 0, 0, 0, 0};
66 int ret = IRQ_NONE;
67 int i;
68
69 for (i = 0; i < ARRAY_SIZE(latched); i++)
70 latched[i] = snd_soc_component_read(tas2764->component,
71 tas2764_int_readout_regs[i]);
72
73 for (i = 0; i < 8; i++) {
74 if (latched[0] & BIT(i)) {
75 dev_crit_ratelimited(tas2764->dev, "%s\n",
76 tas2764_int_ltch0_msgs[i]);
77 ret = IRQ_HANDLED;
78 }
79 }
80
81 if (latched[0]) {
82 dev_err_ratelimited(tas2764->dev, "other context to the fault: %02x,%02x,%02x,%02x,%02x",
83 latched[1], latched[2], latched[3], latched[4], latched[5]);
84 snd_soc_component_update_bits(tas2764->component,
85 TAS2764_INT_CLK_CFG,
86 TAS2764_INT_CLK_CFG_IRQZ_CLR,
87 TAS2764_INT_CLK_CFG_IRQZ_CLR);
88 }
89
90 return ret;
91 }
92
93 static void tas2764_reset(struct tas2764_priv *tas2764)
94 {
95 if (tas2764->reset_gpio) {
96 gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
97 msleep(20);
98 gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
99 usleep_range(1000, 2000);
100 }
101
102 snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
103 TAS2764_RST);
104 usleep_range(1000, 2000);
105 }
106
107 static int tas2764_update_pwr_ctrl(struct tas2764_priv *tas2764)
108 {
109 struct snd_soc_component *component = tas2764->component;
110 unsigned int val;
111 int ret;
112
113 if (tas2764->dac_powered)
114 val = tas2764->unmuted ?
115 TAS2764_PWR_CTRL_ACTIVE : TAS2764_PWR_CTRL_MUTE;
116 else
117 val = TAS2764_PWR_CTRL_SHUTDOWN;
118
119 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
120 TAS2764_PWR_CTRL_MASK, val);
121 if (ret < 0)
122 return ret;
123
124 return 0;
125 }
126
127 #ifdef CONFIG_PM
128 static int tas2764_codec_suspend(struct snd_soc_component *component)
129 {
130 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
131 int ret;
132
133 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
134 TAS2764_PWR_CTRL_MASK,
135 TAS2764_PWR_CTRL_SHUTDOWN);
136
137 if (ret < 0)
138 return ret;
139
140 if (tas2764->sdz_gpio)
141 gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
142
143 regcache_cache_only(tas2764->regmap, true);
144 regcache_mark_dirty(tas2764->regmap);
145
146 return 0;
147 }
148
149 static int tas2764_codec_resume(struct snd_soc_component *component)
150 {
151 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
152 int ret;
153
154 if (tas2764->sdz_gpio) {
155 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
156 usleep_range(1000, 2000);
157 }
158
159 ret = tas2764_update_pwr_ctrl(tas2764);
160
161 if (ret < 0)
162 return ret;
163
164 regcache_cache_only(tas2764->regmap, false);
165
166 return regcache_sync(tas2764->regmap);
167 }
168 #else
169 #define tas2764_codec_suspend NULL
170 #define tas2764_codec_resume NULL
171 #endif
172
173 static const char * const tas2764_ASI1_src[] = {
174 "I2C offset", "Left", "Right", "LeftRightDiv2",
175 };
176
177 static SOC_ENUM_SINGLE_DECL(
178 tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, TAS2764_TDM_CFG2_SCFG_SHIFT,
179 tas2764_ASI1_src);
180
181 static const struct snd_kcontrol_new tas2764_asi1_mux =
182 SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
183
184 static int tas2764_dac_event(struct snd_soc_dapm_widget *w,
185 struct snd_kcontrol *kcontrol, int event)
186 {
187 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
188 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
189 int ret;
190
191 switch (event) {
192 case SND_SOC_DAPM_POST_PMU:
193 tas2764->dac_powered = true;
194 ret = tas2764_update_pwr_ctrl(tas2764);
195 break;
196 case SND_SOC_DAPM_PRE_PMD:
197 tas2764->dac_powered = false;
198 ret = tas2764_update_pwr_ctrl(tas2764);
199 break;
200 default:
201 dev_err(tas2764->dev, "Unsupported event\n");
202 return -EINVAL;
203 }
204
205 if (ret < 0)
206 return ret;
207
208 return 0;
209 }
210
211 static const struct snd_kcontrol_new isense_switch =
212 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
213 static const struct snd_kcontrol_new vsense_switch =
214 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
215
216 static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
217 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
218 SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
219 SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
220 1, &isense_switch),
221 SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
222 1, &vsense_switch),
223 SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2764_dac_event,
224 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
225 SND_SOC_DAPM_OUTPUT("OUT"),
226 SND_SOC_DAPM_SIGGEN("VMON"),
227 SND_SOC_DAPM_SIGGEN("IMON")
228 };
229
230 static const struct snd_soc_dapm_route tas2764_audio_map[] = {
231 {"ASI1 Sel", "I2C offset", "ASI1"},
232 {"ASI1 Sel", "Left", "ASI1"},
233 {"ASI1 Sel", "Right", "ASI1"},
234 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
235 {"DAC", NULL, "ASI1 Sel"},
236 {"OUT", NULL, "DAC"},
237 {"ISENSE", "Switch", "IMON"},
238 {"VSENSE", "Switch", "VMON"},
239 };
240
241 static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
242 {
243 struct tas2764_priv *tas2764 =
244 snd_soc_component_get_drvdata(dai->component);
245
246 tas2764->unmuted = !mute;
247 return tas2764_update_pwr_ctrl(tas2764);
248 }
249
250 static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
251 {
252 struct snd_soc_component *component = tas2764->component;
253 int sense_en;
254 int val;
255 int ret;
256
257 switch (bitwidth) {
258 case SNDRV_PCM_FORMAT_S16_LE:
259 ret = snd_soc_component_update_bits(component,
260 TAS2764_TDM_CFG2,
261 TAS2764_TDM_CFG2_RXW_MASK,
262 TAS2764_TDM_CFG2_RXW_16BITS);
263 break;
264 case SNDRV_PCM_FORMAT_S24_LE:
265 ret = snd_soc_component_update_bits(component,
266 TAS2764_TDM_CFG2,
267 TAS2764_TDM_CFG2_RXW_MASK,
268 TAS2764_TDM_CFG2_RXW_24BITS);
269 break;
270 case SNDRV_PCM_FORMAT_S32_LE:
271 ret = snd_soc_component_update_bits(component,
272 TAS2764_TDM_CFG2,
273 TAS2764_TDM_CFG2_RXW_MASK,
274 TAS2764_TDM_CFG2_RXW_32BITS);
275 break;
276
277 default:
278 return -EINVAL;
279 }
280
281 if (ret < 0)
282 return ret;
283
284 val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
285 if (val < 0)
286 return val;
287
288 if (val & (1 << TAS2764_VSENSE_POWER_EN))
289 sense_en = 0;
290 else
291 sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
292
293 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
294 TAS2764_TDM_CFG5_VSNS_ENABLE,
295 sense_en);
296 if (ret < 0)
297 return ret;
298
299 if (val & (1 << TAS2764_ISENSE_POWER_EN))
300 sense_en = 0;
301 else
302 sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
303
304 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
305 TAS2764_TDM_CFG6_ISNS_ENABLE,
306 sense_en);
307 if (ret < 0)
308 return ret;
309
310 return 0;
311 }
312
313 static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
314 {
315 struct snd_soc_component *component = tas2764->component;
316 int ramp_rate_val;
317 int ret;
318
319 switch (samplerate) {
320 case 48000:
321 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
322 TAS2764_TDM_CFG0_44_1_48KHZ;
323 break;
324 case 44100:
325 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
326 TAS2764_TDM_CFG0_44_1_48KHZ;
327 break;
328 case 96000:
329 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
330 TAS2764_TDM_CFG0_88_2_96KHZ;
331 break;
332 case 88200:
333 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
334 TAS2764_TDM_CFG0_88_2_96KHZ;
335 break;
336 default:
337 return -EINVAL;
338 }
339
340 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
341 TAS2764_TDM_CFG0_SMP_MASK |
342 TAS2764_TDM_CFG0_MASK,
343 ramp_rate_val);
344 if (ret < 0)
345 return ret;
346
347 return 0;
348 }
349
350 static int tas2764_hw_params(struct snd_pcm_substream *substream,
351 struct snd_pcm_hw_params *params,
352 struct snd_soc_dai *dai)
353 {
354 struct snd_soc_component *component = dai->component;
355 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
356 int ret;
357
358 ret = tas2764_set_bitwidth(tas2764, params_format(params));
359 if (ret < 0)
360 return ret;
361
362 return tas2764_set_samplerate(tas2764, params_rate(params));
363 }
364
365 static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
366 {
367 struct snd_soc_component *component = dai->component;
368 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
369 u8 tdm_rx_start_slot = 0, asi_cfg_0 = 0, asi_cfg_1 = 0;
370 int ret;
371
372 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
373 case SND_SOC_DAIFMT_NB_IF:
374 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
375 fallthrough;
376 case SND_SOC_DAIFMT_NB_NF:
377 asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
378 break;
379 case SND_SOC_DAIFMT_IB_IF:
380 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
381 fallthrough;
382 case SND_SOC_DAIFMT_IB_NF:
383 asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
384 break;
385 }
386
387 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
388 TAS2764_TDM_CFG1_RX_MASK,
389 asi_cfg_1);
390 if (ret < 0)
391 return ret;
392
393 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
394 case SND_SOC_DAIFMT_I2S:
395 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
396 fallthrough;
397 case SND_SOC_DAIFMT_DSP_A:
398 tdm_rx_start_slot = 1;
399 break;
400 case SND_SOC_DAIFMT_DSP_B:
401 case SND_SOC_DAIFMT_LEFT_J:
402 tdm_rx_start_slot = 0;
403 break;
404 default:
405 dev_err(tas2764->dev,
406 "DAI Format is not found, fmt=0x%x\n", fmt);
407 return -EINVAL;
408 }
409
410 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
411 TAS2764_TDM_CFG0_FRAME_START,
412 asi_cfg_0);
413 if (ret < 0)
414 return ret;
415
416 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
417 TAS2764_TDM_CFG1_MASK,
418 (tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
419 if (ret < 0)
420 return ret;
421
422 return 0;
423 }
424
425 static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
426 unsigned int tx_mask,
427 unsigned int rx_mask,
428 int slots, int slot_width)
429 {
430 struct snd_soc_component *component = dai->component;
431 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
432 int left_slot, right_slot;
433 int slots_cfg;
434 int slot_size;
435 int ret;
436
437 if (tx_mask == 0 || rx_mask != 0)
438 return -EINVAL;
439
440 left_slot = __ffs(tx_mask);
441 tx_mask &= ~(1 << left_slot);
442 if (tx_mask == 0) {
443 right_slot = left_slot;
444 } else {
445 right_slot = __ffs(tx_mask);
446 tx_mask &= ~(1 << right_slot);
447 }
448
449 if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
450 return -EINVAL;
451
452 slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
453
454 ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
455 if (ret)
456 return ret;
457
458 switch (slot_width) {
459 case 16:
460 slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
461 break;
462 case 24:
463 slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
464 break;
465 case 32:
466 slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
467 break;
468 default:
469 return -EINVAL;
470 }
471
472 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
473 TAS2764_TDM_CFG2_RXS_MASK,
474 slot_size);
475 if (ret < 0)
476 return ret;
477
478 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
479 TAS2764_TDM_CFG5_50_MASK,
480 tas2764->v_sense_slot);
481 if (ret < 0)
482 return ret;
483
484 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
485 TAS2764_TDM_CFG6_50_MASK,
486 tas2764->i_sense_slot);
487 if (ret < 0)
488 return ret;
489
490 return 0;
491 }
492
493 static const struct snd_soc_dai_ops tas2764_dai_ops = {
494 .mute_stream = tas2764_mute,
495 .hw_params = tas2764_hw_params,
496 .set_fmt = tas2764_set_fmt,
497 .set_tdm_slot = tas2764_set_dai_tdm_slot,
498 .no_capture_mute = 1,
499 };
500
501 #define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
502 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
503
504 #define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
505 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
506
507 static struct snd_soc_dai_driver tas2764_dai_driver[] = {
508 {
509 .name = "tas2764 ASI1",
510 .id = 0,
511 .playback = {
512 .stream_name = "ASI1 Playback",
513 .channels_min = 1,
514 .channels_max = 2,
515 .rates = TAS2764_RATES,
516 .formats = TAS2764_FORMATS,
517 },
518 .capture = {
519 .stream_name = "ASI1 Capture",
520 .channels_min = 0,
521 .channels_max = 2,
522 .rates = TAS2764_RATES,
523 .formats = TAS2764_FORMATS,
524 },
525 .ops = &tas2764_dai_ops,
526 .symmetric_rate = 1,
527 },
528 };
529
530 static int tas2764_codec_probe(struct snd_soc_component *component)
531 {
532 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
533 int ret;
534
535 tas2764->component = component;
536
537 if (tas2764->sdz_gpio) {
538 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
539 usleep_range(1000, 2000);
540 }
541
542 tas2764_reset(tas2764);
543
544 if (tas2764->irq) {
545 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK0, 0xff);
546 if (ret < 0)
547 return ret;
548
549 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK1, 0xff);
550 if (ret < 0)
551 return ret;
552
553 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK2, 0xff);
554 if (ret < 0)
555 return ret;
556
557 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK3, 0xff);
558 if (ret < 0)
559 return ret;
560
561 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK4, 0xff);
562 if (ret < 0)
563 return ret;
564
565 ret = devm_request_threaded_irq(tas2764->dev, tas2764->irq, NULL, tas2764_irq,
566 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_LOW,
567 "tas2764", tas2764);
568 if (ret)
569 dev_warn(tas2764->dev, "failed to request IRQ: %d\n", ret);
570 }
571
572 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
573 TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
574 if (ret < 0)
575 return ret;
576
577 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
578 TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
579 if (ret < 0)
580 return ret;
581
582 return 0;
583 }
584
585 static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
586 static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10050, 50, 1);
587
588 static const char * const tas2764_hpf_texts[] = {
589 "Disabled", "2 Hz", "50 Hz", "100 Hz", "200 Hz",
590 "400 Hz", "800 Hz"
591 };
592
593 static SOC_ENUM_SINGLE_DECL(
594 tas2764_hpf_enum, TAS2764_DC_BLK0,
595 TAS2764_DC_BLK0_HPF_FREQ_PB_SHIFT, tas2764_hpf_texts);
596
597 static const struct snd_kcontrol_new tas2764_snd_controls[] = {
598 SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
599 TAS2764_DVC_MAX, 1, tas2764_playback_volume),
600 SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 1, 0x14, 0,
601 tas2764_digital_tlv),
602 SOC_ENUM("HPF Corner Frequency", tas2764_hpf_enum),
603 };
604
605 static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
606 .probe = tas2764_codec_probe,
607 .suspend = tas2764_codec_suspend,
608 .resume = tas2764_codec_resume,
609 .controls = tas2764_snd_controls,
610 .num_controls = ARRAY_SIZE(tas2764_snd_controls),
611 .dapm_widgets = tas2764_dapm_widgets,
612 .num_dapm_widgets = ARRAY_SIZE(tas2764_dapm_widgets),
613 .dapm_routes = tas2764_audio_map,
614 .num_dapm_routes = ARRAY_SIZE(tas2764_audio_map),
615 .idle_bias_on = 1,
616 .endianness = 1,
617 };
618
619 static const struct reg_default tas2764_reg_defaults[] = {
620 { TAS2764_PAGE, 0x00 },
621 { TAS2764_SW_RST, 0x00 },
622 { TAS2764_PWR_CTRL, 0x1a },
623 { TAS2764_DVC, 0x00 },
624 { TAS2764_CHNL_0, 0x28 },
625 { TAS2764_TDM_CFG0, 0x09 },
626 { TAS2764_TDM_CFG1, 0x02 },
627 { TAS2764_TDM_CFG2, 0x0a },
628 { TAS2764_TDM_CFG3, 0x10 },
629 { TAS2764_TDM_CFG5, 0x42 },
630 };
631
632 static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
633 {
634 .range_min = 0,
635 .range_max = 1 * 128,
636 .selector_reg = TAS2764_PAGE,
637 .selector_mask = 0xff,
638 .selector_shift = 0,
639 .window_start = 0,
640 .window_len = 128,
641 },
642 };
643
644 static bool tas2764_volatile_register(struct device *dev, unsigned int reg)
645 {
646 switch (reg) {
647 case TAS2764_INT_LTCH0 ... TAS2764_INT_LTCH4:
648 case TAS2764_INT_CLK_CFG:
649 return true;
650 default:
651 return false;
652 }
653 }
654
655 static const struct regmap_config tas2764_i2c_regmap = {
656 .reg_bits = 8,
657 .val_bits = 8,
658 .volatile_reg = tas2764_volatile_register,
659 .reg_defaults = tas2764_reg_defaults,
660 .num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
661 .cache_type = REGCACHE_RBTREE,
662 .ranges = tas2764_regmap_ranges,
663 .num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
664 .max_register = 1 * 128,
665 };
666
667 static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
668 {
669 int ret = 0;
670
671 tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
672 GPIOD_OUT_HIGH);
673 if (IS_ERR(tas2764->reset_gpio)) {
674 if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
675 tas2764->reset_gpio = NULL;
676 return -EPROBE_DEFER;
677 }
678 }
679
680 tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
681 if (IS_ERR(tas2764->sdz_gpio)) {
682 if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
683 return -EPROBE_DEFER;
684
685 tas2764->sdz_gpio = NULL;
686 }
687
688 ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
689 &tas2764->i_sense_slot);
690 if (ret)
691 tas2764->i_sense_slot = 0;
692
693 ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
694 &tas2764->v_sense_slot);
695 if (ret)
696 tas2764->v_sense_slot = 2;
697
698 return 0;
699 }
700
701 static int tas2764_i2c_probe(struct i2c_client *client)
702 {
703 struct tas2764_priv *tas2764;
704 int result;
705
706 tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
707 GFP_KERNEL);
708 if (!tas2764)
709 return -ENOMEM;
710
711 tas2764->dev = &client->dev;
712 tas2764->irq = client->irq;
713 i2c_set_clientdata(client, tas2764);
714 dev_set_drvdata(&client->dev, tas2764);
715
716 tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
717 if (IS_ERR(tas2764->regmap)) {
718 result = PTR_ERR(tas2764->regmap);
719 dev_err(&client->dev, "Failed to allocate register map: %d\n",
720 result);
721 return result;
722 }
723
724 if (client->dev.of_node) {
725 result = tas2764_parse_dt(&client->dev, tas2764);
726 if (result) {
727 dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
728 __func__);
729 return result;
730 }
731 }
732
733 return devm_snd_soc_register_component(tas2764->dev,
734 &soc_component_driver_tas2764,
735 tas2764_dai_driver,
736 ARRAY_SIZE(tas2764_dai_driver));
737 }
738
739 static const struct i2c_device_id tas2764_i2c_id[] = {
740 { "tas2764"},
741 { }
742 };
743 MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
744
745 #if defined(CONFIG_OF)
746 static const struct of_device_id tas2764_of_match[] = {
747 { .compatible = "ti,tas2764" },
748 {},
749 };
750 MODULE_DEVICE_TABLE(of, tas2764_of_match);
751 #endif
752
753 static struct i2c_driver tas2764_i2c_driver = {
754 .driver = {
755 .name = "tas2764",
756 .of_match_table = of_match_ptr(tas2764_of_match),
757 },
758 .probe = tas2764_i2c_probe,
759 .id_table = tas2764_i2c_id,
760 };
761 module_i2c_driver(tas2764_i2c_driver);
762
763 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
764 MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
765 MODULE_LICENSE("GPL v2");
766
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