1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * wm8741.h -- WM8423 ASoC driver
4 *
5 * Copyright 2010 Wolfson Microelectronics, plc
6 *
7 * Author: Ian Lartey <ian@opensource.wolfsonmicro.com>
8 *
9 * Based on wm8753.h
10 */
11
12 #ifndef _WM8741_H
13 #define _WM8741_H
14
15 /*
16 * Register values.
17 */
18 #define WM8741_DACLLSB_ATTENUATION 0x00
19 #define WM8741_DACLMSB_ATTENUATION 0x01
20 #define WM8741_DACRLSB_ATTENUATION 0x02
21 #define WM8741_DACRMSB_ATTENUATION 0x03
22 #define WM8741_VOLUME_CONTROL 0x04
23 #define WM8741_FORMAT_CONTROL 0x05
24 #define WM8741_FILTER_CONTROL 0x06
25 #define WM8741_MODE_CONTROL_1 0x07
26 #define WM8741_MODE_CONTROL_2 0x08
27 #define WM8741_RESET 0x09
28 #define WM8741_ADDITIONAL_CONTROL_1 0x20
29
30 #define WM8741_REGISTER_COUNT 11
31 #define WM8741_MAX_REGISTER 0x20
32
33 /*
34 * Field Definitions.
35 */
36
37 /*
38 * R0 (0x00) - DACLLSB_ATTENUATION
39 */
40 #define WM8741_UPDATELL 0x0020 /* UPDATELL */
41 #define WM8741_UPDATELL_MASK 0x0020 /* UPDATELL */
42 #define WM8741_UPDATELL_SHIFT 5 /* UPDATELL */
43 #define WM8741_UPDATELL_WIDTH 1 /* UPDATELL */
44 #define WM8741_LAT_4_0_MASK 0x001F /* LAT[4:0] - [4:0] */
45 #define WM8741_LAT_4_0_SHIFT 0 /* LAT[4:0] - [4:0] */
46 #define WM8741_LAT_4_0_WIDTH 5 /* LAT[4:0] - [4:0] */
47
48 /*
49 * R1 (0x01) - DACLMSB_ATTENUATION
50 */
51 #define WM8741_UPDATELM 0x0020 /* UPDATELM */
52 #define WM8741_UPDATELM_MASK 0x0020 /* UPDATELM */
53 #define WM8741_UPDATELM_SHIFT 5 /* UPDATELM */
54 #define WM8741_UPDATELM_WIDTH 1 /* UPDATELM */
55 #define WM8741_LAT_9_5_0_MASK 0x001F /* LAT[9:5] - [4:0] */
56 #define WM8741_LAT_9_5_0_SHIFT 0 /* LAT[9:5] - [4:0] */
57 #define WM8741_LAT_9_5_0_WIDTH 5 /* LAT[9:5] - [4:0] */
58
59 /*
60 * R2 (0x02) - DACRLSB_ATTENUATION
61 */
62 #define WM8741_UPDATERL 0x0020 /* UPDATERL */
63 #define WM8741_UPDATERL_MASK 0x0020 /* UPDATERL */
64 #define WM8741_UPDATERL_SHIFT 5 /* UPDATERL */
65 #define WM8741_UPDATERL_WIDTH 1 /* UPDATERL */
66 #define WM8741_RAT_4_0_MASK 0x001F /* RAT[4:0] - [4:0] */
67 #define WM8741_RAT_4_0_SHIFT 0 /* RAT[4:0] - [4:0] */
68 #define WM8741_RAT_4_0_WIDTH 5 /* RAT[4:0] - [4:0] */
69
70 /*
71 * R3 (0x03) - DACRMSB_ATTENUATION
72 */
73 #define WM8741_UPDATERM 0x0020 /* UPDATERM */
74 #define WM8741_UPDATERM_MASK 0x0020 /* UPDATERM */
75 #define WM8741_UPDATERM_SHIFT 5 /* UPDATERM */
76 #define WM8741_UPDATERM_WIDTH 1 /* UPDATERM */
77 #define WM8741_RAT_9_5_0_MASK 0x001F /* RAT[9:5] - [4:0] */
78 #define WM8741_RAT_9_5_0_SHIFT 0 /* RAT[9:5] - [4:0] */
79 #define WM8741_RAT_9_5_0_WIDTH 5 /* RAT[9:5] - [4:0] */
80
81 /*
82 * R4 (0x04) - VOLUME_CONTROL
83 */
84 #define WM8741_AMUTE 0x0080 /* AMUTE */
85 #define WM8741_AMUTE_MASK 0x0080 /* AMUTE */
86 #define WM8741_AMUTE_SHIFT 7 /* AMUTE */
87 #define WM8741_AMUTE_WIDTH 1 /* AMUTE */
88 #define WM8741_ZFLAG_MASK 0x0060 /* ZFLAG - [6:5] */
89 #define WM8741_ZFLAG_SHIFT 5 /* ZFLAG - [6:5] */
90 #define WM8741_ZFLAG_WIDTH 2 /* ZFLAG - [6:5] */
91 #define WM8741_IZD 0x0010 /* IZD */
92 #define WM8741_IZD_MASK 0x0010 /* IZD */
93 #define WM8741_IZD_SHIFT 4 /* IZD */
94 #define WM8741_IZD_WIDTH 1 /* IZD */
95 #define WM8741_SOFT 0x0008 /* SOFT MUTE */
96 #define WM8741_SOFT_MASK 0x0008 /* SOFT MUTE */
97 #define WM8741_SOFT_SHIFT 3 /* SOFT MUTE */
98 #define WM8741_SOFT_WIDTH 1 /* SOFT MUTE */
99 #define WM8741_ATC 0x0004 /* ATC */
100 #define WM8741_ATC_MASK 0x0004 /* ATC */
101 #define WM8741_ATC_SHIFT 2 /* ATC */
102 #define WM8741_ATC_WIDTH 1 /* ATC */
103 #define WM8741_ATT2DB 0x0002 /* ATT2DB */
104 #define WM8741_ATT2DB_MASK 0x0002 /* ATT2DB */
105 #define WM8741_ATT2DB_SHIFT 1 /* ATT2DB */
106 #define WM8741_ATT2DB_WIDTH 1 /* ATT2DB */
107 #define WM8741_VOL_RAMP 0x0001 /* VOL_RAMP */
108 #define WM8741_VOL_RAMP_MASK 0x0001 /* VOL_RAMP */
109 #define WM8741_VOL_RAMP_SHIFT 0 /* VOL_RAMP */
110 #define WM8741_VOL_RAMP_WIDTH 1 /* VOL_RAMP */
111
112 /*
113 * R5 (0x05) - FORMAT_CONTROL
114 */
115 #define WM8741_PWDN 0x0080 /* PWDN */
116 #define WM8741_PWDN_MASK 0x0080 /* PWDN */
117 #define WM8741_PWDN_SHIFT 7 /* PWDN */
118 #define WM8741_PWDN_WIDTH 1 /* PWDN */
119 #define WM8741_REV 0x0040 /* REV */
120 #define WM8741_REV_MASK 0x0040 /* REV */
121 #define WM8741_REV_SHIFT 6 /* REV */
122 #define WM8741_REV_WIDTH 1 /* REV */
123 #define WM8741_BCP 0x0020 /* BCP */
124 #define WM8741_BCP_MASK 0x0020 /* BCP */
125 #define WM8741_BCP_SHIFT 5 /* BCP */
126 #define WM8741_BCP_WIDTH 1 /* BCP */
127 #define WM8741_LRP 0x0010 /* LRP */
128 #define WM8741_LRP_MASK 0x0010 /* LRP */
129 #define WM8741_LRP_SHIFT 4 /* LRP */
130 #define WM8741_LRP_WIDTH 1 /* LRP */
131 #define WM8741_FMT_MASK 0x000C /* FMT - [3:2] */
132 #define WM8741_FMT_SHIFT 2 /* FMT - [3:2] */
133 #define WM8741_FMT_WIDTH 2 /* FMT - [3:2] */
134 #define WM8741_IWL_MASK 0x0003 /* IWL - [1:0] */
135 #define WM8741_IWL_SHIFT 0 /* IWL - [1:0] */
136 #define WM8741_IWL_WIDTH 2 /* IWL - [1:0] */
137
138 /*
139 * R6 (0x06) - FILTER_CONTROL
140 */
141 #define WM8741_ZFLAG_HI 0x0080 /* ZFLAG_HI */
142 #define WM8741_ZFLAG_HI_MASK 0x0080 /* ZFLAG_HI */
143 #define WM8741_ZFLAG_HI_SHIFT 7 /* ZFLAG_HI */
144 #define WM8741_ZFLAG_HI_WIDTH 1 /* ZFLAG_HI */
145 #define WM8741_DEEMPH_MASK 0x0060 /* DEEMPH - [6:5] */
146 #define WM8741_DEEMPH_SHIFT 5 /* DEEMPH - [6:5] */
147 #define WM8741_DEEMPH_WIDTH 2 /* DEEMPH - [6:5] */
148 #define WM8741_DSDFILT_MASK 0x0018 /* DSDFILT - [4:3] */
149 #define WM8741_DSDFILT_SHIFT 3 /* DSDFILT - [4:3] */
150 #define WM8741_DSDFILT_WIDTH 2 /* DSDFILT - [4:3] */
151 #define WM8741_FIRSEL_MASK 0x0007 /* FIRSEL - [2:0] */
152 #define WM8741_FIRSEL_SHIFT 0 /* FIRSEL - [2:0] */
153 #define WM8741_FIRSEL_WIDTH 3 /* FIRSEL - [2:0] */
154
155 /*
156 * R7 (0x07) - MODE_CONTROL_1
157 */
158 #define WM8741_MODE8X 0x0080 /* MODE8X */
159 #define WM8741_MODE8X_MASK 0x0080 /* MODE8X */
160 #define WM8741_MODE8X_SHIFT 7 /* MODE8X */
161 #define WM8741_MODE8X_WIDTH 1 /* MODE8X */
162 #define WM8741_OSR_MASK 0x0060 /* OSR - [6:5] */
163 #define WM8741_OSR_SHIFT 5 /* OSR - [6:5] */
164 #define WM8741_OSR_WIDTH 2 /* OSR - [6:5] */
165 #define WM8741_SR_MASK 0x001C /* SR - [4:2] */
166 #define WM8741_SR_SHIFT 2 /* SR - [4:2] */
167 #define WM8741_SR_WIDTH 3 /* SR - [4:2] */
168 #define WM8741_MODESEL_MASK 0x0003 /* MODESEL - [1:0] */
169 #define WM8741_MODESEL_SHIFT 0 /* MODESEL - [1:0] */
170 #define WM8741_MODESEL_WIDTH 2 /* MODESEL - [1:0] */
171
172 /*
173 * R8 (0x08) - MODE_CONTROL_2
174 */
175 #define WM8741_DSD_GAIN 0x0040 /* DSD_GAIN */
176 #define WM8741_DSD_GAIN_MASK 0x0040 /* DSD_GAIN */
177 #define WM8741_DSD_GAIN_SHIFT 6 /* DSD_GAIN */
178 #define WM8741_DSD_GAIN_WIDTH 1 /* DSD_GAIN */
179 #define WM8741_SDOUT 0x0020 /* SDOUT */
180 #define WM8741_SDOUT_MASK 0x0020 /* SDOUT */
181 #define WM8741_SDOUT_SHIFT 5 /* SDOUT */
182 #define WM8741_SDOUT_WIDTH 1 /* SDOUT */
183 #define WM8741_DOUT 0x0010 /* DOUT */
184 #define WM8741_DOUT_MASK 0x0010 /* DOUT */
185 #define WM8741_DOUT_SHIFT 4 /* DOUT */
186 #define WM8741_DOUT_WIDTH 1 /* DOUT */
187 #define WM8741_DIFF_MASK 0x000C /* DIFF - [3:2] */
188 #define WM8741_DIFF_SHIFT 2 /* DIFF - [3:2] */
189 #define WM8741_DIFF_WIDTH 2 /* DIFF - [3:2] */
190 #define WM8741_DITHER_MASK 0x0003 /* DITHER - [1:0] */
191 #define WM8741_DITHER_SHIFT 0 /* DITHER - [1:0] */
192 #define WM8741_DITHER_WIDTH 2 /* DITHER - [1:0] */
193
194 /* DIFF field values */
195 #define WM8741_DIFF_MODE_STEREO 0 /* stereo normal */
196 #define WM8741_DIFF_MODE_STEREO_REVERSED 2 /* stereo reversed */
197 #define WM8741_DIFF_MODE_MONO_LEFT 1 /* mono left */
198 #define WM8741_DIFF_MODE_MONO_RIGHT 3 /* mono right */
199
200 /*
201 * R32 (0x20) - ADDITONAL_CONTROL_1
202 */
203 #define WM8741_DSD_LEVEL 0x0002 /* DSD_LEVEL */
204 #define WM8741_DSD_LEVEL_MASK 0x0002 /* DSD_LEVEL */
205 #define WM8741_DSD_LEVEL_SHIFT 1 /* DSD_LEVEL */
206 #define WM8741_DSD_LEVEL_WIDTH 1 /* DSD_LEVEL */
207 #define WM8741_DSD_NO_NOTCH 0x0001 /* DSD_NO_NOTCH */
208 #define WM8741_DSD_NO_NOTCH_MASK 0x0001 /* DSD_NO_NOTCH */
209 #define WM8741_DSD_NO_NOTCH_SHIFT 0 /* DSD_NO_NOTCH */
210 #define WM8741_DSD_NO_NOTCH_WIDTH 1 /* DSD_NO_NOTCH */
211
212 #define WM8741_SYSCLK 0
213
214 struct wm8741_platform_data {
215 u32 diff_mode; /* Differential Output Mode */
216 };
217
218 #endif
219
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