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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/wm8753.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * wm8753.c  --  WM8753 ALSA Soc Audio driver
  4  *
  5  * Copyright 2003-11 Wolfson Microelectronics PLC.
  6  * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  7  *
  8  * Notes:
  9  *  The WM8753 is a low power, high quality stereo codec with integrated PCM
 10  *  codec designed for portable digital telephony applications.
 11  *
 12  * Dual DAI:-
 13  *
 14  * This driver support 2 DAI PCM's. This makes the default PCM available for
 15  * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
 16  * voice.
 17  *
 18  * Please note that the voice PCM can be connected directly to a Bluetooth
 19  * codec or GSM modem and thus cannot be read or written to, although it is
 20  * available to be configured with snd_hw_params(), etc and kcontrols in the
 21  * normal alsa manner.
 22  *
 23  * Fast DAI switching:-
 24  *
 25  * The driver can now fast switch between the DAI configurations via a
 26  * an alsa kcontrol. This allows the PCM to remain open.
 27  */
 28 
 29 #include <linux/mod_devicetable.h>
 30 #include <linux/module.h>
 31 #include <linux/kernel.h>
 32 #include <linux/init.h>
 33 #include <linux/delay.h>
 34 #include <linux/pm.h>
 35 #include <linux/i2c.h>
 36 #include <linux/regmap.h>
 37 #include <linux/spi/spi.h>
 38 #include <linux/slab.h>
 39 #include <sound/core.h>
 40 #include <sound/pcm.h>
 41 #include <sound/pcm_params.h>
 42 #include <sound/soc.h>
 43 #include <sound/initval.h>
 44 #include <sound/tlv.h>
 45 #include <asm/div64.h>
 46 
 47 #include "wm8753.h"
 48 
 49 static int caps_charge = 2000;
 50 module_param(caps_charge, int, 0);
 51 MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
 52 
 53 static int wm8753_hifi_write_dai_fmt(struct snd_soc_component *component,
 54                 unsigned int fmt);
 55 static int wm8753_voice_write_dai_fmt(struct snd_soc_component *component,
 56                 unsigned int fmt);
 57 
 58 /*
 59  * wm8753 register cache
 60  * We can't read the WM8753 register space when we
 61  * are using 2 wire for device control, so we cache them instead.
 62  */
 63 static const struct reg_default wm8753_reg_defaults[] = {
 64         { 0x00, 0x0000 },
 65         { 0x01, 0x0008 },
 66         { 0x02, 0x0000 },
 67         { 0x03, 0x000a },
 68         { 0x04, 0x000a },
 69         { 0x05, 0x0033 },
 70         { 0x06, 0x0000 },
 71         { 0x07, 0x0007 },
 72         { 0x08, 0x00ff },
 73         { 0x09, 0x00ff },
 74         { 0x0a, 0x000f },
 75         { 0x0b, 0x000f },
 76         { 0x0c, 0x007b },
 77         { 0x0d, 0x0000 },
 78         { 0x0e, 0x0032 },
 79         { 0x0f, 0x0000 },
 80         { 0x10, 0x00c3 },
 81         { 0x11, 0x00c3 },
 82         { 0x12, 0x00c0 },
 83         { 0x13, 0x0000 },
 84         { 0x14, 0x0000 },
 85         { 0x15, 0x0000 },
 86         { 0x16, 0x0000 },
 87         { 0x17, 0x0000 },
 88         { 0x18, 0x0000 },
 89         { 0x19, 0x0000 },
 90         { 0x1a, 0x0000 },
 91         { 0x1b, 0x0000 },
 92         { 0x1c, 0x0000 },
 93         { 0x1d, 0x0000 },
 94         { 0x1e, 0x0000 },
 95         { 0x1f, 0x0000 },
 96         { 0x20, 0x0055 },
 97         { 0x21, 0x0005 },
 98         { 0x22, 0x0050 },
 99         { 0x23, 0x0055 },
100         { 0x24, 0x0050 },
101         { 0x25, 0x0055 },
102         { 0x26, 0x0050 },
103         { 0x27, 0x0055 },
104         { 0x28, 0x0079 },
105         { 0x29, 0x0079 },
106         { 0x2a, 0x0079 },
107         { 0x2b, 0x0079 },
108         { 0x2c, 0x0079 },
109         { 0x2d, 0x0000 },
110         { 0x2e, 0x0000 },
111         { 0x2f, 0x0000 },
112         { 0x30, 0x0000 },
113         { 0x31, 0x0097 },
114         { 0x32, 0x0097 },
115         { 0x33, 0x0000 },
116         { 0x34, 0x0004 },
117         { 0x35, 0x0000 },
118         { 0x36, 0x0083 },
119         { 0x37, 0x0024 },
120         { 0x38, 0x01ba },
121         { 0x39, 0x0000 },
122         { 0x3a, 0x0083 },
123         { 0x3b, 0x0024 },
124         { 0x3c, 0x01ba },
125         { 0x3d, 0x0000 },
126         { 0x3e, 0x0000 },
127         { 0x3f, 0x0000 },
128 };
129 
130 static bool wm8753_volatile(struct device *dev, unsigned int reg)
131 {
132         return reg == WM8753_RESET;
133 }
134 
135 /* codec private data */
136 struct wm8753_priv {
137         struct regmap *regmap;
138         unsigned int sysclk;
139         unsigned int pcmclk;
140 
141         unsigned int voice_fmt;
142         unsigned int hifi_fmt;
143 
144         int dai_func;
145         struct delayed_work charge_work;
146 };
147 
148 #define wm8753_reset(c) snd_soc_component_write(c, WM8753_RESET, 0)
149 
150 /*
151  * WM8753 Controls
152  */
153 static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
154 static const char *wm8753_base_filter[] =
155         {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
156         "100Hz @ 8kHz", "200Hz @ 8kHz"};
157 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
158 static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
159 static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
160 static const char *wm8753_3d_func[] = {"Capture", "Playback"};
161 static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
162 static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
163 static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
164 static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
165 static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
166 static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
167         "Line 1", "Line 2"};
168 static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
169 static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
170 static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
171 static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
172 static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
173         "Right PGA"};
174 static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
175         "Left + Right"};
176 static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
177 static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
178 static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
179 static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
180 static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
181         "Analogue Mix Right", "Digital Mono Mix"};
182 static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
183         "82Hz @ 8kHz", "170Hz @ 8kHz"};
184 static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
185 static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
186 static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
187 static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
188         "Channel Swap"};
189 static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
190 
191 static const struct soc_enum wm8753_enum[] = {
192 SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
193 SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
194 SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
195 SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
196 SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
197 SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
198 SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
199 SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
200 SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
201 SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
202 SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
203 SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
204 SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
205 SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
206 SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
207 SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
208 SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
209 SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
210 SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
211 SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
212 SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
213 SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
214 SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
215 SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
216 SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
217 SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
218 SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
219 SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
220 SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
221 };
222 
223 
224 static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
225         struct snd_ctl_elem_value *ucontrol)
226 {
227         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
228         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
229 
230         ucontrol->value.enumerated.item[0] = wm8753->dai_func;
231         return 0;
232 }
233 
234 static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
235         struct snd_ctl_elem_value *ucontrol)
236 {
237         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
238         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
239         u16 ioctl;
240 
241         if (wm8753->dai_func == ucontrol->value.enumerated.item[0])
242                 return 0;
243 
244         if (snd_soc_component_active(component))
245                 return -EBUSY;
246 
247         ioctl = snd_soc_component_read(component, WM8753_IOCTL);
248 
249         wm8753->dai_func = ucontrol->value.enumerated.item[0];
250 
251         if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
252                 return 1;
253 
254         ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
255         snd_soc_component_write(component, WM8753_IOCTL, ioctl);
256 
257 
258         wm8753_hifi_write_dai_fmt(component, wm8753->hifi_fmt);
259         wm8753_voice_write_dai_fmt(component, wm8753->voice_fmt);
260 
261         return 1;
262 }
263 
264 static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
265 static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
266 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
267 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
268 static const DECLARE_TLV_DB_RANGE(out_tlv,
269         /* 0000000 - 0101111 = "Analogue mute" */
270         0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
271         48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0)
272 );
273 static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
274 static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
275 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
276 
277 static const struct snd_kcontrol_new wm8753_snd_controls[] = {
278 SOC_SINGLE("Hi-Fi DAC Left/Right channel Swap", WM8753_HIFI, 5, 1, 0),
279 SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
280 
281 SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
282                  adc_tlv),
283 
284 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
285                  0, 127, 0, out_tlv),
286 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
287                  127, 0, out_tlv),
288 
289 SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
290 
291 SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
292                  1, mix_tlv),
293 SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
294                  7, 1, mix_tlv),
295 SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
296                  1, voice_mix_tlv),
297 
298 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
299              1, 0),
300 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
301              1, 0),
302 
303 SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
304 SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
305                mix_tlv),
306 SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
307                voice_mix_tlv),
308 SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
309 
310 SOC_ENUM("Bass Boost", wm8753_enum[0]),
311 SOC_ENUM("Bass Filter", wm8753_enum[1]),
312 SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
313 
314 SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
315 SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
316 
317 SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
318                rec_mix_tlv),
319 SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
320                rec_mix_tlv),
321 
322 SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
323                  pga_tlv),
324 SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
325 SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
326 
327 SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
328 SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
329 SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
330 
331 SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
332 SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
333 SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
334 SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
335 SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
336 SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
337 SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
338 SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
339 SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
340 SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
341 
342 SOC_ENUM("3D Function", wm8753_enum[5]),
343 SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
344 SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
345 SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
346 SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
347 
348 SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
349 SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
350 
351 SOC_ENUM("De-emphasis", wm8753_enum[8]),
352 SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
353 SOC_ENUM("Playback Phase", wm8753_enum[10]),
354 
355 SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
356 SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
357 
358 SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
359 
360 SOC_ENUM("ADC Data Select", wm8753_enum[27]),
361 SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
362 };
363 
364 /*
365  * _DAPM_ Controls
366  */
367 
368 /* Left Mixer */
369 static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
370 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
371 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
372 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
373 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
374 };
375 
376 /* Right mixer */
377 static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
378 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
379 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
380 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
381 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
382 };
383 
384 /* Mono mixer */
385 static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
386 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
387 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
388 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
389 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
390 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
391 };
392 
393 /* Mono 2 Mux */
394 static const struct snd_kcontrol_new wm8753_mono2_controls =
395 SOC_DAPM_ENUM("Route", wm8753_enum[17]);
396 
397 /* Out 3 Mux */
398 static const struct snd_kcontrol_new wm8753_out3_controls =
399 SOC_DAPM_ENUM("Route", wm8753_enum[18]);
400 
401 /* Out 4 Mux */
402 static const struct snd_kcontrol_new wm8753_out4_controls =
403 SOC_DAPM_ENUM("Route", wm8753_enum[19]);
404 
405 /* ADC Mono Mix */
406 static const struct snd_kcontrol_new wm8753_adc_mono_controls =
407 SOC_DAPM_ENUM("Route", wm8753_enum[22]);
408 
409 /* Record mixer */
410 static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
411 SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
412 SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
413 SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
414 };
415 
416 /* Left ADC mux */
417 static const struct snd_kcontrol_new wm8753_adc_left_controls =
418 SOC_DAPM_ENUM("Route", wm8753_enum[21]);
419 
420 /* Right ADC mux */
421 static const struct snd_kcontrol_new wm8753_adc_right_controls =
422 SOC_DAPM_ENUM("Route", wm8753_enum[20]);
423 
424 /* MIC mux */
425 static const struct snd_kcontrol_new wm8753_mic_mux_controls =
426 SOC_DAPM_ENUM("Route", wm8753_enum[16]);
427 
428 /* ALC mixer */
429 static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
430 SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
431 SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
432 SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
433 SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
434 };
435 
436 /* Left Line mux */
437 static const struct snd_kcontrol_new wm8753_line_left_controls =
438 SOC_DAPM_ENUM("Route", wm8753_enum[14]);
439 
440 /* Right Line mux */
441 static const struct snd_kcontrol_new wm8753_line_right_controls =
442 SOC_DAPM_ENUM("Route", wm8753_enum[13]);
443 
444 /* Mono Line mux */
445 static const struct snd_kcontrol_new wm8753_line_mono_controls =
446 SOC_DAPM_ENUM("Route", wm8753_enum[12]);
447 
448 /* Line mux and mixer */
449 static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
450 SOC_DAPM_ENUM("Route", wm8753_enum[11]);
451 
452 /* Rx mux and mixer */
453 static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
454 SOC_DAPM_ENUM("Route", wm8753_enum[15]);
455 
456 /* Mic Selector Mux */
457 static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
458 SOC_DAPM_ENUM("Route", wm8753_enum[25]);
459 
460 static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
461 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
462 SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
463         &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
464 SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
465 SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
466 SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
467 SND_SOC_DAPM_OUTPUT("LOUT1"),
468 SND_SOC_DAPM_OUTPUT("LOUT2"),
469 SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
470         &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
471 SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
472 SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
473 SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
474 SND_SOC_DAPM_OUTPUT("ROUT1"),
475 SND_SOC_DAPM_OUTPUT("ROUT2"),
476 SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
477         &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
478 SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
479 SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
480 SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
481 SND_SOC_DAPM_OUTPUT("MONO1"),
482 SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
483 SND_SOC_DAPM_OUTPUT("MONO2"),
484 SND_SOC_DAPM_MIXER("Out3 Left + Right", SND_SOC_NOPM, 0, 0, NULL, 0),
485 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
486 SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
487 SND_SOC_DAPM_OUTPUT("OUT3"),
488 SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
489 SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
490 SND_SOC_DAPM_OUTPUT("OUT4"),
491 SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
492         &wm8753_record_mixer_controls[0],
493         ARRAY_SIZE(wm8753_record_mixer_controls)),
494 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
495 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
496 SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
497         &wm8753_adc_mono_controls),
498 SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
499         &wm8753_adc_mono_controls),
500 SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
501         &wm8753_adc_left_controls),
502 SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
503         &wm8753_adc_right_controls),
504 SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
505         &wm8753_mic_mux_controls),
506 SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
507 SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
508 SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
509         &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
510 SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
511         &wm8753_line_left_controls),
512 SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
513         &wm8753_line_right_controls),
514 SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
515         &wm8753_line_mono_controls),
516 SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
517         &wm8753_line_mux_mix_controls),
518 SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
519         &wm8753_rx_mux_mix_controls),
520 SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
521 SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
522 SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
523         &wm8753_mic_sel_mux_controls),
524 SND_SOC_DAPM_INPUT("LINE1"),
525 SND_SOC_DAPM_INPUT("LINE2"),
526 SND_SOC_DAPM_INPUT("RXP"),
527 SND_SOC_DAPM_INPUT("RXN"),
528 SND_SOC_DAPM_INPUT("ACIN"),
529 SND_SOC_DAPM_OUTPUT("ACOP"),
530 SND_SOC_DAPM_INPUT("MIC1N"),
531 SND_SOC_DAPM_INPUT("MIC1"),
532 SND_SOC_DAPM_INPUT("MIC2N"),
533 SND_SOC_DAPM_INPUT("MIC2"),
534 SND_SOC_DAPM_VMID("VREF"),
535 };
536 
537 static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
538         /* left mixer */
539         {"Left Mixer", "Left Playback Switch", "Left DAC"},
540         {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
541         {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
542         {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
543 
544         /* right mixer */
545         {"Right Mixer", "Right Playback Switch", "Right DAC"},
546         {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
547         {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
548         {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
549 
550         /* mono mixer */
551         {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
552         {"Mono Mixer", "Left Playback Switch", "Left DAC"},
553         {"Mono Mixer", "Right Playback Switch", "Right DAC"},
554         {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
555         {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
556 
557         /* left out */
558         {"Left Out 1", NULL, "Left Mixer"},
559         {"Left Out 2", NULL, "Left Mixer"},
560         {"LOUT1", NULL, "Left Out 1"},
561         {"LOUT2", NULL, "Left Out 2"},
562 
563         /* right out */
564         {"Right Out 1", NULL, "Right Mixer"},
565         {"Right Out 2", NULL, "Right Mixer"},
566         {"ROUT1", NULL, "Right Out 1"},
567         {"ROUT2", NULL, "Right Out 2"},
568 
569         /* mono 1 out */
570         {"Mono Out 1", NULL, "Mono Mixer"},
571         {"MONO1", NULL, "Mono Out 1"},
572 
573         /* mono 2 out */
574         {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
575         {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
576         {"Mono 2 Mux", "Left", "Left Mixer"},
577         {"Mono 2 Mux", "Right", "Right Mixer"},
578         {"Mono Out 2", NULL, "Mono 2 Mux"},
579         {"MONO2", NULL, "Mono Out 2"},
580 
581         /* out 3 */
582         {"Out3 Left + Right", NULL, "Left Mixer"},
583         {"Out3 Left + Right", NULL, "Right Mixer"},
584         {"Out3 Mux", "VREF", "VREF"},
585         {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
586         {"Out3 Mux", "ROUT2", "ROUT2"},
587         {"Out 3", NULL, "Out3 Mux"},
588         {"OUT3", NULL, "Out 3"},
589 
590         /* out 4 */
591         {"Out4 Mux", "VREF", "VREF"},
592         {"Out4 Mux", "Capture ST", "Playback Mixer"},
593         {"Out4 Mux", "LOUT2", "LOUT2"},
594         {"Out 4", NULL, "Out4 Mux"},
595         {"OUT4", NULL, "Out 4"},
596 
597         /* record mixer  */
598         {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
599         {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
600         {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
601 
602         /* Mic/SideTone Mux */
603         {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
604         {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
605         {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
606         {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
607 
608         /* Capture Left Mux */
609         {"Capture Left Mux", "PGA", "Left Capture Volume"},
610         {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
611         {"Capture Left Mux", "Line", "LINE1"},
612 
613         /* Capture Right Mux */
614         {"Capture Right Mux", "PGA", "Right Capture Volume"},
615         {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
616         {"Capture Right Mux", "Sidetone", "Playback Mixer"},
617 
618         /* Mono Capture mixer-mux */
619         {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
620         {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
621         {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
622         {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
623         {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
624         {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
625         {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
626         {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
627         {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
628         {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
629 
630         /* ADC */
631         {"Left ADC", NULL, "Capture Left Mixer"},
632         {"Right ADC", NULL, "Capture Right Mixer"},
633 
634         /* Left Capture Volume */
635         {"Left Capture Volume", NULL, "ACIN"},
636 
637         /* Right Capture Volume */
638         {"Right Capture Volume", NULL, "Mic 2 Volume"},
639 
640         /* ALC Mixer */
641         {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
642         {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
643         {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
644         {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
645 
646         /* Line Left Mux */
647         {"Line Left Mux", "Line 1", "LINE1"},
648         {"Line Left Mux", "Rx Mix", "Rx Mixer"},
649 
650         /* Line Right Mux */
651         {"Line Right Mux", "Line 2", "LINE2"},
652         {"Line Right Mux", "Rx Mix", "Rx Mixer"},
653 
654         /* Line Mono Mux */
655         {"Line Mono Mux", "Line Mix", "Line Mixer"},
656         {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
657 
658         /* Line Mixer/Mux */
659         {"Line Mixer", "Line 1 + 2", "LINE1"},
660         {"Line Mixer", "Line 1 - 2", "LINE1"},
661         {"Line Mixer", "Line 1 + 2", "LINE2"},
662         {"Line Mixer", "Line 1 - 2", "LINE2"},
663         {"Line Mixer", "Line 1", "LINE1"},
664         {"Line Mixer", "Line 2", "LINE2"},
665 
666         /* Rx Mixer/Mux */
667         {"Rx Mixer", "RXP - RXN", "RXP"},
668         {"Rx Mixer", "RXP + RXN", "RXP"},
669         {"Rx Mixer", "RXP - RXN", "RXN"},
670         {"Rx Mixer", "RXP + RXN", "RXN"},
671         {"Rx Mixer", "RXP", "RXP"},
672         {"Rx Mixer", "RXN", "RXN"},
673 
674         /* Mic 1 Volume */
675         {"Mic 1 Volume", NULL, "MIC1N"},
676         {"Mic 1 Volume", NULL, "Mic Selection Mux"},
677 
678         /* Mic 2 Volume */
679         {"Mic 2 Volume", NULL, "MIC2N"},
680         {"Mic 2 Volume", NULL, "MIC2"},
681 
682         /* Mic Selector Mux */
683         {"Mic Selection Mux", "Mic 1", "MIC1"},
684         {"Mic Selection Mux", "Mic 2", "MIC2N"},
685         {"Mic Selection Mux", "Mic 3", "MIC2"},
686 
687         /* ACOP */
688         {"ACOP", NULL, "ALC Mixer"},
689 };
690 
691 /* PLL divisors */
692 struct _pll_div {
693         u32 div2:1;
694         u32 n:4;
695         u32 k:24;
696 };
697 
698 /* The size in bits of the pll divide multiplied by 10
699  * to allow rounding later */
700 #define FIXED_PLL_SIZE ((1 << 22) * 10)
701 
702 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
703         unsigned int source)
704 {
705         u64 Kpart;
706         unsigned int K, Ndiv, Nmod;
707 
708         Ndiv = target / source;
709         if (Ndiv < 6) {
710                 source >>= 1;
711                 pll_div->div2 = 1;
712                 Ndiv = target / source;
713         } else
714                 pll_div->div2 = 0;
715 
716         if ((Ndiv < 6) || (Ndiv > 12))
717                 printk(KERN_WARNING
718                         "wm8753: unsupported N = %u\n", Ndiv);
719 
720         pll_div->n = Ndiv;
721         Nmod = target % source;
722         Kpart = FIXED_PLL_SIZE * (long long)Nmod;
723 
724         do_div(Kpart, source);
725 
726         K = Kpart & 0xFFFFFFFF;
727 
728         /* Check if we need to round */
729         if ((K % 10) >= 5)
730                 K += 5;
731 
732         /* Move down to proper range now rounding is done */
733         K /= 10;
734 
735         pll_div->k = K;
736 }
737 
738 static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
739                 int source, unsigned int freq_in, unsigned int freq_out)
740 {
741         u16 reg, enable;
742         int offset;
743         struct snd_soc_component *component = codec_dai->component;
744 
745         if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
746                 return -ENODEV;
747 
748         if (pll_id == WM8753_PLL1) {
749                 offset = 0;
750                 enable = 0x10;
751                 reg = snd_soc_component_read(component, WM8753_CLOCK) & 0xffef;
752         } else {
753                 offset = 4;
754                 enable = 0x8;
755                 reg = snd_soc_component_read(component, WM8753_CLOCK) & 0xfff7;
756         }
757 
758         if (!freq_in || !freq_out) {
759                 /* disable PLL  */
760                 snd_soc_component_write(component, WM8753_PLL1CTL1 + offset, 0x0026);
761                 snd_soc_component_write(component, WM8753_CLOCK, reg);
762                 return 0;
763         } else {
764                 u16 value = 0;
765                 struct _pll_div pll_div;
766 
767                 pll_factors(&pll_div, freq_out * 8, freq_in);
768 
769                 /* set up N and K PLL divisor ratios */
770                 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
771                 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
772                 snd_soc_component_write(component, WM8753_PLL1CTL2 + offset, value);
773 
774                 /* bits 8:0 = PLL_K[17:9] */
775                 value = (pll_div.k & 0x03fe00) >> 9;
776                 snd_soc_component_write(component, WM8753_PLL1CTL3 + offset, value);
777 
778                 /* bits 8:0 = PLL_K[8:0] */
779                 value = pll_div.k & 0x0001ff;
780                 snd_soc_component_write(component, WM8753_PLL1CTL4 + offset, value);
781 
782                 /* set PLL as input and enable */
783                 snd_soc_component_write(component, WM8753_PLL1CTL1 + offset, 0x0027 |
784                         (pll_div.div2 << 3));
785                 snd_soc_component_write(component, WM8753_CLOCK, reg | enable);
786         }
787         return 0;
788 }
789 
790 struct _coeff_div {
791         u32 mclk;
792         u32 rate;
793         u8 sr:5;
794         u8 usb:1;
795 };
796 
797 /* codec hifi mclk (after PLL) clock divider coefficients */
798 static const struct _coeff_div coeff_div[] = {
799         /* 8k */
800         {12288000, 8000, 0x6, 0x0},
801         {11289600, 8000, 0x16, 0x0},
802         {18432000, 8000, 0x7, 0x0},
803         {16934400, 8000, 0x17, 0x0},
804         {12000000, 8000, 0x6, 0x1},
805 
806         /* 11.025k */
807         {11289600, 11025, 0x18, 0x0},
808         {16934400, 11025, 0x19, 0x0},
809         {12000000, 11025, 0x19, 0x1},
810 
811         /* 16k */
812         {12288000, 16000, 0xa, 0x0},
813         {18432000, 16000, 0xb, 0x0},
814         {12000000, 16000, 0xa, 0x1},
815 
816         /* 22.05k */
817         {11289600, 22050, 0x1a, 0x0},
818         {16934400, 22050, 0x1b, 0x0},
819         {12000000, 22050, 0x1b, 0x1},
820 
821         /* 32k */
822         {12288000, 32000, 0xc, 0x0},
823         {18432000, 32000, 0xd, 0x0},
824         {12000000, 32000, 0xa, 0x1},
825 
826         /* 44.1k */
827         {11289600, 44100, 0x10, 0x0},
828         {16934400, 44100, 0x11, 0x0},
829         {12000000, 44100, 0x11, 0x1},
830 
831         /* 48k */
832         {12288000, 48000, 0x0, 0x0},
833         {18432000, 48000, 0x1, 0x0},
834         {12000000, 48000, 0x0, 0x1},
835 
836         /* 88.2k */
837         {11289600, 88200, 0x1e, 0x0},
838         {16934400, 88200, 0x1f, 0x0},
839         {12000000, 88200, 0x1f, 0x1},
840 
841         /* 96k */
842         {12288000, 96000, 0xe, 0x0},
843         {18432000, 96000, 0xf, 0x0},
844         {12000000, 96000, 0xe, 0x1},
845 };
846 
847 static int get_coeff(int mclk, int rate)
848 {
849         int i;
850 
851         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
852                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
853                         return i;
854         }
855         return -EINVAL;
856 }
857 
858 /*
859  * Clock after PLL and dividers
860  */
861 static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
862                 int clk_id, unsigned int freq, int dir)
863 {
864         struct snd_soc_component *component = codec_dai->component;
865         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
866 
867         switch (freq) {
868         case 11289600:
869         case 12000000:
870         case 12288000:
871         case 16934400:
872         case 18432000:
873                 if (clk_id == WM8753_MCLK) {
874                         wm8753->sysclk = freq;
875                         return 0;
876                 } else if (clk_id == WM8753_PCMCLK) {
877                         wm8753->pcmclk = freq;
878                         return 0;
879                 }
880                 break;
881         }
882         return -EINVAL;
883 }
884 
885 /*
886  * Set's ADC and Voice DAC format.
887  */
888 static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_component *component,
889                 unsigned int fmt)
890 {
891         u16 voice = snd_soc_component_read(component, WM8753_PCM) & 0x01ec;
892 
893         /* interface format */
894         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
895         case SND_SOC_DAIFMT_I2S:
896                 voice |= 0x0002;
897                 break;
898         case SND_SOC_DAIFMT_RIGHT_J:
899                 break;
900         case SND_SOC_DAIFMT_LEFT_J:
901                 voice |= 0x0001;
902                 break;
903         case SND_SOC_DAIFMT_DSP_A:
904                 voice |= 0x0003;
905                 break;
906         case SND_SOC_DAIFMT_DSP_B:
907                 voice |= 0x0013;
908                 break;
909         default:
910                 return -EINVAL;
911         }
912 
913         snd_soc_component_write(component, WM8753_PCM, voice);
914         return 0;
915 }
916 
917 /*
918  * Set PCM DAI bit size and sample rate.
919  */
920 static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
921                                 struct snd_pcm_hw_params *params,
922                                 struct snd_soc_dai *dai)
923 {
924         struct snd_soc_component *component = dai->component;
925         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
926         u16 voice = snd_soc_component_read(component, WM8753_PCM) & 0x01f3;
927         u16 srate = snd_soc_component_read(component, WM8753_SRATE1) & 0x017f;
928 
929         /* bit size */
930         switch (params_width(params)) {
931         case 16:
932                 break;
933         case 20:
934                 voice |= 0x0004;
935                 break;
936         case 24:
937                 voice |= 0x0008;
938                 break;
939         case 32:
940                 voice |= 0x000c;
941                 break;
942         }
943 
944         /* sample rate */
945         if (params_rate(params) * 384 == wm8753->pcmclk)
946                 srate |= 0x80;
947         snd_soc_component_write(component, WM8753_SRATE1, srate);
948 
949         snd_soc_component_write(component, WM8753_PCM, voice);
950         return 0;
951 }
952 
953 /*
954  * Set's PCM dai fmt and BCLK.
955  */
956 static int wm8753_pcm_set_dai_fmt(struct snd_soc_component *component,
957                 unsigned int fmt)
958 {
959         u16 voice, ioctl;
960 
961         voice = snd_soc_component_read(component, WM8753_PCM) & 0x011f;
962         ioctl = snd_soc_component_read(component, WM8753_IOCTL) & 0x015d;
963 
964         /* set master/slave audio interface */
965         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
966         case SND_SOC_DAIFMT_CBS_CFS:
967                 break;
968         case SND_SOC_DAIFMT_CBM_CFM:
969                 ioctl |= 0x2;
970                 fallthrough;
971         case SND_SOC_DAIFMT_CBM_CFS:
972                 voice |= 0x0040;
973                 break;
974         default:
975                 return -EINVAL;
976         }
977 
978         /* clock inversion */
979         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
980         case SND_SOC_DAIFMT_DSP_A:
981         case SND_SOC_DAIFMT_DSP_B:
982                 /* frame inversion not valid for DSP modes */
983                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
984                 case SND_SOC_DAIFMT_NB_NF:
985                         break;
986                 case SND_SOC_DAIFMT_IB_NF:
987                         voice |= 0x0080;
988                         break;
989                 default:
990                         return -EINVAL;
991                 }
992                 break;
993         case SND_SOC_DAIFMT_I2S:
994         case SND_SOC_DAIFMT_RIGHT_J:
995         case SND_SOC_DAIFMT_LEFT_J:
996                 voice &= ~0x0010;
997                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
998                 case SND_SOC_DAIFMT_NB_NF:
999                         break;
1000                 case SND_SOC_DAIFMT_IB_IF:
1001                         voice |= 0x0090;
1002                         break;
1003                 case SND_SOC_DAIFMT_IB_NF:
1004                         voice |= 0x0080;
1005                         break;
1006                 case SND_SOC_DAIFMT_NB_IF:
1007                         voice |= 0x0010;
1008                         break;
1009                 default:
1010                         return -EINVAL;
1011                 }
1012                 break;
1013         default:
1014                 return -EINVAL;
1015         }
1016 
1017         snd_soc_component_write(component, WM8753_PCM, voice);
1018         snd_soc_component_write(component, WM8753_IOCTL, ioctl);
1019         return 0;
1020 }
1021 
1022 static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1023                 int div_id, int div)
1024 {
1025         struct snd_soc_component *component = codec_dai->component;
1026         u16 reg;
1027 
1028         switch (div_id) {
1029         case WM8753_PCMDIV:
1030                 reg = snd_soc_component_read(component, WM8753_CLOCK) & 0x003f;
1031                 snd_soc_component_write(component, WM8753_CLOCK, reg | div);
1032                 break;
1033         case WM8753_BCLKDIV:
1034                 reg = snd_soc_component_read(component, WM8753_SRATE2) & 0x01c7;
1035                 snd_soc_component_write(component, WM8753_SRATE2, reg | div);
1036                 break;
1037         case WM8753_VXCLKDIV:
1038                 reg = snd_soc_component_read(component, WM8753_SRATE2) & 0x003f;
1039                 snd_soc_component_write(component, WM8753_SRATE2, reg | div);
1040                 break;
1041         default:
1042                 return -EINVAL;
1043         }
1044         return 0;
1045 }
1046 
1047 /*
1048  * Set's HiFi DAC format.
1049  */
1050 static int wm8753_hdac_set_dai_fmt(struct snd_soc_component *component,
1051                 unsigned int fmt)
1052 {
1053         u16 hifi = snd_soc_component_read(component, WM8753_HIFI) & 0x01e0;
1054 
1055         /* interface format */
1056         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1057         case SND_SOC_DAIFMT_I2S:
1058                 hifi |= 0x0002;
1059                 break;
1060         case SND_SOC_DAIFMT_RIGHT_J:
1061                 break;
1062         case SND_SOC_DAIFMT_LEFT_J:
1063                 hifi |= 0x0001;
1064                 break;
1065         case SND_SOC_DAIFMT_DSP_A:
1066                 hifi |= 0x0003;
1067                 break;
1068         case SND_SOC_DAIFMT_DSP_B:
1069                 hifi |= 0x0013;
1070                 break;
1071         default:
1072                 return -EINVAL;
1073         }
1074 
1075         snd_soc_component_write(component, WM8753_HIFI, hifi);
1076         return 0;
1077 }
1078 
1079 /*
1080  * Set's I2S DAI format.
1081  */
1082 static int wm8753_i2s_set_dai_fmt(struct snd_soc_component *component,
1083                 unsigned int fmt)
1084 {
1085         u16 ioctl, hifi;
1086 
1087         hifi = snd_soc_component_read(component, WM8753_HIFI) & 0x013f;
1088         ioctl = snd_soc_component_read(component, WM8753_IOCTL) & 0x00ae;
1089 
1090         /* set master/slave audio interface */
1091         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1092         case SND_SOC_DAIFMT_CBS_CFS:
1093                 break;
1094         case SND_SOC_DAIFMT_CBM_CFM:
1095                 ioctl |= 0x1;
1096                 fallthrough;
1097         case SND_SOC_DAIFMT_CBM_CFS:
1098                 hifi |= 0x0040;
1099                 break;
1100         default:
1101                 return -EINVAL;
1102         }
1103 
1104         /* clock inversion */
1105         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1106         case SND_SOC_DAIFMT_DSP_A:
1107         case SND_SOC_DAIFMT_DSP_B:
1108                 /* frame inversion not valid for DSP modes */
1109                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1110                 case SND_SOC_DAIFMT_NB_NF:
1111                         break;
1112                 case SND_SOC_DAIFMT_IB_NF:
1113                         hifi |= 0x0080;
1114                         break;
1115                 default:
1116                         return -EINVAL;
1117                 }
1118                 break;
1119         case SND_SOC_DAIFMT_I2S:
1120         case SND_SOC_DAIFMT_RIGHT_J:
1121         case SND_SOC_DAIFMT_LEFT_J:
1122                 hifi &= ~0x0010;
1123                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1124                 case SND_SOC_DAIFMT_NB_NF:
1125                         break;
1126                 case SND_SOC_DAIFMT_IB_IF:
1127                         hifi |= 0x0090;
1128                         break;
1129                 case SND_SOC_DAIFMT_IB_NF:
1130                         hifi |= 0x0080;
1131                         break;
1132                 case SND_SOC_DAIFMT_NB_IF:
1133                         hifi |= 0x0010;
1134                         break;
1135                 default:
1136                         return -EINVAL;
1137                 }
1138                 break;
1139         default:
1140                 return -EINVAL;
1141         }
1142 
1143         snd_soc_component_write(component, WM8753_HIFI, hifi);
1144         snd_soc_component_write(component, WM8753_IOCTL, ioctl);
1145         return 0;
1146 }
1147 
1148 /*
1149  * Set PCM DAI bit size and sample rate.
1150  */
1151 static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1152                                 struct snd_pcm_hw_params *params,
1153                                 struct snd_soc_dai *dai)
1154 {
1155         struct snd_soc_component *component = dai->component;
1156         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1157         u16 srate = snd_soc_component_read(component, WM8753_SRATE1) & 0x01c0;
1158         u16 hifi = snd_soc_component_read(component, WM8753_HIFI) & 0x01f3;
1159         int coeff;
1160 
1161         /* is digital filter coefficient valid ? */
1162         coeff = get_coeff(wm8753->sysclk, params_rate(params));
1163         if (coeff < 0) {
1164                 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1165                 return coeff;
1166         }
1167         snd_soc_component_write(component, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1168                 coeff_div[coeff].usb);
1169 
1170         /* bit size */
1171         switch (params_width(params)) {
1172         case 16:
1173                 break;
1174         case 20:
1175                 hifi |= 0x0004;
1176                 break;
1177         case 24:
1178                 hifi |= 0x0008;
1179                 break;
1180         case 32:
1181                 hifi |= 0x000c;
1182                 break;
1183         }
1184 
1185         snd_soc_component_write(component, WM8753_HIFI, hifi);
1186         return 0;
1187 }
1188 
1189 static int wm8753_mode1v_set_dai_fmt(struct snd_soc_component *component,
1190                 unsigned int fmt)
1191 {
1192         u16 clock;
1193 
1194         /* set clk source as pcmclk */
1195         clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;
1196         snd_soc_component_write(component, WM8753_CLOCK, clock);
1197 
1198         return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1199 }
1200 
1201 static int wm8753_mode1h_set_dai_fmt(struct snd_soc_component *component,
1202                 unsigned int fmt)
1203 {
1204         return wm8753_hdac_set_dai_fmt(component, fmt);
1205 }
1206 
1207 static int wm8753_mode2_set_dai_fmt(struct snd_soc_component *component,
1208                 unsigned int fmt)
1209 {
1210         u16 clock;
1211 
1212         /* set clk source as pcmclk */
1213         clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;
1214         snd_soc_component_write(component, WM8753_CLOCK, clock);
1215 
1216         return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1217 }
1218 
1219 static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_component *component,
1220                 unsigned int fmt)
1221 {
1222         u16 clock;
1223 
1224         /* set clk source as mclk */
1225         clock = snd_soc_component_read(component, WM8753_CLOCK) & 0xfffb;
1226         snd_soc_component_write(component, WM8753_CLOCK, clock | 0x4);
1227 
1228         if (wm8753_hdac_set_dai_fmt(component, fmt) < 0)
1229                 return -EINVAL;
1230         return wm8753_vdac_adc_set_dai_fmt(component, fmt);
1231 }
1232 
1233 static int wm8753_hifi_write_dai_fmt(struct snd_soc_component *component,
1234                 unsigned int fmt)
1235 {
1236         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1237         int ret = 0;
1238 
1239         switch (wm8753->dai_func) {
1240         case 0:
1241                 ret = wm8753_mode1h_set_dai_fmt(component, fmt);
1242                 break;
1243         case 1:
1244                 ret = wm8753_mode2_set_dai_fmt(component, fmt);
1245                 break;
1246         case 2:
1247         case 3:
1248                 ret = wm8753_mode3_4_set_dai_fmt(component, fmt);
1249                 break;
1250         default:
1251                  break;
1252         }
1253         if (ret)
1254                 return ret;
1255 
1256         return wm8753_i2s_set_dai_fmt(component, fmt);
1257 }
1258 
1259 static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1260                 unsigned int fmt)
1261 {
1262         struct snd_soc_component *component = codec_dai->component;
1263         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1264 
1265         wm8753->hifi_fmt = fmt;
1266 
1267         return wm8753_hifi_write_dai_fmt(component, fmt);
1268 };
1269 
1270 static int wm8753_voice_write_dai_fmt(struct snd_soc_component *component,
1271                 unsigned int fmt)
1272 {
1273         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1274         int ret = 0;
1275 
1276         if (wm8753->dai_func != 0)
1277                 return 0;
1278 
1279         ret = wm8753_mode1v_set_dai_fmt(component, fmt);
1280         if (ret)
1281                 return ret;
1282         ret = wm8753_pcm_set_dai_fmt(component, fmt);
1283         if (ret)
1284                 return ret;
1285 
1286         return 0;
1287 };
1288 
1289 static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1290                 unsigned int fmt)
1291 {
1292         struct snd_soc_component *component = codec_dai->component;
1293         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1294 
1295         wm8753->voice_fmt = fmt;
1296 
1297         return wm8753_voice_write_dai_fmt(component, fmt);
1298 };
1299 
1300 static int wm8753_mute(struct snd_soc_dai *dai, int mute, int direction)
1301 {
1302         struct snd_soc_component *component = dai->component;
1303         u16 mute_reg = snd_soc_component_read(component, WM8753_DAC) & 0xfff7;
1304         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1305 
1306         /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1307          * make sure we check if they are not both active when we mute */
1308         if (mute && wm8753->dai_func == 1) {
1309                 if (!snd_soc_component_active(component))
1310                         snd_soc_component_write(component, WM8753_DAC, mute_reg | 0x8);
1311         } else {
1312                 if (mute)
1313                         snd_soc_component_write(component, WM8753_DAC, mute_reg | 0x8);
1314                 else
1315                         snd_soc_component_write(component, WM8753_DAC, mute_reg);
1316         }
1317 
1318         return 0;
1319 }
1320 
1321 static void wm8753_charge_work(struct work_struct *work)
1322 {
1323         struct wm8753_priv *wm8753 =
1324                 container_of(work, struct wm8753_priv, charge_work.work);
1325 
1326         /* Set to 500k */
1327         regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100);
1328 }
1329 
1330 static int wm8753_set_bias_level(struct snd_soc_component *component,
1331                                  enum snd_soc_bias_level level)
1332 {
1333         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1334         u16 pwr_reg = snd_soc_component_read(component, WM8753_PWR1) & 0xfe3e;
1335 
1336         switch (level) {
1337         case SND_SOC_BIAS_ON:
1338                 /* set vmid to 50k and unmute dac */
1339                 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x00c0);
1340                 break;
1341         case SND_SOC_BIAS_PREPARE:
1342                 /* Wait until fully charged */
1343                 flush_delayed_work(&wm8753->charge_work);
1344                 break;
1345         case SND_SOC_BIAS_STANDBY:
1346                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1347                         /* set vmid to 5k for quick power up */
1348                         snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x01c1);
1349                         schedule_delayed_work(&wm8753->charge_work,
1350                                 msecs_to_jiffies(caps_charge));
1351                 } else {
1352                         /* mute dac and set vmid to 500k, enable VREF */
1353                         snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x0141);
1354                 }
1355                 break;
1356         case SND_SOC_BIAS_OFF:
1357                 cancel_delayed_work_sync(&wm8753->charge_work);
1358                 snd_soc_component_write(component, WM8753_PWR1, 0x0001);
1359                 break;
1360         }
1361         return 0;
1362 }
1363 
1364 #define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1365                 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1366                 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1367                 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1368 
1369 #define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1370         SNDRV_PCM_FMTBIT_S24_LE)
1371 
1372 /*
1373  * The WM8753 supports up to 4 different and mutually exclusive DAI
1374  * configurations. This gives 2 PCM's available for use, hifi and voice.
1375  * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1376  * is connected between the wm8753 and a BT codec or GSM modem.
1377  *
1378  * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1379  * 2. Voice over HIFI DAI - HIFI disabled
1380  * 3. Voice disabled - HIFI over HIFI
1381  * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1382  */
1383 static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
1384         .hw_params      = wm8753_i2s_hw_params,
1385         .mute_stream    = wm8753_mute,
1386         .set_fmt        = wm8753_hifi_set_dai_fmt,
1387         .set_clkdiv     = wm8753_set_dai_clkdiv,
1388         .set_pll        = wm8753_set_dai_pll,
1389         .set_sysclk     = wm8753_set_dai_sysclk,
1390         .no_capture_mute = 1,
1391 };
1392 
1393 static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
1394         .hw_params      = wm8753_pcm_hw_params,
1395         .mute_stream    = wm8753_mute,
1396         .set_fmt        = wm8753_voice_set_dai_fmt,
1397         .set_clkdiv     = wm8753_set_dai_clkdiv,
1398         .set_pll        = wm8753_set_dai_pll,
1399         .set_sysclk     = wm8753_set_dai_sysclk,
1400         .no_capture_mute = 1,
1401 };
1402 
1403 static struct snd_soc_dai_driver wm8753_dai[] = {
1404 /* DAI HiFi mode 1 */
1405 {       .name = "wm8753-hifi",
1406         .playback = {
1407                 .stream_name = "HiFi Playback",
1408                 .channels_min = 1,
1409                 .channels_max = 2,
1410                 .rates = WM8753_RATES,
1411                 .formats = WM8753_FORMATS
1412         },
1413         .capture = { /* dummy for fast DAI switching */
1414                 .stream_name = "Capture",
1415                 .channels_min = 1,
1416                 .channels_max = 2,
1417                 .rates = WM8753_RATES,
1418                 .formats = WM8753_FORMATS
1419         },
1420         .ops = &wm8753_dai_ops_hifi_mode,
1421 },
1422 /* DAI Voice mode 1 */
1423 {       .name = "wm8753-voice",
1424         .playback = {
1425                 .stream_name = "Voice Playback",
1426                 .channels_min = 1,
1427                 .channels_max = 1,
1428                 .rates = WM8753_RATES,
1429                 .formats = WM8753_FORMATS,
1430         },
1431         .capture = {
1432                 .stream_name = "Capture",
1433                 .channels_min = 1,
1434                 .channels_max = 2,
1435                 .rates = WM8753_RATES,
1436                 .formats = WM8753_FORMATS,
1437         },
1438         .ops = &wm8753_dai_ops_voice_mode,
1439 },
1440 };
1441 
1442 static int wm8753_resume(struct snd_soc_component *component)
1443 {
1444         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1445 
1446         regcache_sync(wm8753->regmap);
1447 
1448         return 0;
1449 }
1450 
1451 static int wm8753_probe(struct snd_soc_component *component)
1452 {
1453         struct wm8753_priv *wm8753 = snd_soc_component_get_drvdata(component);
1454         int ret;
1455 
1456         INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work);
1457 
1458         ret = wm8753_reset(component);
1459         if (ret < 0) {
1460                 dev_err(component->dev, "Failed to issue reset: %d\n", ret);
1461                 return ret;
1462         }
1463 
1464         wm8753->dai_func = 0;
1465 
1466         /* set the update bits */
1467         snd_soc_component_update_bits(component, WM8753_LDAC, 0x0100, 0x0100);
1468         snd_soc_component_update_bits(component, WM8753_RDAC, 0x0100, 0x0100);
1469         snd_soc_component_update_bits(component, WM8753_LADC, 0x0100, 0x0100);
1470         snd_soc_component_update_bits(component, WM8753_RADC, 0x0100, 0x0100);
1471         snd_soc_component_update_bits(component, WM8753_LOUT1V, 0x0100, 0x0100);
1472         snd_soc_component_update_bits(component, WM8753_ROUT1V, 0x0100, 0x0100);
1473         snd_soc_component_update_bits(component, WM8753_LOUT2V, 0x0100, 0x0100);
1474         snd_soc_component_update_bits(component, WM8753_ROUT2V, 0x0100, 0x0100);
1475         snd_soc_component_update_bits(component, WM8753_LINVOL, 0x0100, 0x0100);
1476         snd_soc_component_update_bits(component, WM8753_RINVOL, 0x0100, 0x0100);
1477 
1478         return 0;
1479 }
1480 
1481 static const struct snd_soc_component_driver soc_component_dev_wm8753 = {
1482         .probe                  = wm8753_probe,
1483         .resume                 = wm8753_resume,
1484         .set_bias_level         = wm8753_set_bias_level,
1485         .controls               = wm8753_snd_controls,
1486         .num_controls           = ARRAY_SIZE(wm8753_snd_controls),
1487         .dapm_widgets           = wm8753_dapm_widgets,
1488         .num_dapm_widgets       = ARRAY_SIZE(wm8753_dapm_widgets),
1489         .dapm_routes            = wm8753_dapm_routes,
1490         .num_dapm_routes        = ARRAY_SIZE(wm8753_dapm_routes),
1491         .suspend_bias_off       = 1,
1492         .idle_bias_on           = 1,
1493         .use_pmdown_time        = 1,
1494         .endianness             = 1,
1495 };
1496 
1497 static const struct of_device_id wm8753_of_match[] = {
1498         { .compatible = "wlf,wm8753", },
1499         { }
1500 };
1501 MODULE_DEVICE_TABLE(of, wm8753_of_match);
1502 
1503 static const struct regmap_config wm8753_regmap = {
1504         .reg_bits = 7,
1505         .val_bits = 9,
1506 
1507         .max_register = WM8753_ADCTL2,
1508         .volatile_reg = wm8753_volatile,
1509 
1510         .cache_type = REGCACHE_MAPLE,
1511         .reg_defaults = wm8753_reg_defaults,
1512         .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults),
1513 };
1514 
1515 #if defined(CONFIG_SPI_MASTER)
1516 static int wm8753_spi_probe(struct spi_device *spi)
1517 {
1518         struct wm8753_priv *wm8753;
1519         int ret;
1520 
1521         wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv),
1522                               GFP_KERNEL);
1523         if (wm8753 == NULL)
1524                 return -ENOMEM;
1525 
1526         spi_set_drvdata(spi, wm8753);
1527 
1528         wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap);
1529         if (IS_ERR(wm8753->regmap)) {
1530                 ret = PTR_ERR(wm8753->regmap);
1531                 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1532                         ret);
1533                 return ret;
1534         }
1535 
1536         ret = devm_snd_soc_register_component(&spi->dev, &soc_component_dev_wm8753,
1537                                      wm8753_dai, ARRAY_SIZE(wm8753_dai));
1538         if (ret != 0)
1539                 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
1540 
1541         return ret;
1542 }
1543 
1544 static struct spi_driver wm8753_spi_driver = {
1545         .driver = {
1546                 .name   = "wm8753",
1547                 .of_match_table = wm8753_of_match,
1548         },
1549         .probe          = wm8753_spi_probe,
1550 };
1551 #endif /* CONFIG_SPI_MASTER */
1552 
1553 #if IS_ENABLED(CONFIG_I2C)
1554 static int wm8753_i2c_probe(struct i2c_client *i2c)
1555 {
1556         struct wm8753_priv *wm8753;
1557         int ret;
1558 
1559         wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv),
1560                               GFP_KERNEL);
1561         if (wm8753 == NULL)
1562                 return -ENOMEM;
1563 
1564         i2c_set_clientdata(i2c, wm8753);
1565 
1566         wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap);
1567         if (IS_ERR(wm8753->regmap)) {
1568                 ret = PTR_ERR(wm8753->regmap);
1569                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1570                         ret);
1571                 return ret;
1572         }
1573 
1574         ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_wm8753,
1575                                      wm8753_dai, ARRAY_SIZE(wm8753_dai));
1576         if (ret != 0)
1577                 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
1578 
1579         return ret;
1580 }
1581 
1582 static const struct i2c_device_id wm8753_i2c_id[] = {
1583         { "wm8753" },
1584         { }
1585 };
1586 MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1587 
1588 static struct i2c_driver wm8753_i2c_driver = {
1589         .driver = {
1590                 .name = "wm8753",
1591                 .of_match_table = wm8753_of_match,
1592         },
1593         .probe = wm8753_i2c_probe,
1594         .id_table = wm8753_i2c_id,
1595 };
1596 #endif
1597 
1598 static int __init wm8753_modinit(void)
1599 {
1600         int ret = 0;
1601 #if IS_ENABLED(CONFIG_I2C)
1602         ret = i2c_add_driver(&wm8753_i2c_driver);
1603         if (ret != 0) {
1604                 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1605                        ret);
1606         }
1607 #endif
1608 #if defined(CONFIG_SPI_MASTER)
1609         ret = spi_register_driver(&wm8753_spi_driver);
1610         if (ret != 0) {
1611                 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1612                        ret);
1613         }
1614 #endif
1615         return ret;
1616 }
1617 module_init(wm8753_modinit);
1618 
1619 static void __exit wm8753_exit(void)
1620 {
1621 #if IS_ENABLED(CONFIG_I2C)
1622         i2c_del_driver(&wm8753_i2c_driver);
1623 #endif
1624 #if defined(CONFIG_SPI_MASTER)
1625         spi_unregister_driver(&wm8753_spi_driver);
1626 #endif
1627 }
1628 module_exit(wm8753_exit);
1629 
1630 MODULE_DESCRIPTION("ASoC WM8753 driver");
1631 MODULE_AUTHOR("Liam Girdwood");
1632 MODULE_LICENSE("GPL");
1633 

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